Re: [PEDA] help with a stack ??

2002-02-22 Thread Sean James
Just remember to balance you layer stack thicknesses to prevent the board from being warped. - Original Message - From: Jon Elson [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Thursday, February 21, 2002 3:59 PM Subject: Re: [PEDA] help with a stack ?? Robison Michael

Re: [PEDA] help with a stack ??

2002-02-21 Thread HxEngr

Re: [PEDA] help with a stack ??

2002-02-21 Thread Ted Tontis
Mike, use this stack up non critical gnd critical -5 gnd critical +5 (better if this was ground) non critical or gnd critical non critical power gnd non critical critical gnd (if power switch critical and non critical) two reasons why I say put the critical in the

Re: [PEDA] help with a stack ??

2002-02-21 Thread Jon Elson
Robison Michael R CNIN wrote: hello, i've got a negative (ECL) and a positive (TTL) power plane on a board i'm doing. right now i'm figuring on a matching ground plane for each power supply, spaced close to the rail for switching capacitance. here's the stack i'm thinking of: critical

Re: [PEDA] help with a stack ??

2002-02-21 Thread Brian Sherer
Mike, I've run into trouble by assuming the board house would equalize dielectric thickness in the layer stack. Some do, some don't. I now add a fab note to equalize dielectric thickness +/- 10% to get an approximately known dielectric thickness. Or you can specify the prepreg thickness between

Re: [PEDA] help with a stack ??

2002-02-21 Thread Abd ul-Rahman Lomax
At 02:25 PM 2/21/2002 -0500, Robison Michael R CNIN wrote: hello, i've got a negative (ECL) and a positive (TTL) power plane on a board i'm doing. right now i'm figuring on a matching ground plane for each power supply, spaced close to the rail for switching capacitance. here's the stack i'm