Re: [PEDA] tab route 2.4
On 04:36 AM 16/03/2003, Dennis Saputelli said: do you really mean '2.4mm rout' not '2.54mm route' ? Dennis, A standard router bit in use on most PCB makers I know is 2.4mm (not 2.54mm). This is a good tool to use as it supports a good feed rate - much smaller and the bits break if the material feed rate is too high - according to PCB production engineers I have spoken to. I have been told that to rout out a board with a 1.2 mm or 1mm tool will be more expensive as the time to rout is longer as the feedrate is lower. There is also the risk of breakage and maybe the smaller tool becomes dull faster. I do not know how much more expensive though. I am not sure but I think I was also told once that boards could be routed in a stack with the larger tools. The main issue I have with this tool size is internal corners have a 1.2mm radius. This can be a problem when you have to fit into a decimal pointed housing. I usually solve this by pushing the router into the PCB a small distance at a 45 degree angle to the rout edges (does this make sense?). I have figured in the past that a 0.5mm travel into the PCB at such an internal corner is enough to ensure the PCB can fit into a square edge housing. I am not being clear here I know. A picture would be much better, I know. So here it is: http://www.considered.com.au/images/SqCornerRoutAndBreakoffTab1.gif Also, as part of the original discussion on this subject here is a complete panel showing one fully designed board and the details of the full production panel, including routs and step and repeat (simple in this case). This board is quite interesting - the mechanics where more exhausting than the trackwork. Here is the board and panel: http://www.considered.com.au/images/SqCornerRoutAndBreakoffTab1.gif And here is a photo of a portion of the final assembly, showing the dags from the breakoff and the effect of pushing the router in at the corners: http://www.considered.com.au/images/FinalBoard1.jpg I would like to improve the breakoff to get rid of the dags but not at too much expense of the PCB rout area - I suspect I could place a larger hole in these locations and that would do it. But it has not been sufficiently bothersome to work on it any more. Anyone got a suggestion? I have at times specified a small router bit in a few specific places where a thin slot was used. But I pretty much always specify a 2.4mm dia tool if I am laying up a panel and need to show the rout gap. I have been told at one stage that it maybe better to make a slightly larger gap between the boards that the 2.4mm distance to allow the rout bit to be fed against the spin on all dress edges - that is edge of boards rather than tooling strips. This gives a better finish I gather. I pretty much try and do what the PCB makers tell me, I am no expert. I really only get into this as we have found that it is most reliable for us to lay up the full production panel, on final production boards that is, rather than leave it to someone else. this is of course a pain for design, so we draw everything at 0.100 and they either joggle the bit or use an actual 0.100 bit I find that it is pretty easy to lay up a full panel. I make liberal use of construction tracks, little track segments 2.4mm long that I con drop down and then snap to. anyway, i have been thinking about going to 0.050 router bit width do you have any comments on the ups and downs of that? If it was me I would speak to the PCB makers you usually use and discuss $ vs feedrate. Maybe it is not such an issue these days. Bits may be better or fancier routing machines may be able to keep the cost down some other way. are the router bits too thin and breakable or whatever ? (062 thick bds) So I have been told. i have a board where it would actually save an appreciable amount of material This is an issue. Using up panel space for rout gaps vs more PCBs per panel. Take into account the (possibly) lower feedrate, and number of boards that can be routed in a stack - which ends up cheaper? PCB makers are the bods to ask that. also regarding your breakaway holes we have been fiddling with those for some time (the size, count and arrangement) but we always seem to get little 'tits' where the breakaway occurs these are small sharp protrusions that in some cases need to be cleaned up I have also been playing with these over the years. I have pretty much settled on a shallow arc arrangement that bites into the PCB area - I am trying to get the breakoff to occur within my board area so the dags (your 'tits') are within the allowable board space. This does cost a little PCB area of course. I have experimented with holes placed so that the rout breaks into the end holes. My current design ends with two small dags at each end of the break off tab that project just beyond the desired line of the PCB. This seems to be a reasonable compromise between wasting PCB routing and
Re: [PEDA] tab route 2.4
Dennis, I could also contribute that in the imperial world our local suppliers seem to have 0.094 as their standard routing tool. That is a very close equivalent to 2.4mm. Sincerely, Brad Velander. Lead PCB Designer Norsat International Inc. Microwave Products Tel (604) 292-9089 (direct line) Fax (604) 292-9010 email: [EMAIL PROTECTED] http://www.norsat.com -Original Message- From: Ian Wilson [mailto:[EMAIL PROTECTED] Sent: Saturday, March 15, 2003 9:41 PM To: Protel EDA Forum Subject: Re: [PEDA] tab route 2.4 On 04:36 AM 16/03/2003, Dennis Saputelli said: do you really mean '2.4mm rout' not '2.54mm route' ? Dennis, A standard router bit in use on most PCB makers I know is 2.4mm (not 2.54mm). This is a good tool to use as it supports a good feed rate - much * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] tab route 2.4
do you really mean '2.4mm rout' not '2.54mm route' ? not trying to be a ball buster here but i have been thinking about this dimension lately here in the land of Feet and Pounds some of my fabricators like 0.093 router bits since that is a fractional inch dimension this is of course a pain for design, so we draw everything at 0.100 and they either joggle the bit or use an actual 0.100 bit anyway, i have been thinking about going to 0.050 router bit width do you have any comments on the ups and downs of that? are the router bits too thin and breakable or whatever ? (062 thick bds) i have a board where it would actually save an appreciable amount of material also regarding your breakaway holes we have been fiddling with those for some time (the size, count and arrangement) but we always seem to get little 'tits' where the breakaway occurs these are small sharp protrusions that in some cases need to be cleaned up i see that you (Ian) use .029 holes we use holes more like 0.020 - 0.022 spaced pretty close AND NON-THRU PLATED! (else the little plating barrels can be an electrical hazard as they detach) also on a related topic anyone have a feel for a reasonable design tolerance for the location of V grooves? i know they are a bit sloppier than routing but they are attractive in certain cases Dennis Saputelli Ian Wilson wrote: On 06:28 PM 14/03/2003, Z Hylton said: I need some help. I am panelizing a number of small boards, (5 caps, two SOP16 packages). I'm using DXP and when I copy the second board, all the designator's names are changed. C1 becomes C1_1, ...the third board has designator's changed from C1 to C1_2... and so on. Does anyone know how to turn this feature off? Or maybe it's best to move everything back to 99SE once again and do the work there? What I usually do is design just one board but lay up the full panel (including tooling strips, routs (and breakoff tabs) or v-grooves, etc). So my mech layer 1 (renamed Board Outline) is a complex thing showing 2.4mm routs and break off strips if I am routing the panel, or lines crossing right across the panel (and tooling strips) if I am v-grooving. (In the case of a routed board with break off tabs, I place all the breakoff holes on all tabs - I then make a note to the PCB maker that the break off holes and Mech Layer 1 and possibly some dimension layers etc are not to be stepped and repeated, while everything else should be. The breakoff holes are easily identifiable, they are the only 0.75mm unplated holes on the board). I fully dimension the step and repeat and then get the PCB maker to do the actual step and repeat. This works very well and I always have a fully checkable design. This works a treat for me. (BTW - I set the DXP board shape to just the size of my single board, not the full panel. DXP users will know what I mean.) (This method does not work when you are trying to panelise multiple different boards - in this case I would probably use the Camtastic method.) Alternatively, use Camtastic to do the panelising. This is available in DXP. The problem with panelisation in a CAE pkg is the problem of having two files to maintain - the individual PCB and the panel. In a fully panelised design, the panel is not really an editable files. I gave up on this some time ago as it was always tiresome and subject to risk. But if you really have to panelise in DXP use the same technique you have to use in P99SE, that is Paste Special then check the Duplicate designator and possibly Keep net name. There is a forum specifically targeting DXP users. It has lots of traffic and lots of Altium involvement. http://forums.altium.com Good luck, Ian Wilson -- Dennis Saputelli = send only plain text please! - no HTML == ___ Integrated Controls, Inc. www.integratedcontrolsinc.com 2851 21st Streettel: 415-647-0480 San Francisco, CA 94110 fax: 415-647-3003 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
