Here is how the stm32 knows when to drive the bidirectional MOSI line:
The STM32f4 reference manual: (p801)

1 clock and 1 bidirectional data wire (BIDIMODE=1)
This mode is enabled by setting the BIDIMODE bit in the SPI_CR1 register. In 
this mode
SCK is used for the clock and MOSI in master or MISO in slave mode is used for 
data
communication. The transfer direction (Input/Output) is selected by the BIDIOE 
bit in the
SPI_CR1 register. When this bit is 1, the data line is output otherwise it is 
input.


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