Hi David, Ptolemy II has an interface to JHDL which is a set of FPGA tools. A summary can be found at http://groups.yahoo.com/group/ptolemy-hackers/message/2130
Ptolemy II has two code generators, see http://ptolemy.eecs.berkeley.edu/ptolemyII/ptIIfaq.htm#CodeGen Currently, we are doing some work on generating C code that is run during the model execution. The idea is that a portion of the model is a subsystem written in C which then executed while the model is running. This code is in development and not ready for release. I don't think we have a similar facility for generating code for an FPGA and then running it. This sounds interesting. _Christopher -------- Hi all, I am doing some research in Hardware in the loop simulation based on FPGA platforms. I know that there is some Hardware Generation (or integration) in Ptolemy, but the question is: Can be the actual synthesized hardware be executed into a FPGA platform during a Ptolemy simulation ? I mean, is there any equivalent to Simulink/Xilinx System Generator in Ptolemy ? Thanks. -------- ---------------------------------------------------------------------------- Posted to the ptolemy-hackers mailing list. Please send administrative mail for this list to: [EMAIL PROTECTED]
