[pypy-commit] pypy default: Clean up code a little bit, also re-arrange it though so that `some_int in [some, list, of, ints] will generate a call, instead of a call_may_force

Author: Alex Gaynor Branch: Changeset: r56763:885cf902742d Date: 2012-08-19 19:25 -0500 http://bitbucket.org/pypy/pypy/changeset/885cf902742d/ Log:Clean up code a little bit, also re-arrange it though so that `some_int in [some, list, of, ints] will generate a call, instead of

[pypy-commit] pypy default: merged upstream

Author: Alex Gaynor Branch: Changeset: r56762:696efa49cce6 Date: 2012-08-19 19:18 -0500 http://bitbucket.org/pypy/pypy/changeset/696efa49cce6/ Log:merged upstream diff --git a/pypy/doc/windows.rst b/pypy/doc/windows.rst --- a/pypy/doc/windows.rst +++ b/pypy/doc/windows.rst @@ -135,6 +135,10

[pypy-commit] pypy default: Move some code to a more correct place.

Author: Alex Gaynor Branch: Changeset: r56761:944a60e07f3e Date: 2012-08-19 12:33 -0400 http://bitbucket.org/pypy/pypy/changeset/944a60e07f3e/ Log:Move some code to a more correct place. diff --git a/pypy/objspace/flow/operation.py b/pypy/objspace/flow/operation.py --- a/pypy/objspace/flow/

[pypy-commit] pypy numpypy-problems: start to implement StringType.coerce

Author: mattip Branch: numpypy-problems Changeset: r56760:5448fac77bb6 Date: 2012-08-19 23:56 +0300 http://bitbucket.org/pypy/pypy/changeset/5448fac77bb6/ Log:start to implement StringType.coerce diff --git a/pypy/module/micronumpy/types.py b/pypy/module/micronumpy/types.py --- a/pypy/module

[pypy-commit] pypy numpypy-problems: add intp, uintp dtypes

Author: mattip Branch: numpypy-problems Changeset: r56759:6171c097bef0 Date: 2012-08-19 22:58 +0300 http://bitbucket.org/pypy/pypy/changeset/6171c097bef0/ Log:add intp, uintp dtypes diff --git a/pypy/module/micronumpy/interp_dtype.py b/pypy/module/micronumpy/interp_dtype.py --- a/pypy/modul

[pypy-commit] pypy numpypy-problems: allow subclassing _numpypy.void

Author: mattip Branch: numpypy-problems Changeset: r56758:9c6dce90692a Date: 2012-08-19 18:59 +0300 http://bitbucket.org/pypy/pypy/changeset/9c6dce90692a/ Log:allow subclassing _numpypy.void diff --git a/pypy/module/micronumpy/interp_boxes.py b/pypy/module/micronumpy/interp_boxes.py --- a/p

[pypy-commit] pypy improve-rbigint: Progress?

Author: Stian Andreassen Branch: improve-rbigint Changeset: r56757:95fea225f922 Date: 2012-08-19 22:21 +0200 http://bitbucket.org/pypy/pypy/changeset/95fea225f922/ Log:Progress? diff --git a/pypy/rlib/rbigint.py b/pypy/rlib/rbigint.py --- a/pypy/rlib/rbigint.py +++ b/pypy/rlib/rbigint.py @@ -

[pypy-commit] extradoc extradoc: Fix again...

Author: Armin Rigo Branch: extradoc Changeset: r4712:a421a1de7be3 Date: 2012-08-19 18:35 +0200 http://bitbucket.org/pypy/extradoc/changeset/a421a1de7be3/ Log:Fix again... diff --git a/talk/stm2012/stmimpl.rst b/talk/stm2012/stmimpl.rst --- a/talk/stm2012/stmimpl.rst +++ b/talk/stm2012/stmimp

[pypy-commit] extradoc extradoc: Bug fix.

Author: Armin Rigo Branch: extradoc Changeset: r4711:1094db537ce8 Date: 2012-08-19 18:27 +0200 http://bitbucket.org/pypy/extradoc/changeset/1094db537ce8/ Log:Bug fix. This is all nice but is missing some form of runnable code and an actual test suite or formal proof :-/ diff

[pypy-commit] pypy default: mention environment variables for mingw

Author: mattip Branch: Changeset: r56756:54f773d6fe28 Date: 2012-08-19 15:44 +0300 http://bitbucket.org/pypy/pypy/changeset/54f773d6fe28/ Log:mention environment variables for mingw diff --git a/pypy/doc/windows.rst b/pypy/doc/windows.rst --- a/pypy/doc/windows.rst +++ b/pypy/doc/windows.rs

[pypy-commit] extradoc extradoc: Four steps again...

Author: Armin Rigo Branch: extradoc Changeset: r4710:8b36a557704d Date: 2012-08-19 14:08 +0200 http://bitbucket.org/pypy/extradoc/changeset/8b36a557704d/ Log:Four steps again... diff --git a/talk/stm2012/stmimpl.rst b/talk/stm2012/stmimpl.rst --- a/talk/stm2012/stmimpl.rst +++ b/talk/stm2012

[pypy-commit] pypy arm-backend-2: fix for get/set arrayitem

Author: David Schneider Branch: arm-backend-2 Changeset: r56754:7b42a32154a4 Date: 2012-08-18 10:48 +0200 http://bitbucket.org/pypy/pypy/changeset/7b42a32154a4/ Log:fix for get/set arrayitem diff --git a/pypy/jit/backend/arm/opassembler.py b/pypy/jit/backend/arm/opassembler.py --- a/pypy/ji

[pypy-commit] pypy arm-backend-2: enable some translation tests to be run nightly

Author: David Schneider Branch: arm-backend-2 Changeset: r56755:d94caa31c991 Date: 2012-08-19 13:27 +0200 http://bitbucket.org/pypy/pypy/changeset/d94caa31c991/ Log:enable some translation tests to be run nightly diff --git a/pypy/jit/backend/arm/test/test_ztranslation.py b/pypy/jit/backend

[pypy-commit] pypy arm-backend-2: implement raw_store in the backend

Author: David Schneider Branch: arm-backend-2 Changeset: r56753:e25506bde4c3 Date: 2012-08-18 10:19 +0200 http://bitbucket.org/pypy/pypy/changeset/e25506bde4c3/ Log:implement raw_store in the backend diff --git a/pypy/jit/backend/arm/opassembler.py b/pypy/jit/backend/arm/opassembler.py ---

[pypy-commit] pypy arm-backend-2: remove emit_op_getinteriorfield_raw

Author: David Schneider Branch: arm-backend-2 Changeset: r56752:aa11b73ad936 Date: 2012-08-18 10:09 +0200 http://bitbucket.org/pypy/pypy/changeset/aa11b73ad936/ Log:remove emit_op_getinteriorfield_raw diff --git a/pypy/jit/backend/arm/opassembler.py b/pypy/jit/backend/arm/opassembler.py ---

[pypy-commit] pypy arm-backend-2: add new operations to the register allocator

Author: David Schneider Branch: arm-backend-2 Changeset: r56750:e1aef399c0b2 Date: 2012-08-18 10:07 +0200 http://bitbucket.org/pypy/pypy/changeset/e1aef399c0b2/ Log:add new operations to the register allocator diff --git a/pypy/jit/backend/arm/regalloc.py b/pypy/jit/backend/arm/regalloc.py -

[pypy-commit] pypy arm-backend-2: implement raw_load

Author: David Schneider Branch: arm-backend-2 Changeset: r56751:f124098775b7 Date: 2012-08-18 10:08 +0200 http://bitbucket.org/pypy/pypy/changeset/f124098775b7/ Log:implement raw_load diff --git a/pypy/jit/backend/arm/opassembler.py b/pypy/jit/backend/arm/opassembler.py --- a/pypy/jit/backe

[pypy-commit] pypy arm-backend-2: cleanup

Author: David Schneider Branch: arm-backend-2 Changeset: r56749:fcecfd5b3b74 Date: 2012-08-18 10:06 +0200 http://bitbucket.org/pypy/pypy/changeset/fcecfd5b3b74/ Log:cleanup diff --git a/pypy/jit/backend/arm/opassembler.py b/pypy/jit/backend/arm/opassembler.py --- a/pypy/jit/backend/arm/opas

[pypy-commit] cffi default: #include is bogus.

Author: Armin Rigo Branch: Changeset: r863:6b188ac30e6f Date: 2012-08-19 13:07 +0200 http://bitbucket.org/cffi/cffi/changeset/6b188ac30e6f/ Log:#include is bogus. diff --git a/doc/source/index.rst b/doc/source/index.rst --- a/doc/source/index.rst +++ b/doc/source/index.rst @@ -496,6 +496,1

[pypy-commit] extradoc extradoc: Another deadlock to work around here.

Author: Armin Rigo Branch: extradoc Changeset: r4709:0be10b1d49fe Date: 2012-08-19 12:41 +0200 http://bitbucket.org/pypy/extradoc/changeset/0be10b1d49fe/ Log:Another deadlock to work around here. diff --git a/talk/stm2012/stmimpl.rst b/talk/stm2012/stmimpl.rst --- a/talk/stm2012/stmimpl.rst

[pypy-commit] extradoc extradoc: Update the description (and fix the name of) smp_wmb.

Author: Armin Rigo Branch: extradoc Changeset: r4708:7f7f59125d95 Date: 2012-08-19 12:24 +0200 http://bitbucket.org/pypy/extradoc/changeset/7f7f59125d95/ Log:Update the description (and fix the name of) smp_wmb. diff --git a/talk/stm2012/stmimpl.rst b/talk/stm2012/stmimpl.rst --- a/talk/stm2

[pypy-commit] extradoc extradoc: Another simplification, which more clearly shows that we were missing a

Author: Armin Rigo Branch: extradoc Changeset: r4707:11880043b6c9 Date: 2012-08-19 12:08 +0200 http://bitbucket.org/pypy/extradoc/changeset/11880043b6c9/ Log:Another simplification, which more clearly shows that we were missing a ``smp_wb``. diff --git a/talk/stm2012/stmimpl.rst b/ta

[pypy-commit] extradoc extradoc: Conceptual simplification of the commit model.

Author: Armin Rigo Branch: extradoc Changeset: r4706:845d94e938c7 Date: 2012-08-19 10:37 +0200 http://bitbucket.org/pypy/extradoc/changeset/845d94e938c7/ Log:Conceptual simplification of the commit model. This brings it closer to what we have in code now, and avoids the need

[pypy-commit] extradoc extradoc: Fix: must be an odd value

Author: Armin Rigo Branch: extradoc Changeset: r4705:fde4ddd2f9a0 Date: 2012-08-19 10:12 +0200 http://bitbucket.org/pypy/extradoc/changeset/fde4ddd2f9a0/ Log:Fix: must be an odd value diff --git a/talk/stm2012/stmimpl.rst b/talk/stm2012/stmimpl.rst --- a/talk/stm2012/stmimpl.rst +++ b/talk/s