[pypy-commit] pypy stmgc-c8-dictiter: ready to merge

2015-11-11 Thread arigo
Author: Armin Rigo Branch: stmgc-c8-dictiter Changeset: r80641:a4e036ee9e22 Date: 2015-11-12 07:47 +0100 http://bitbucket.org/pypy/pypy/changeset/a4e036ee9e22/ Log:ready to merge ___ pypy-commit mailing list [email protected] https://mail.pyth

[pypy-commit] pypy stmgc-c8: hg merge stmgc-c8-dictiter

2015-11-11 Thread arigo
Author: Armin Rigo Branch: stmgc-c8 Changeset: r80642:8c3e06db1827 Date: 2015-11-12 07:48 +0100 http://bitbucket.org/pypy/pypy/changeset/8c3e06db1827/ Log:hg merge stmgc-c8-dictiter Iterators over stm dictionaries. diff --git a/pypy/module/pypystm/hashtable.py b/pypy/module/pypystm/

[pypy-commit] pypy numpy-1.10: str(np.dtype('c')) == '|S1', but str(np.dtype('c8') == 'complex64'. Go figure

2015-11-11 Thread mattip
Author: mattip Branch: numpy-1.10 Changeset: r80639:f3c95cf1784f Date: 2015-11-09 19:34 +0200 http://bitbucket.org/pypy/pypy/changeset/f3c95cf1784f/ Log:str(np.dtype('c')) == '|S1', but str(np.dtype('c8') == 'complex64'. Go figure diff --git a/pypy/module/micronumpy/descriptor.py b/

[pypy-commit] pypy numpy-1.10: fix for most all of the 1.10 changes

2015-11-11 Thread mattip
Author: mattip Branch: numpy-1.10 Changeset: r80640:d8f17b92 Date: 2015-11-11 21:34 +0200 http://bitbucket.org/pypy/pypy/changeset/d8f17b92/ Log:fix for most all of the 1.10 changes diff --git a/pypy/module/micronumpy/base.py b/pypy/module/micronumpy/base.py --- a/pypy/module/micronu

[pypy-commit] pypy anntype: Separate more clearly raising links from regular links in flowin()

2015-11-11 Thread rlamy
Author: Ronan Lamy Branch: anntype Changeset: r80638:9ff39582e23f Date: 2015-11-11 18:55 + http://bitbucket.org/pypy/pypy/changeset/9ff39582e23f/ Log:Separate more clearly raising links from regular links in flowin() diff --git a/rpython/annotator/annrpython.py b/rpython/annotator/annrpy

[pypy-commit] pypy default: improvements to bytearray

2015-11-11 Thread fijal
Author: fijal Branch: Changeset: r80637:0ab30523c9ce Date: 2015-11-11 17:35 +0100 http://bitbucket.org/pypy/pypy/changeset/0ab30523c9ce/ Log:improvements to bytearray diff --git a/pypy/objspace/std/bytearrayobject.py b/pypy/objspace/std/bytearrayobject.py --- a/pypy/objspace/std/bytearrayob

[pypy-commit] pypy py3.3: pseudo fix of this test, I would remove it. maybe someone wants to review this test?

2015-11-11 Thread plan_rich
Author: Richard Plangger Branch: py3.3 Changeset: r80635:14fcbf845d84 Date: 2015-11-05 17:49 +0100 http://bitbucket.org/pypy/pypy/changeset/14fcbf845d84/ Log:pseudo fix of this test, I would remove it. maybe someone wants to review this test? diff --git a/pypy/module/imp/test/test_ap

[pypy-commit] pypy s390x-backend: implemented int_mul, int_floordiv, uint_floordiv and int_mod

2015-11-11 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r80634:5a93f832d42a Date: 2015-11-11 15:46 +0100 http://bitbucket.org/pypy/pypy/changeset/5a93f832d42a/ Log:implemented int_mul, int_floordiv, uint_floordiv and int_mod added test case to ensure the correct register allocation

[pypy-commit] pypy s390x-backend: added division opcode, multiply opcode, int32 imm add and sub, started to implement int_mul, int_div.

2015-11-11 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r80632:f7d3b4343ec7 Date: 2015-11-11 10:40 +0100 http://bitbucket.org/pypy/pypy/changeset/f7d3b4343ec7/ Log:added division opcode, multiply opcode, int32 imm add and sub, started to implement int_mul, int_div. for int_mul follo

[pypy-commit] pypy s390x-backend: freed r12 of its burden as a base pointer, saving the pool address (it is known when jumping to a label) to the bridge pool instead of on the stack

2015-11-11 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r80630:a45f6bccf61b Date: 2015-11-05 11:27 +0100 http://bitbucket.org/pypy/pypy/changeset/a45f6bccf61b/ Log:freed r12 of its burden as a base pointer, saving the pool address (it is known when jumping to a label) to the bridge

[pypy-commit] pypy s390x-backend: logical division for ufloor_div, added some methods for to get two registers next to each other from the reg alloc (not yet complete)

2015-11-11 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r80633:6db64d28c955 Date: 2015-11-11 13:08 +0100 http://bitbucket.org/pypy/pypy/changeset/6db64d28c955/ Log:logical division for ufloor_div, added some methods for to get two registers next to each other from the reg alloc (not

[pypy-commit] pypy s390x-backend: label now loads the constant pool when it is entered. the jump back within the same loop (peeled loop does not reload the literal pool, because it is not changed)

2015-11-11 Thread plan_rich
Author: Richard Plangger Branch: s390x-backend Changeset: r80631:45f50d672a78 Date: 2015-11-09 12:07 +0100 http://bitbucket.org/pypy/pypy/changeset/45f50d672a78/ Log:label now loads the constant pool when it is entered. the jump back within the same loop (peeled loop does not reload t