Author: Richard Plangger <planri...@gmail.com>
Branch: ppc-vsx-support
Changeset: r85329:427a2b9a7a9b
Date: 2016-06-22 17:28 +0200
http://bitbucket.org/pypy/pypy/changeset/427a2b9a7a9b/

Log:    added test to check &,| and ^ vector operations, +impl. tests pass

diff --git a/rpython/jit/backend/ppc/vector_ext.py 
b/rpython/jit/backend/ppc/vector_ext.py
--- a/rpython/jit/backend/ppc/vector_ext.py
+++ b/rpython/jit/backend/ppc/vector_ext.py
@@ -47,34 +47,6 @@
         elif itemsize == 8:
             self.mc.lxvd2x(resloc.value, indexloc.value, baseloc.value)
 
-    def dispatch_vector_load(self, size, Vt, index, addr):
-        self.mc.lvx(Vt, index, addr)
-        return
-        if size == 8:
-            self.mc.lvx(Vt, index, addr)
-        elif size == 4:
-            self.mc.lvewx(Vt, index, addr)
-        elif size == 2:
-            self.mc.lvehx(Vt, index, addr)
-        elif size == 1:
-            self.mc.lvehx(Vt, index, addr)
-        else:
-            notimplemented("[ppc/assembler] dispatch vector load of size %d" % 
size)
-
-    def dispatch_vector_store(self, size, Vt, index, addr):
-        self.mc.stvx(Vt, index, addr)
-        return
-        if size == 8:
-            self.mc.stvx(Vt, index, addr)
-        elif size == 4:
-            self.mc.stvewx(Vt, index, addr)
-        elif size == 2:
-            self.mc.stvehx(Vt, index, addr)
-        elif size == 1:
-            self.mc.stvehx(Vt, index, addr)
-        else:
-            notimplemented("[ppc/assembler] dispatch vector load of size %d" % 
size)
-
     def emit_vec_raw_load_i(self, op, arglocs, regalloc):
         resloc, baseloc, indexloc, size_loc, ofs, \
             Vhiloc, Vloloc, Vploc, tloc = arglocs
@@ -225,15 +197,15 @@
         pass # TODO
 
     def emit_vec_int_and(self, op, arglocs, regalloc):
-        resloc, loc0, loc1 = arglocs
+        resloc, loc0, loc1, sizeloc = arglocs
         self.mc.vand(resloc.value, loc0.value, loc1.value)
 
     def emit_vec_int_or(self, op, arglocs, regalloc):
-        resloc, loc0, loc1 = arglocs
+        resloc, loc0, loc1, sizeloc = arglocs
         self.mc.vor(resloc.value, loc0.value, loc1.value)
 
     def emit_vec_int_xor(self, op, arglocs, regalloc):
-        resloc, loc0, loc1 = arglocs
+        resloc, loc0, loc1, sizeloc = arglocs
         self.mc.veqv(resloc.value, loc0.value, loc1.value)
 
     def emit_vec_int_signext(self, op, arglocs, regalloc):
diff --git a/rpython/jit/metainterp/test/test_vector.py 
b/rpython/jit/metainterp/test/test_vector.py
--- a/rpython/jit/metainterp/test/test_vector.py
+++ b/rpython/jit/metainterp/test/test_vector.py
@@ -181,6 +181,27 @@
     test_vector_short_sub = \
         vec_int_arith(lambda a,b: r_int(a)-r_int(b), rffi.SHORT)
 
+    test_vector_signed_and = \
+        vec_int_arith(lambda a,b: intmask(a)&intmask(b), rffi.SIGNED)
+    test_vector_int_and = \
+        vec_int_arith(lambda a,b: intmask(a)&intmask(b), rffi.INT)
+    test_vector_short_and = \
+        vec_int_arith(lambda a,b: intmask(a)&intmask(b), rffi.SHORT)
+
+    test_vector_or_signed = \
+        vec_int_arith(lambda a,b: intmask(a)|intmask(b), rffi.SIGNED)
+    test_vector_or_int = \
+        vec_int_arith(lambda a,b: intmask(a)|intmask(b), rffi.INT)
+    test_vector_or_short = \
+        vec_int_arith(lambda a,b: intmask(a)|intmask(b), rffi.SHORT)
+
+    test_vector_xor_signed = \
+        vec_int_arith(lambda a,b: intmask(a)^intmask(b), rffi.SIGNED)
+    test_vector_xor_int = \
+        vec_int_arith(lambda a,b: intmask(a)^intmask(b), rffi.INT)
+    test_vector_xor_short = \
+        vec_int_arith(lambda a,b: intmask(a)^intmask(b), rffi.SHORT)
+
     @py.test.mark.parametrize('i',[1,2,3,8,17,128,130,131,142,143])
     def test_vectorize_array_get_set(self,i):
         myjitdriver = JitDriver(greens = [],
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