Hi all,
Thought I would chime in since this is also of interest to me. I have two
distinct projects related to hardware simulation, one of which is very well
suited towards the RPython toolchain (Pydgin), and another which is much
more closely related to MyHDL (PyMTL). Sarah kindly pointed out t
Hi,
On Mon, Mar 23, 2015 at 1:00 PM, Henry Gomersall wrote:
> On 23/03/15 12:50, Sarah Mount wrote:
>
>>>
>>> Well, potentially, but the big win is in being allowed a broader range of
>>> >convertible constructs. For example, there is currently no way to handle
>>> >general iterables (only loops
Hi,
2015-03-22 14:45 GMT+01:00 Ludovic Gasc :
> Hi,
>
> I want to try to help PyPy 3, especially to run AsyncIO on PyPy 3.
>
> For now, I've tried to compile PyPy from 3.3 branch, and install AsyncIO.
> I'd an issue with time.monotonic() and time.get_clock_info() in AsyncIO,
> because it isn't im
On 23/03/15 12:50, Sarah Mount wrote:
Well, potentially, but the big win is in being allowed a broader range of
>convertible constructs. For example, there is currently no way to handle
>general iterables (only loops of the form `for i in range(N):` are allowed).
>Clearly, this is very restricti
Hi,
On Mon, Mar 23, 2015 at 12:41 PM, Henry Gomersall wrote:
> On 23/03/15 12:10, Sarah Mount wrote:
>
> Well, users currently _are_ restricted to a small subset of "convertible"
> python. I would suggest this is actually more restrictive than RPython. I
> suppose the question I have is what h
On 23/03/15 12:10, Sarah Mount wrote:
As it happens this is of interest to be, because I may have a use for
MyHDL or something similar in a year or so. However, from this thread
I'm a little confused about where the RPython toolchain would fit in.
Sorry if I'm completely off-base here...
Pres
As it happens this is of interest to be, because I may have a use for MyHDL
or something similar in a year or so. However, from this thread I'm a
little confused about where the RPython toolchain would fit in. Sorry if
I'm completely off-base here...
Presumably you want to keep your Python (2?) fr
On 23/03/15 09:37, Maciej Fijalkowski wrote:
On Mon, Mar 23, 2015 at 10:53 AM, Henry Gomersall wrote:
>On 23/03/15 08:33, Maciej Fijalkowski wrote:
>>
>>I must say we had quite a bit of a discussion and it seems we did not
>>understand what are you trying to achieve. What is the goal of what
>
On Mon, Mar 23, 2015 at 10:53 AM, Henry Gomersall wrote:
> On 23/03/15 08:33, Maciej Fijalkowski wrote:
>>
>> I must say we had quite a bit of a discussion and it seems we did not
>> understand what are you trying to achieve. What is the goal of what
>> you're doing? Translating MyHDL (or verilog)
Thank you very much, Fijal . I read docs of pypy today and I found there
is detailed introduction about test. Sorry for that careless question.
And how about the bug? I don't know which one is beginner-friendly. Or
may I submit a little piece of code about the idea instead of a bug-fixing?
A
On 23/03/15 08:33, Maciej Fijalkowski wrote:
I must say we had quite a bit of a discussion and it seems we did not
understand what are you trying to achieve. What is the goal of what
you're doing? Translating MyHDL (or verilog) to rpython and compiling
it? Something else? Writing the converter it
On 22/03/15 21:45, Ronan Lamy wrote:
My question then regards the following. MyHDL represents certain low
level structures as python objects. For example, there is a notion of a
signal, represented by a Signal object, that has a one to one mapping to
the target HDL language. All the attributes o
Hi Henry.
I must say we had quite a bit of a discussion and it seems we did not
understand what are you trying to achieve. What is the goal of what
you're doing? Translating MyHDL (or verilog) to rpython and compiling
it? Something else? Writing the converter itself in RPython?
Please explain.
C
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