[PATCH v2] linux-aio: add IO_CMD_FDSYNC command support

From: Prasad Pandit Libaio defines IO_CMD_FDSYNC command to sync all outstanding asynchronous I/O operations, by flushing out file data to the disk storage. Enable linux-aio to submit such aio request. This helps to reduce latency induced via pthread_create calls by thread-pool (aio=threads).

[PATCH v6 2/3] backends: Initial support for SPDM socket support

From: Huai-Cheng Kuo SPDM enables authentication, attestation and key exchange to assist in providing infrastructure security enablement. It's a standard published by the DMTF [1]. SPDM supports multiple transports, including PCIe DOE and MCTP. This patch adds support to QEMU to connect to an

[PATCH v6 3/3] hw/nvme: Add SPDM over DOE support

From: Wilfred Mallawa Setup Data Object Exchance (DOE) as an extended capability for the NVME controller and connect SPDM to it (CMA) to it. Signed-off-by: Wilfred Mallawa Signed-off-by: Alistair Francis Reviewed-by: Jonathan Cameron Acked-by: Klaus Jensen --- docs/specs/index.rst|

[PATCH v6 1/3] hw/pci: Add all Data Object Types defined in PCIe r6.0

Add all of the defined protocols/features from the PCIe-SIG r6.0 "Table 6-32 PCI-SIG defined Data Object Types (Vendor ID = 0001h)" table. Signed-off-by: Alistair Francis Reviewed-by: Jonathan Cameron --- include/hw/pci/pcie_doe.h | 2 ++ 1 file changed, 2 insertions(+) diff --git

[PATCH v6 0/3] Initial support for SPDM Responders

The Security Protocol and Data Model (SPDM) Specification defines messages, data objects, and sequences for performing message exchanges over a variety of transport and physical media. - https://www.dmtf.org/sites/default/files/standards/documents/DSP0274_1.3.0.pdf SPDM currently supports PCIe

Re: [PATCH v2 00/10] mirror: allow switching from background to active mode

On Thu, Mar 07, 2024 at 22:42:56 +0300, Vladimir Sementsov-Ogievskiy wrote: > On 04.03.24 14:09, Peter Krempa wrote: > > On Mon, Mar 04, 2024 at 11:48:54 +0100, Kevin Wolf wrote: > > > Am 28.02.2024 um 19:07 hat Vladimir Sementsov-Ogievskiy geschrieben: > > > > On 03.11.23 18:56, Markus Armbruster

Re: [PATCH] hw/ide/ahci: Rename ahci_internal.h to ahci-internal.h

On Tue, 27 Feb 2024, Philippe Mathieu-Daudé wrote: On 27/2/24 14:13, BALATON Zoltan wrote: Other headers now use dash instead of underscore. Rename ahci_internal.h accordingly for consistency. Signed-off-by: BALATON Zoltan --- hw/ide/{ahci_internal.h => ahci-internal.h} | 0 hw/ide/ahci.c

Re: [PATCH 0/2] hw/nvme: fix hibernation-based migration

re/machine.c | 1 + > hw/nvme/ctrl.c| 73 > --- > hw/nvme/nvme.h| 1 + > 3 files changed, 50 insertions(+), 25 deletions(-) > --- > base-commit: f901bf11b3ddf852e591593b09b8aa7a177f9a0b > change-id: 20240310-fix-msix-

[PATCH 0/2] hw/nvme: fix hibernation-based migration

| 1 + 3 files changed, 50 insertions(+), 25 deletions(-) --- base-commit: f901bf11b3ddf852e591593b09b8aa7a177f9a0b change-id: 20240310-fix-msix-exclusive-bar-d65564414a2c Best regards, -- Klaus Jensen

[PATCH 1/2] hw/nvme: generalize the mbar size helper

From: Klaus Jensen Generalize the mbar size helper such that it can handle cases where the MSI-X table and PBA are expected to be in an exclusive bar. Signed-off-by: Klaus Jensen --- hw/nvme/ctrl.c | 26 +++--- 1 file changed, 15 insertions(+), 11 deletions(-) diff --git

[PATCH 2/2] hw/nvme: add machine compatibility parameter to enable msix exclusive bar

From: Klaus Jensen Commit 1901b4967c3f ("hw/block/nvme: move msix table and pba to BAR 0") moved the MSI-X table and PBA to BAR 0 to make room for enabling CMR and PMR at the same time. As reported by Julien Grall in #2184, this breaks migration through system hibernation. Add a machine