Hi Francisco,
On Fri, Dec 11, 2020 at 11:16 PM Francisco Iglesias
wrote:
>
> Hello Bin,
>
> On [2020 Dec 11] Fri 14:07:21, Bin Meng wrote:
> > Hi Francisco,
> >
> > On Fri, Dec 4, 2020 at 7:28 PM Francisco Iglesias
> > wrote:
> > >
> > > Hel
From: Xuzhou Cheng
Auto Address Increment (AAI) Word-Program is a special command of
SST flashes. AAI-WP allows multiple bytes of data to be programmed
without re-issuing the next sequential address location.
Signed-off-by: Xuzhou Cheng
Signed-off-by: Bin Meng
---
Changes in v3
From: Bin Meng
When write is disabled, the write to flash should be avoided
in flash_write8().
Fixes: 82a2499011a7 ("m25p80: Initial implementation of SPI flash device")
Signed-off-by: Bin Meng
---
(no changes since v2)
Changes in v2:
- new patch: honor write enable flag in flash
From: Xuzhou Cheng
Auto Address Increment (AAI) Word-Program is a special command of
SST flashes. AAI-WP allows multiple bytes of data to be programmed
without re-issuing the next sequential address location.
Signed-off-by: Xuzhou Cheng
Signed-off-by: Bin Meng
---
Changes in v2:
- add
From: Bin Meng
When write is disabled, the write to flash should be avoided
in flash_write8().
Fixes: 82a2499011a7 ("m25p80: Initial implementation of SPI flash device")
Signed-off-by: Bin Meng
---
Changes in v2:
- new patch: honor write enable flag in flash write
hw/block/m2
Hi Francisco,
On Thu, Dec 3, 2020 at 8:54 PM Francisco Iglesias
wrote:
>
> Hello Bin,
>
> On [2020 Dec 02] Wed 22:30:37, Bin Meng wrote:
> > From: Xuzhou Cheng
> >
> > Auto Address Increment (AAI) Word-Program is a special command of
> > SST flashes. AAI-WP
Hi Francisco,
On Fri, Dec 4, 2020 at 7:28 PM Francisco Iglesias
wrote:
>
> Hello Bin,
>
> On [2020 Dec 04] Fri 18:52:50, Bin Meng wrote:
> > Hi Francisco,
> >
> > On Fri, Dec 4, 2020 at 6:46 PM Francisco Iglesias
> > wrote:
> > >
> > > Hel
Hi Francisco,
On Fri, Dec 4, 2020 at 6:46 PM Francisco Iglesias
wrote:
>
> Hello Bin,
>
> On [2020 Dec 04] Fri 15:52:12, Bin Meng wrote:
> > Hi Francisco,
> >
> > On Thu, Dec 3, 2020 at 4:38 PM Francisco Iglesias
> > wrote:
> > >
> > > Hi Bi
Hi Francisco,
On Thu, Dec 3, 2020 at 4:38 PM Francisco Iglesias
wrote:
>
> Hi Bin and Alistair,
>
> On [2020 Dec 02] Wed 11:40:11, Alistair Francis wrote:
> > On Sun, Nov 29, 2020 at 6:55 PM Bin Meng wrote:
> > >
> > > From: Bin Meng
> > >
>
Hi Alistair,
On Thu, Dec 3, 2020 at 3:52 AM Alistair Francis wrote:
>
> On Sun, Nov 29, 2020 at 6:55 PM Bin Meng wrote:
> >
> > From: Bin Meng
> >
> > SST flashes require a dummy byte after the address bits.
> >
> > Signed-off-by: Bin Meng
>
> I
From: Xuzhou Cheng
Auto Address Increment (AAI) Word-Program is a special command of
SST flashes. AAI-WP allows multiple bytes of data to be programmed
without re-issuing the next sequential address location.
Signed-off-by: Xuzhou Cheng
Signed-off-by: Bin Meng
---
hw/block/m25p80.c | 17
On Mon, Nov 30, 2020 at 8:55 PM Peter Maydell wrote:
>
> On Mon, 30 Nov 2020 at 12:53, Bin Meng wrote:
> >
> > +Peter,
> >
> > On Tue, Nov 17, 2020 at 6:52 PM Philippe Mathieu-Daudé
> > wrote:
> > >
> > > From: Bin Meng
> > >
>
+Peter,
On Tue, Nov 17, 2020 at 6:52 PM Philippe Mathieu-Daudé wrote:
>
> From: Bin Meng
>
> Per the SD spec, to indicate a 2 GiB card, BLOCK_LEN shall be 1024
> bytes, hence the READ_BL_LEN field in the CSD register shall be 10
> instead of 9.
>
> This fixes the accep
From: Bin Meng
SST flashes require a dummy byte after the address bits.
Signed-off-by: Bin Meng
---
hw/block/m25p80.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index 483925f..9b36762 100644
--- a/hw/block/m25p80.c
+++ b/hw/block/m25p80.c
Hi Niek,
On Wed, Oct 28, 2020 at 3:55 AM Niek Linnenbank
wrote:
>
> Hello Philippe, Bin,
>
> Thanks for your support on this. I've just tried this patch and unfortunately
> it doesn't seem to
> resolve the issue, at least on my machine. This is the output that I get when
> running the avocado t
Hi Philippe,
On Mon, Oct 26, 2020 at 2:56 AM Philippe Mathieu-Daudé wrote:
>
> On 10/25/20 4:23 PM, Bin Meng wrote:
> > From: Bin Meng
> >
> > Per the SD spec, to indicate a 2 GiB card, BLOCK_LEN shall be 1024
> > bytes, hence the READ_BL_LEN field in the CSD regis
From: Bin Meng
Per the SD spec, to indicate a 2 GiB card, BLOCK_LEN shall be 1024
bytes, hence the READ_BL_LEN field in the CSD register shall be 10
instead of 9.
This fixes the acceptance test error for the NetBSD 9.0 test of the
Orange Pi PC that has an expanded SD card image of 2 GiB size
Hi Niek,
On Sun, Oct 25, 2020 at 5:01 AM Niek Linnenbank
wrote:
>
> Hi Philippe,
>
> I have ran this series with the new Armbian 20.08 test and noticed this
> failure:
>
> -console: /dev/mmcblk0p1: The filesystem size (according to the superrandom:
> fast init done
> console: block) is 264192 b
Hi Philippe,
On Sat, Oct 24, 2020 at 3:34 PM Philippe Mathieu-Daudé wrote:
>
> On 10/24/20 3:06 AM, Bin Meng wrote:
> > Hi Philippe,
> >
> > On Sat, Oct 24, 2020 at 1:56 AM Philippe Mathieu-Daudé
> > wrote:
> >>
> >> On 10/23/20 7:42 PM, Bin M
From: Bin Meng
The function selection fields (399:376) should be zeroed out to
prevent leftover from being or'ed into the switch function status
data structure.
This fixes the boot failure as seen in the acceptance testing on
the orangepi target.
Fixes: b638627c723a ("hw/sd: Fix
Hi Philippe,
On Sat, Oct 24, 2020 at 1:56 AM Philippe Mathieu-Daudé wrote:
>
> On 10/23/20 7:42 PM, Bin Meng wrote:
> > Hi Philippe,
> >
> > On Fri, Oct 23, 2020 at 9:18 PM Philippe Mathieu-Daudé
> > wrote:
> >>
> >> Series meant to help Bin
Hi Philippe,
On Fri, Oct 23, 2020 at 9:18 PM Philippe Mathieu-Daudé wrote:
>
> Series meant to help Bin Meng to debug the SD card issue
> reported by Michael Roth.
Thank you for the patches.
>
> Philippe Mathieu-Daudé (4):
> Revert "hw/sd: Fix incorrect populated func
Hi Niek,
On Thu, Oct 22, 2020 at 11:20 PM Niek Linnenbank
wrote:
>
> Hi Bin, Philippe,
>
> If im correct the acceptance tests for orange pi need to be run with a flag
> ARMBIAN_ARTIFACTS_CACHED set that explicitly allows them to be run using the
> armbian mirror. So if you pass that flag on the
Hi Philippe,
On Wed, Oct 21, 2020 at 6:07 PM Philippe Mathieu-Daudé wrote:
>
> On 10/21/20 11:57 AM, Bin Meng wrote:
> > Hi Philippe,
> >
> > On Tue, Oct 20, 2020 at 11:18 PM Philippe Mathieu-Daudé
> > wrote:
> >>
> >> Hi Bin,
> >&
Hi Philippe,
On Tue, Oct 20, 2020 at 11:18 PM Philippe Mathieu-Daudé wrote:
>
> Hi Bin,
>
> On 8/21/20 7:29 PM, Philippe Mathieu-Daudé wrote:
> > From: Bin Meng
> >
> > At present the function switch status data structure bit [399:376]
> > are wrongly pupu
From: Bin Meng
Per the SD spec, Standard Capacity SD Memory Card (SDSC) supports
capacity up to and including 2 GiB.
Fixes: 2d7adea4fe ("hw/sd: Support SDHC size cards")
Signed-off-by: Bin Meng
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Sai Pavan Boddu
---
Changes in v3:
- ad
From: Bin Meng
At present the function switch status data structure bit [399:376]
are wrongly pupulated. These 3 bytes encode function switch status
for the 6 function groups, with 4 bits per group, starting from
function group 6 at bit 399, then followed by function group 5 at
bit 395, and so
Hi Philippe,
On Fri, Aug 21, 2020 at 10:21 PM Philippe Mathieu-Daudé wrote:
>
> Hi Bin,
>
> On 8/21/20 2:54 AM, Bin Meng wrote:
> > Hi Philippe,
> >
> > On Fri, Aug 21, 2020 at 2:04 AM Philippe Mathieu-Daudé
> > wrote:
> >>
> >> Hi Sai P
Hi Sai,
On Fri, Aug 21, 2020 at 6:04 PM Sai Pavan Boddu
wrote:
>
> Hi Philippe,
>
> First two patch of SD look good. Tested them over zynqmp and versal
> platforms.
>
Thanks for testing.
Can I add your Tested-by tag?
Regards,
Bin
Hi Philippe,
On Fri, Aug 21, 2020 at 2:04 AM Philippe Mathieu-Daudé wrote:
>
> Hi Sai Pavan, you said you were interested to test the first 2
> patches. FYI I plan to queue them and send the pull request tomorrow
> or Saturday the latest.
Have you got a chance to review the v2 of 3rd patch?
"hw
> > > On Tue, Aug 18, 2020 at 1:23 AM wrote:
> > >> On 8/17/20 8:28 PM, Alistair Francis wrote:
> > >>> EXTERNAL EMAIL: Do not click links or open attachments unless you know
> > >>> the content is safe
> > >>>
> > >
Hi Anup,
On Sat, Aug 15, 2020 at 1:44 AM Anup Patel wrote:
>
> On Fri, Aug 14, 2020 at 10:12 PM Bin Meng wrote:
> >
> > From: Bin Meng
> >
> > This adds support for Microchip PolarFire SoC Icicle Kit board.
> > The Icicle Kit board integrates a PolarFire
Per the SD spec, Standard Capacity SD Memory Card (SDSC) supports
capacity up to and including 2 GiB.
Fixes: 2d7adea4fe ("hw/sd: Support SDHC size cards")
Signed-off-by: Bin Meng
---
Changes in v2:
- fix SDSC size check in sd_set_csd() too
hw/sd/sd.c | 6 --
1 file changed, 4
so that users
of Cadence SDHCI do not have to do that themselves
- propergate irq and 'sd-bus' from generic-sdhci
Bin Meng (3):
hw/sd: sd: Fix incorrect populated function switch status data
structure
hw/sd: sd: Correct the maximum size of a Standard Capacity SD Memory
Ca
Per the SD spec, Standard Capacity SD Memory Card (SDSC) supports
capacity up to and including 2 GiB.
Fixes: 2d7adea4fe ("hw/sd: Support SDHC size cards")
Signed-off-by: Bin Meng
---
Changes in v2:
- fix SDSC size check in sd_set_csd() too
hw/sd/sd.c | 6 --
1 file changed, 4
Host Register Set (HRS) is
implemented to make guest software happy.
Signed-off-by: Bin Meng
---
Changes in v2:
- use 's' for the model state
- call device_cold_reset() in cadence_sdhci_reset()
- add .impl in cadence_sdhci_ops
- move Cadence specific register defines to cadence_sdh
codes mistakenly fills in the function group 1 status
at bit 399. This fixes the code logic.
Fixes: a1bb27b1e9 ("SD card emulation (initial implementation)")
Signed-off-by: Bin Meng
Reviewed-by: Philippe Mathieu-Daudé
---
Changes in v2:
- remove the pointless zero initialization
hw/s
so that users
of Cadence SDHCI do not have to do that themselves
- propergate irq and 'sd-bus' from generic-sdhci
Bin Meng (3):
hw/sd: sd: Fix incorrect populated function switch status data
structure
hw/sd: sd: Correct the maximum size of a Standard Capacity SD Memory
Ca
codes mistakenly fills in the function group 1 status
at bit 399. This fixes the code logic.
Fixes: a1bb27b1e9 ("SD card emulation (initial implementation)")
Signed-off-by: Bin Meng
Reviewed-by: Philippe Mathieu-Daudé
---
Changes in v2:
- remove the pointless zero initialization
hw/s
Hi Philippe,
On Sat, Aug 15, 2020 at 4:38 PM Philippe Mathieu-Daudé wrote:
>
> On 8/14/20 6:40 PM, Bin Meng wrote:
> > From: Bin Meng
> >
> > Per the SD spec, Standard Capacity SD Memory Card (SDSC) supports
> > capacity up to and including 2 GiB.
> >
>
&g
Hi Philippe,
On Sat, Aug 15, 2020 at 3:51 PM Philippe Mathieu-Daudé wrote:
>
> On 8/14/20 6:40 PM, Bin Meng wrote:
> > From: Bin Meng
> >
> > sdhci_poweron_reset() might be needed for any SDHCI compatible
> > device that is built on top of the generic SDHC
From: Bin Meng
This adds support for Microchip PolarFire SoC Icicle Kit board.
The Icicle Kit board integrates a PolarFire SoC, with one SiFive's
E51 plus four U54 cores and many on-chip peripherals and an FPGA.
For more details about Microchip PolarFire Soc, please see:
From: Bin Meng
sdhci_poweron_reset() might be needed for any SDHCI compatible
device that is built on top of the generic SDHCI device.
Signed-off-by: Bin Meng
---
hw/sd/sdhci-internal.h | 1 +
hw/sd/sdhci.c | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/sd
From: Bin Meng
At present the function switch status data structure bit [399:376]
are wrongly pupulated. These 3 bytes encode function switch status
for the 6 function groups, with 4 bits per group, starting from
function group 6 at bit 399, then followed by function group 5 at
bit 395, and so
From: Bin Meng
Per the SD spec, Standard Capacity SD Memory Card (SDSC) supports
capacity up to and including 2 GiB.
Signed-off-by: Bin Meng
---
hw/sd/sd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 51f5900..5e7fc3f 100644
--- a/hw/sd
301 - 345 of 345 matches
Mail list logo
