Re: [PATCH 7/9] hw/ide/ahci: trigger either error IRQ or regular IRQ, not both

[John Snow]

On Fri, Apr 28, 2023 at 9:23 AM Niklas Cassel  wrote:
>
> From: Niklas Cassel 
>
> According to AHCI 1.3.1, 5.3.8.1 RegFIS:Entry, if ERR_STAT is set,
> we jump to state ERR:FatalTaskfile, which will raise a TFES IRQ
> unconditionally, regardless if the I bit is set in the FIS or not.
>
> Thus, we should never raise a normal IRQ after having sent an error
> IRQ.
>
> Signed-off-by: Niklas Cassel 

ACK - and thanks for the spec pointers.

> ---
>  hw/ide/ahci.c | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
> index 2a59d0e0f5..d88961b4c0 100644
> --- a/hw/ide/ahci.c
> +++ b/hw/ide/ahci.c
> @@ -891,11 +891,10 @@ static bool ahci_write_fis_d2h(AHCIDevice *ad, bool 
> d2h_fis_i)
>  pr->tfdata = (ad->port.ifs[0].error << 8) |
>  ad->port.ifs[0].status;
>
> +/* TFES IRQ is always raised if ERR_STAT is set, regardless of I bit. */
>  if (d2h_fis[2] & ERR_STAT) {
>  ahci_trigger_irq(ad->hba, ad, AHCI_PORT_IRQ_BIT_TFES);
> -}
> -
> -if (d2h_fis_i) {
> +} else if (d2h_fis_i) {
>  ahci_trigger_irq(ad->hba, ad, AHCI_PORT_IRQ_BIT_DHRS);
>  }
>
> --
> 2.40.0
>

[PATCH 7/9] hw/ide/ahci: trigger either error IRQ or regular IRQ, not both

[Niklas Cassel]

From: Niklas Cassel 

According to AHCI 1.3.1, 5.3.8.1 RegFIS:Entry, if ERR_STAT is set,
we jump to state ERR:FatalTaskfile, which will raise a TFES IRQ
unconditionally, regardless if the I bit is set in the FIS or not.

Thus, we should never raise a normal IRQ after having sent an error
IRQ.

Signed-off-by: Niklas Cassel 
---
 hw/ide/ahci.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index 2a59d0e0f5..d88961b4c0 100644
--- a/hw/ide/ahci.c
+++ b/hw/ide/ahci.c
@@ -891,11 +891,10 @@ static bool ahci_write_fis_d2h(AHCIDevice *ad, bool 
d2h_fis_i)
 pr->tfdata = (ad->port.ifs[0].error << 8) |
 ad->port.ifs[0].status;
 
+/* TFES IRQ is always raised if ERR_STAT is set, regardless of I bit. */
 if (d2h_fis[2] & ERR_STAT) {
 ahci_trigger_irq(ad->hba, ad, AHCI_PORT_IRQ_BIT_TFES);
-}
-
-if (d2h_fis_i) {
+} else if (d2h_fis_i) {
 ahci_trigger_irq(ad->hba, ad, AHCI_PORT_IRQ_BIT_DHRS);
 }
 
-- 
2.40.0