Branch: refs/heads/master Home: https://github.com/qemu/qemu Commit: 2ceb3a9e0f2110c7d96134f2db7593609ed50bc2 https://github.com/qemu/qemu/commit/2ceb3a9e0f2110c7d96134f2db7593609ed50bc2 Author: Aurelien Jarno <aurel...@aurel32.net> Date: 2012-09-22 (Sat, 22 Sep 2012)
Changed paths: M tcg/mips/tcg-target.c Log Message: ----------- tcg-mips: fix wrong usage of 'Z' constraint The 'Z' constraint has been introduced to map the zero register. However when the op also accept a constant, there is no point to accept the zero register in addition. Reviewed-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Aurelien Jarno <aurel...@aurel32.net> Commit: 0834c9eac31d6a6780594be17c7b3a3d6403ac16 https://github.com/qemu/qemu/commit/0834c9eac31d6a6780594be17c7b3a3d6403ac16 Author: Aurelien Jarno <aurel...@aurel32.net> Date: 2012-09-22 (Sat, 22 Sep 2012) Changed paths: M tcg/mips/tcg-target.c Log Message: ----------- tcg/mips: kill warnings in user mode Recent versions of GCC emit warnings when compiling user mode targets. Kill them by reordering a bit the #ifdef. Reviewed-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Aurelien Jarno <aurel...@aurel32.net> Commit: 5a0eed379ddff07f1c136c7acedd380b60eecd28 https://github.com/qemu/qemu/commit/5a0eed379ddff07f1c136c7acedd380b60eecd28 Author: Aurelien Jarno <aurel...@aurel32.net> Date: 2012-09-22 (Sat, 22 Sep 2012) Changed paths: M tcg/mips/tcg-target.c Log Message: ----------- tcg/mips: use TCGArg or TCGReg instead of int Instead of int, use the correct TCGArg and TCGReg type: TCGReg when representing a TCG target register, TCGArg when representing the latter or a constant. Reviewed-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Aurelien Jarno <aurel...@aurel32.net> Commit: 3314e0089f1bae4b0430f9bf3299c3b16d6ea32b https://github.com/qemu/qemu/commit/3314e0089f1bae4b0430f9bf3299c3b16d6ea32b Author: Aurelien Jarno <aurel...@aurel32.net> Date: 2012-09-22 (Sat, 22 Sep 2012) Changed paths: M tcg/mips/tcg-target.c Log Message: ----------- tcg/mips: don't use global pointer Don't use the global pointer in TCG, in case helpers try access global variables. Signed-off-by: Aurelien Jarno <aurel...@aurel32.net> Commit: 0d0b53a6708d0ae3ea37828ec6a967d55827ed6d https://github.com/qemu/qemu/commit/0d0b53a6708d0ae3ea37828ec6a967d55827ed6d Author: Aurelien Jarno <aurel...@aurel32.net> Date: 2012-09-22 (Sat, 22 Sep 2012) Changed paths: M tcg/mips/tcg-target.c Log Message: ----------- tcg/mips: use stack for TCG temps Use stack instead of temp_buf array in CPUState for TCG temps. Reviewed-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Aurelien Jarno <aurel...@aurel32.net> Commit: 0f46c064eebc9c93b8f925416e0812cc7b4bb503 https://github.com/qemu/qemu/commit/0f46c064eebc9c93b8f925416e0812cc7b4bb503 Author: Aurelien Jarno <aurel...@aurel32.net> Date: 2012-09-22 (Sat, 22 Sep 2012) Changed paths: M tcg/mips/tcg-target.c Log Message: ----------- tcg/mips: optimize brcond arg, 0 MIPS has some conditional branch instructions when comparing with zero. Use them. Reviewed-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Aurelien Jarno <aurel...@aurel32.net> Commit: c1cf85c9acb847c4871c0b241ced8fabf410d502 https://github.com/qemu/qemu/commit/c1cf85c9acb847c4871c0b241ced8fabf410d502 Author: Aurelien Jarno <aurel...@aurel32.net> Date: 2012-09-22 (Sat, 22 Sep 2012) Changed paths: M tcg/mips/tcg-target.c M tcg/mips/tcg-target.h Log Message: ----------- tcg/mips: optimize bswap{16,16s,32} on MIPS32R2 bswap operations can be optimized on MIPS32 Release 2 using the ROTR, WSBH and SEH instructions. We can't use the non-R2 code to implement the ops due to registers constraints, so don't define the corresponding TCG_TARGET_HAS_bswap* values. Also bswap16* operations are supposed to be called with the 16 high bits zeroed. This is the case everywhere (including for TCG by definition) except when called from the store helper. Remove the AND instructions from bswap16* and move it there. Reviewed-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Aurelien Jarno <aurel...@aurel32.net> Commit: 9a152519a9f767297c92b5840c91a22235295c8d https://github.com/qemu/qemu/commit/9a152519a9f767297c92b5840c91a22235295c8d Author: Aurelien Jarno <aurel...@aurel32.net> Date: 2012-09-22 (Sat, 22 Sep 2012) Changed paths: M tcg/mips/tcg-target.c M tcg/mips/tcg-target.h Log Message: ----------- tcg/mips: implement rotl/rotr ops on MIPS32R2 rotr operations can be optimized on MIPS32 Release 2 using the ROTR and ROTRV instructions. Also implemented rotl operations by subtracting the shift from 32. Reviewed-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Aurelien Jarno <aurel...@aurel32.net> Commit: 04f71aa3fd002d8c3aeb6db72a9219e1a8b3fef4 https://github.com/qemu/qemu/commit/04f71aa3fd002d8c3aeb6db72a9219e1a8b3fef4 Author: Aurelien Jarno <aurel...@aurel32.net> Date: 2012-09-22 (Sat, 22 Sep 2012) Changed paths: M tcg/mips/tcg-target.c M tcg/mips/tcg-target.h Log Message: ----------- tcg/mips: implement deposit op on MIPS32R2 deposit operations can be optimized on MIPS32 Release 2 using the INS instruction. Reviewed-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Aurelien Jarno <aurel...@aurel32.net> Commit: 7d7c4930ab83349ee31945d93a1747331c37c0eb https://github.com/qemu/qemu/commit/7d7c4930ab83349ee31945d93a1747331c37c0eb Author: Aurelien Jarno <aurel...@aurel32.net> Date: 2012-09-22 (Sat, 22 Sep 2012) Changed paths: M tcg/mips/tcg-target.c M tcg/mips/tcg-target.h Log Message: ----------- tcg/mips: implement movcond op on MIPS32R2 movcond operation can be implemented on MIPS32 Release 2 using the MOVN, MOVZ, SLT and SLTU instructions. Reviewed-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Aurelien Jarno <aurel...@aurel32.net> Commit: 48b56ce1683dec02a29448f31861fca4dd0a0b33 https://github.com/qemu/qemu/commit/48b56ce1683dec02a29448f31861fca4dd0a0b33 Author: Aurelien Jarno <aurel...@aurel32.net> Date: 2012-09-22 (Sat, 22 Sep 2012) Changed paths: M tcg/optimize.c Log Message: ----------- tcg/optimize: remove TCG_TEMP_ANY TCG_TEMP_ANY has no different meaning than TCG_TEMP_UNDEF, so use the later instead. Reviewed-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Aurelien Jarno <aurel...@aurel32.net> Commit: b80bb016d8c8e9d74345a90ab6dac1cb547904e0 https://github.com/qemu/qemu/commit/b80bb016d8c8e9d74345a90ab6dac1cb547904e0 Author: Aurelien Jarno <aurel...@aurel32.net> Date: 2012-09-22 (Sat, 22 Sep 2012) Changed paths: M tcg/optimize.c Log Message: ----------- tcg/optimize: check types in copy propagation The copy propagation doesn't check the types of the temps during copy propagation. However TCG is using the mov_i32 for the i64 to i32 conversion and thus the two are not equivalent. With this patch tcg_opt_gen_mov() doesn't consider two temps of different type as copies anymore. So far it seems the optimization was not aggressive enough to trigger this bug, but it will be triggered later in this series once the copy propagation is improved. Reviewed-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Aurelien Jarno <aurel...@aurel32.net> Commit: e590d4e6b3c73b38a9d9ed10c898f73ed8a29f1d https://github.com/qemu/qemu/commit/e590d4e6b3c73b38a9d9ed10c898f73ed8a29f1d Author: Aurelien Jarno <aurel...@aurel32.net> Date: 2012-09-22 (Sat, 22 Sep 2012) Changed paths: M tcg/optimize.c Log Message: ----------- tcg/optimize: rework copy progagation The copy propagation pass tries to keep track what is a copy of what and what has copy of what, and in addition it keep a circular list of of all the copies. Unfortunately this doesn't fully work: a mov from a temp which has a state "COPY" changed it into a state "HAS_COPY". Later when this temp is used again, it is considered has not having copy and thus no propagation is done. This patch fixes that by removing the hiearchy between copies, and thus only keeping a "COPY" state both meaning "is a copy" and "has a copy". The decision of which copy to use is deferred to the actual temp replacement. At this stage there is not one best choice to do, but only better choices than others. For doing the best choice the operation would have to be parsed in reversed to know if a temp is going to be used later or not. That what is done by the liveness analysis. At this stage it is known that globals will be always live, that local temps will be dead at the end of the translation block, and that the temps will be dead at the end of the basic block. This means that this stage should try to replace temps by local temps or globals and local temps by globals. Reviewed-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Aurelien Jarno <aurel...@aurel32.net> Commit: 1ff8c5418a680d6766493908eaa07cc11dce7f13 https://github.com/qemu/qemu/commit/1ff8c5418a680d6766493908eaa07cc11dce7f13 Author: Aurelien Jarno <aurel...@aurel32.net> Date: 2012-09-22 (Sat, 22 Sep 2012) Changed paths: M tcg/optimize.c Log Message: ----------- tcg/optimize: do copy propagation for all operations It is possible to due copy propagation for all operations, even the one that have side effects or clobber arguments (it only concerns input arguments). That said, the call operation should be handled differently due to the variable number of arguments. Reviewed-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Aurelien Jarno <aurel...@aurel32.net> Commit: 0aba1c7376ad325202f328211ab6dfcae94c7f2a https://github.com/qemu/qemu/commit/0aba1c7376ad325202f328211ab6dfcae94c7f2a Author: Aurelien Jarno <aurel...@aurel32.net> Date: 2012-09-22 (Sat, 22 Sep 2012) Changed paths: M tcg/optimize.c Log Message: ----------- tcg/optimize: optimize "op r, a, a => mov r, a" Now that we can easily detect all copies, we can optimize the "op r, a, a => mov r, a" case a bit more. Reviewed-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Aurelien Jarno <aurel...@aurel32.net> Commit: 3c94193e0bbdd855bcbedabd27e3cbe1e6bc6242 https://github.com/qemu/qemu/commit/3c94193e0bbdd855bcbedabd27e3cbe1e6bc6242 Author: Aurelien Jarno <aurel...@aurel32.net> Date: 2012-09-22 (Sat, 22 Sep 2012) Changed paths: M tcg/optimize.c Log Message: ----------- tcg/optimize: optimize "op r, a, a => movi r, 0" Now that it's possible to detect copies, we can optimize the case the "op r, a, a => movi r, 0". This helps in the computation of overflow flags when one of the two args is 0. Reviewed-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Aurelien Jarno <aurel...@aurel32.net> Commit: b336ceb6918b8f9eb54dcbb1043521482c7be83b https://github.com/qemu/qemu/commit/b336ceb6918b8f9eb54dcbb1043521482c7be83b Author: Aurelien Jarno <aurel...@aurel32.net> Date: 2012-09-22 (Sat, 22 Sep 2012) Changed paths: M tcg/optimize.c Log Message: ----------- tcg/optimize: further optimize brcond/movcond/setcond When both argument of brcond/movcond/setcond are the same or when one of the two values is a constant equal to zero, it's possible to do further optimizations. Reviewed-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Aurelien Jarno <aurel...@aurel32.net> Commit: c2b0e2fea2ef7a183233d3b86c37c5d4bcb89544 https://github.com/qemu/qemu/commit/c2b0e2fea2ef7a183233d3b86c37c5d4bcb89544 Author: Aurelien Jarno <aurel...@aurel32.net> Date: 2012-09-22 (Sat, 22 Sep 2012) Changed paths: M tcg/optimize.c Log Message: ----------- tcg/optimize: prefer the "op a, a, b" form for commutative ops The "op a, a, b" form is better handled on non-RISC host than the "op a, b, a" form, so swap the arguments to this form when possible, and when b is not a constant. This reduces the number of generated instructions by a tiny bit. Reviewed-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Aurelien Jarno <aurel...@aurel32.net> Commit: fba3161fd289f1282f5afce5f91c32e2575e5e8e https://github.com/qemu/qemu/commit/fba3161fd289f1282f5afce5f91c32e2575e5e8e Author: Aurelien Jarno <aurel...@aurel32.net> Date: 2012-09-22 (Sat, 22 Sep 2012) Changed paths: M tcg/tcg.c Log Message: ----------- tcg: remove #ifdef #endif around TCGOpcode tests Commit 25c4d9cc changed all TCGOpcode enums to be available, so we don't need to #ifdef #endif the one that are available only on some targets. This makes the code easier to read. Reviewed-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Aurelien Jarno <aurel...@aurel32.net> Commit: 7ef55fc91926f518f905692db19ed0b4a8018989 https://github.com/qemu/qemu/commit/7ef55fc91926f518f905692db19ed0b4a8018989 Author: Aurelien Jarno <aurel...@aurel32.net> Date: 2012-09-22 (Sat, 22 Sep 2012) Changed paths: M tcg/optimize.c Log Message: ----------- tcg/optimize: add constant folding for deposit Reviewed-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Aurelien Jarno <aurel...@aurel32.net> Commit: f0da375754666511acefa89b57487a22a2b9f945 https://github.com/qemu/qemu/commit/f0da375754666511acefa89b57487a22a2b9f945 Author: Richard Henderson <r...@twiddle.net> Date: 2012-09-22 (Sat, 22 Sep 2012) Changed paths: M tcg/hppa/tcg-target.c M tcg/hppa/tcg-target.h Log Message: ----------- tcg-hppa: Implement movcond Signed-off-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Aurelien Jarno <aurel...@aurel32.net> Commit: 9bacf4143190ca57771c8db5981d040f9c625ae5 https://github.com/qemu/qemu/commit/9bacf4143190ca57771c8db5981d040f9c625ae5 Author: Max Filippov <jcmvb...@gmail.com> Date: 2012-09-22 (Sat, 22 Sep 2012) Changed paths: M tcg/README Log Message: ----------- tcg/README: document tcg_gen_goto_tb restrictions See http://lists.nongnu.org/archive/html/qemu-devel/2012-09/msg03196.html for the whole story. Signed-off-by: Max Filippov <jcmvb...@gmail.com> Signed-off-by: Aurelien Jarno <aurel...@aurel32.net> Commit: 1b7621ad99d352629c096cba40eadc6fb2b0c294 https://github.com/qemu/qemu/commit/1b7621ad99d352629c096cba40eadc6fb2b0c294 Author: Stefan Weil <s...@weilnetz.de> Date: 2012-09-22 (Sat, 22 Sep 2012) Changed paths: M tcg/i386/tcg-target.c M tcg/i386/tcg-target.h Log Message: ----------- w64: Fix TCG helper functions with 5 arguments TCG uses 6 registers for function arguments on 64 bit Linux hosts, but only 4 registers on W64 hosts. Commit 2999a0b20074a7e4a58f56572bb1436749368f59 increased the number of arguments for some important helper functions from 4 to 5 which triggered a bug for W64 hosts: QEMU aborts when executing helper_lcall_real in the guest's BIOS because function tcg_target_get_call_iarg_regs_count always returned 6. As W64 has only 4 registers for arguments, the 5th argument must be passed on the stack using a correct stack offset. Signed-off-by: Stefan Weil <s...@weilnetz.de> Signed-off-by: Aurelien Jarno <aurel...@aurel32.net> Commit: b18212c66870f119111e0777fcc19462ae07eb70 https://github.com/qemu/qemu/commit/b18212c66870f119111e0777fcc19462ae07eb70 Author: Stefan Weil <s...@weilnetz.de> Date: 2012-09-22 (Sat, 22 Sep 2012) Changed paths: M tcg/i386/tcg-target.c Log Message: ----------- tcg/i386: Add shortcuts for registers used in L constraint While 64 bit hosts use the first three registers which are also used as function input parameters, 32 bit hosts use TCG_REG_EAX and TCG_REG_EDX which are not used in parameter passing. After defining new register macros for the registers used in L constraint, the patch replaces most occurrences of tcg_target_call_iarg_regs[0], tcg_target_call_iarg_regs[1] and tcg_target_call_iarg_regs[2] by those new macros. tcg_target_call_iarg_regs remains unchanged when it is used for input arguments (only with 64 bit hosts) before tcg_out_calli. A comment related to those registers was fixed, too. Signed-off-by: Stefan Weil <s...@weilnetz.de> [aurel32: build fix on i386, small optimization for i386 in the prologue] Signed-off-by: Aurelien Jarno <aurel...@aurel32.net> Commit: d73685e3c3936fd7851a32eff5443405cb5368be https://github.com/qemu/qemu/commit/d73685e3c3936fd7851a32eff5443405cb5368be Author: Stefan Weil <s...@weilnetz.de> Date: 2012-09-22 (Sat, 22 Sep 2012) Changed paths: M tcg/i386/tcg-target.c Log Message: ----------- tcg/i386: Remove unused registers from tcg_target_call_iarg_regs 32 bit x86 hosts don't need registers for helper function arguments because they use the default stack based calling convention. Removing the registers allows simpler code for function tcg_target_get_call_iarg_regs_count. Signed-off-by: Stefan Weil <s...@weilnetz.de> Signed-off-by: Aurelien Jarno <aurel...@aurel32.net> Commit: 6e17d0c5cdf7b3d0086708ba1d2df931e18cb5b5 https://github.com/qemu/qemu/commit/6e17d0c5cdf7b3d0086708ba1d2df931e18cb5b5 Author: Stefan Weil <s...@weilnetz.de> Date: 2012-09-22 (Sat, 22 Sep 2012) Changed paths: M tcg/arm/tcg-target.c M tcg/hppa/tcg-target.c M tcg/i386/tcg-target.c M tcg/ia64/tcg-target.c M tcg/mips/tcg-target.c M tcg/ppc/tcg-target.c M tcg/ppc64/tcg-target.c M tcg/s390/tcg-target.c M tcg/sparc/tcg-target.c M tcg/tcg.c M tcg/tci/tcg-target.c Log Message: ----------- tcg: Remove tcg_target_get_call_iarg_regs_count The TCG targets no longer need individual implementations. Since commit 6a18ae2d2947532d5c26439548afa0481c4529f9, 'flags' is no longer used in tcg_target_get_call_iarg_regs_count. The remaining tcg_target_get_call_iarg_regs_count is trivial and only called once. Therefore the patch eliminates it completely. Signed-off-by: Stefan Weil <s...@weilnetz.de> Signed-off-by: Aurelien Jarno <aurel...@aurel32.net> Compare: https://github.com/qemu/qemu/compare/cfb75cb98074...6e17d0c5cdf7