Re: [Qemu-devel] QEMU/MIPS dyntick kernel

2007-10-15 Thread Dor Laor
Paul Brook wrote: There seem to have specific problems when using dynticks in Qemu. What I can see is that it makes the PowerPC emulation quite unusable, at least on my PC, which is an amd64 (with a fix CPU frequency), no matter if I run 32 or 64 bits mode. I'd expect to see the same

[Qemu-devel] [PATCH] tlb_flush() fix

2007-10-15 Thread Nguyen Anh Quynh
This patch removes the unused param of tlb_flush() function. diff --git a/cpu-exec.c b/cpu-exec.c index 0f55229..76660e0 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -123,7 +123,7 @@ static TranslationBlock *tb_find_slow(target_ulong pc, tb = tb_alloc(pc); if (!tb) { /* flush

Re: [Qemu-devel] RFC: Code fetch optimisation

2007-10-15 Thread J. Mayer
On Mon, 2007-10-15 at 03:30 +0100, Paul Brook wrote: On Sunday 14 October 2007, J. Mayer wrote: Here's an updated version of the code fetch optimisation patch against current CVS. As a remainder, this patch avoid use of softmmu helpers to fetch the code in most case. A new target define

Re: [Qemu-devel] RFC: reverse-endian softmmu memory accessors

2007-10-15 Thread J. Mayer
On Sun, 2007-10-14 at 15:59 +0300, Blue Swirl wrote: On 10/14/07, J. Mayer [EMAIL PROTECTED] wrote: Here's an updated version of the patch against current CVS. This patches provides reverse-endian, little-endian and big-endian memory accessors, available with and without softmmu. It also

[Qemu-devel] [PATCH] Enable ACPI interrupts.

2007-10-15 Thread Igor Lvovsky
Hi, It was some problem to ACPI interrupts delivering to Windows guests. This patch fixes this problem and enables the ACPI interrupts. According to 82371AB spec. we need to reset the bit 0 of PIRQRCA register to enable interrupt routing. Cheers, Igor Lvovsky

Re: [Qemu-devel] QEMU/MIPS dyntick kernel

2007-10-15 Thread Thiemo Seufer
Aurelien Jarno wrote: Hi, As announced by Ralf Baechle, dyntick is now available on MIPS. I gave a try on QEMU/MIPS, and unfortunately it doesn't work correctly. In some cases the kernel schedules an event very near in the future, which means the timer is scheduled a few cycles only from

Re: [Qemu-devel] QEMU/MIPS dyntick kernel

2007-10-15 Thread Ralf Baechle
On Mon, Oct 15, 2007 at 04:05:14PM +0100, Thiemo Seufer wrote: I found Qemu/MIPS locks up in the emulated kernel's calibrate_delay function. Switching the kernel option off works around the problem. I still haven't patched up the issue which was causing the problem for Aurel. Is the slow

Re: [Qemu-devel] RFC: Code fetch optimisation

2007-10-15 Thread Paul Brook
+unsigned long phys_pc; +unsigned long phys_pc_start; These are ram offsets, not physical addresses. I recommend naming them as such to avoid confusion. Well, those are host addresses. Fabrice even suggested me to replace them with void * to prevent confusion, but I kept

Re: [Qemu-devel] RFC: Code fetch optimisation

2007-10-15 Thread Fabrice Bellard
Paul Brook wrote: [...] The code itself looks ok, though I'd be surprised if it made a significant difference. We're always going to hit the fast-path TLB lookup case anyway. It seems that the generated code for the code fetch is much more efficient than the one generated when we get when

Re: [Qemu-devel] QEMU/MIPS dyntick kernel

2007-10-15 Thread Thiemo Seufer
Ralf Baechle wrote: On Mon, Oct 15, 2007 at 04:05:14PM +0100, Thiemo Seufer wrote: I found Qemu/MIPS locks up in the emulated kernel's calibrate_delay function. Switching the kernel option off works around the problem. I still haven't patched up the issue which was causing the problem

Re: [Qemu-devel] RFC: reverse-endian softmmu memory accessors

2007-10-15 Thread Blue Swirl
On 10/15/07, Blue Swirl [EMAIL PROTECTED] wrote: On 10/15/07, J. Mayer [EMAIL PROTECTED] wrote: On Sun, 2007-10-14 at 15:59 +0300, Blue Swirl wrote: On 10/14/07, J. Mayer [EMAIL PROTECTED] wrote: Here's an updated version of the patch against current CVS. This patches provides

Re: [Qemu-devel] [PATCH] syscall_target_errno.patch

2007-10-15 Thread Thayne Harbaugh
On Thu, 2007-10-11 at 14:10 +0200, J. Mayer wrote: On Wed, 2007-10-10 at 21:38 -0600, Thayne Harbaugh wrote: SNIP I have noticed that many functions in syscall.c return a *host* errno when a *target* errno should be return. At the same time, there are several places in

Re: [Qemu-devel] RFC: reverse-endian softmmu memory accessors

2007-10-15 Thread J. Mayer
On Mon, 2007-10-15 at 19:02 +0300, Blue Swirl wrote: On 10/15/07, J. Mayer [EMAIL PROTECTED] wrote: On Sun, 2007-10-14 at 15:59 +0300, Blue Swirl wrote: On 10/14/07, J. Mayer [EMAIL PROTECTED] wrote: Here's an updated version of the patch against current CVS. This patches provides

Re: [Qemu-devel] RFC: Code fetch optimisation

2007-10-15 Thread J. Mayer
On Mon, 2007-10-15 at 17:01 +0100, Paul Brook wrote: +unsigned long phys_pc; +unsigned long phys_pc_start; These are ram offsets, not physical addresses. I recommend naming them as such to avoid confusion. Well, those are host addresses. Fabrice even suggested me to

Re: [Qemu-devel] RFC: Code fetch optimisation

2007-10-15 Thread Paul Brook
VLE targets (x86, m68k) can translate almost a full page of instructions, and a page boundary can be anywhere within that block. Once we've spanned multiple pages there's not point stopping translation immediately. We may as well translate as many instructions as we can on the second page.

[Qemu-devel] handling SIGWINCH with qemu -nographic

2007-10-15 Thread Jeff Carr
Has anyone looked into finding a way to pass SIGWINCH through to the guest? I started looking at linux-user/signal.c. For those that might not be familiar with SIGWINCH, supporting it would allow qemu -nographic to tell when the terminal is a different size than 80x24.

Re: [Qemu-devel] handling SIGWINCH with qemu -nographic

2007-10-15 Thread Paul Brook
On Tuesday 16 October 2007, Jeff Carr wrote: Has anyone looked into finding a way to pass SIGWINCH through to the guest? I started looking at linux-user/signal.c. For those that might not be familiar with SIGWINCH, supporting it would allow qemu -nographic to tell when the terminal is a