2010/12/8 Isaku Yamahata yamah...@valinux.co.jp:
QLIST_FOREACH_SAFE?
Thanks! So, it should be,
QLIST_FOREACH_SAFE(e, vm_change_state_head, entries, ne) {
e-cb(e-opaque, running, reason);
}
I'll put it in the next spin.
Yoshi
On Thu, Nov 25, 2010 at 03:06:45PM +0900, Yoshiaki Tamura
Hi,
- command line must look like this:
...
-drive if=none,id=usbstick,file=/path/to/image \
-device usb-storage,bus=ehci.0,drive=usbstick
ie. register driver device referencing it, and there was a typo id-if
I'll fix.
- long-term, -usb should become a
Am 08.12.2010 09:18, Gerd Hoffmann wrote:
Hi,
- command line must look like this:
...
-drive if=none,id=usbstick,file=/path/to/image \
-device usb-storage,bus=ehci.0,drive=usbstick
ie. register driver device referencing it, and there was a typo id-if
Hi,
It appears that the import of the ehci code to spice has completely lost
the development history and code contributions - from the original
version by Mark Burkley through the work I've done on it. Would you mind
pulling in the patch history instead of just the final code?
I've first
Am 08.12.2010 09:26, Gerd Hoffmann wrote:
Hi,
It appears that the import of the ehci code to spice has completely lost
the development history and code contributions - from the original
version by Mark Burkley through the work I've done on it. Would you mind
pulling in the patch history
From: Michael S. Tsirkin m...@redhat.com
config write handling for aer seems broken:
For example, it won't clear a level interrupt
when command register is set to 0.
Make it match the spec: level should equal
the logical or of enabled bits, msi only
be sent when the logical or changes.
From: Michael S. Tsirkin m...@redhat.com
Possible now that pci is not depending on these.
Signed-off-by: Michael S. Tsirkin m...@redhat.com
---
Makefile.objs |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/Makefile.objs b/Makefile.objs
index 04625eb..d1e63ce 100644
From: Michael S. Tsirkin m...@redhat.com
Same logic is used to assert interrupts
and send msix messages, so add a static functin for this.
Signed-off-by: Michael S. Tsirkin m...@redhat.com
---
hw/pcie_aer.c | 27 +--
1 files changed, 13 insertions(+), 14 deletions(-)
From: Michael S. Tsirkin m...@redhat.com
Fix the injection logic upon aer message to follow 6.2.4.1.2 more
closely: specifically only send an msi interrupt when the logical or of
the enabled bits changed, not when a bit which was previously clear
becomes set.
Signed-off-by: Michael S. Tsirkin
I respined the patch series by mst for bisectability.
Changes v1 - v2:
- reorder patches for bisectability
- s/assert/trigger/ to avoid name conflict
- abort() instead of assert(0)
Original patch description:
Here are a bunch of fixes and cleanups to aer interrupt injection.
Compile tested only,
From: Michael S. Tsirkin m...@redhat.com
Remove some unused variables and return values.
Signed-off-by: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
changes v1 - v2:
- reorder
---
hw/pcie_aer.c | 25 ++---
1 files changed, 2
Am 07.12.2010 21:36, schrieb Stefan Hajnoczi:
On Tue, Dec 7, 2010 at 5:39 PM, jes.soren...@redhat.com wrote:
// The size for the image must always be specified, with one exception:
// If we are using a backing file, we can obtain the size from there
-if
On Tue, Dec 07, 2010 at 10:55:33AM +0100, Fabien Chouteau wrote:
On 12/06/2010 06:12 PM, Blue Swirl wrote:
On Mon, Dec 6, 2010 at 9:26 AM, Fabien Chouteauchout...@adacore.com
wrote:
Signed-off-by: Fabien Chouteauchout...@adacore.com
---
hw/grlib_gptimer.c | 448
From: Jes Sorensen jes.soren...@redhat.com
This cleans up the handling of image size in img_create() by parsing
the value early, and then only setting it once if a value has been
added as the last argument to the command line.
Signed-off-by: Jes Sorensen jes.soren...@redhat.com
---
qemu-img.c |
On 12/08/10 09:54, Kevin Wolf wrote:
Am 07.12.2010 21:36, schrieb Stefan Hajnoczi:
Today it is possible to create 0 byte sized images. Your patch will
change that:
If there is a backing file, then the size will be taken from the backing
file.
If there is no backing file, then an error
On 12/08/10 10:15, Stefan Hajnoczi wrote:
On Tue, Dec 07, 2010 at 04:02:03PM +0100, Jes Sorensen wrote:
Anything to avoid qemu_set_fd_handler17() at some point. I think using
__qemu_set_fd_handler() encourages people to modify that code rather
than copy it.
I agree that
On Wed, Dec 08, 2010 at 10:17:50AM +0100, Jes Sorensen wrote:
On 12/08/10 10:15, Stefan Hajnoczi wrote:
On Tue, Dec 07, 2010 at 04:02:03PM +0100, Jes Sorensen wrote:
Anything to avoid qemu_set_fd_handler17() at some point. I think using
__qemu_set_fd_handler() encourages people to modify
On 12/08/10 10:23, Stefan Hajnoczi wrote:
From 7.1.3 Reserved identifiers:
All identifiers that begin with an underscore and either an uppercase
letter or another underscore are always reserved for any use.
and
All identifiers that begin with an underscore are always reserved for
use
Am 07.12.2010 10:35, schrieb Stefan Hajnoczi:
This patch series adds a check to validate the backing format before creating
an image file. This ensures we provide a clear error message as early as
possible when an unsupported format is used.
The first three patches clean up code on the way
On 12/08/2010 09:30 AM, Edgar E. Iglesias wrote:
On Tue, Dec 07, 2010 at 10:55:33AM +0100, Fabien Chouteau wrote:
On 12/06/2010 06:12 PM, Blue Swirl wrote:
On Mon, Dec 6, 2010 at 9:26 AM, Fabien Chouteauchout...@adacore.com wrote:
Signed-off-by: Fabien Chouteauchout...@adacore.com
---
On Fri, Dec 3, 2010 at 6:03 PM, Michael Roth mdr...@linux.vnet.ibm.com wrote:
These patches apply to master, and can also be obtained from:
git://repo.or.cz/qemu/mdroth.git virtagent_v5
Why XML-RPC and not QMP? When I skim through the patch series it
seems like much of the work being done is
Am 06.12.2010 20:53, schrieb Christian Brunner:
This is a new version of the rbd driver. The only difference from v8 is
a check for a recent librados version in configure. If the librados version
is too old, rbd support will be disabled.
RBD is an block driver for the distributed file system
ping?
On 25.11.2010, at 08:20, Alexander Graf wrote:
I get a warning on a signed comparison with an unsigned variable, so
let's make the variable signed and be happy.
Signed-off-by: Alexander Graf ag...@suse.de
---
target-ppc/kvm.c |2 +-
1 files changed, 1 insertions(+), 1
The device is only used on big endian systems, but always byte swaps. That's
a very good indicator that it's actually a little endian device ;-).
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/mac_dbdma.c |5 +
1 files changed, 1 insertions(+), 4 deletions(-)
diff --git
This patch replaces explicit bswaps with endianness hints to the
mmio layer.
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/openpic.c | 23 ++-
1 files changed, 2 insertions(+), 21 deletions(-)
diff --git a/hw/openpic.c b/hw/openpic.c
index 9e2500a..6d2cf99 100644
---
As an alternative to the 3 individual handlers, there is also a simplified
io mem hook function. To be consistent, let's add an endianness parameter
there too.
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/apb_pci.c |3 ++-
hw/pci_host.c | 12
hw/unin_pci.c |6 --
There's no need to bswap once we correctly set the mmio to be little endian.
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/unin_pci.c |6 ++
1 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/hw/unin_pci.c b/hw/unin_pci.c
index f2e440e..5f15058 100644
--- a/hw/unin_pci.c
The way we're currently modeling mmio is too simplified. We assume that
every device has the same endianness as the target CPU. In reality,
most devices are little endian (all PCI and ISA ones I'm aware of). Some
are big endian (special system devices) and a very little fraction is
target native
The way mmio endianness is currently implemented is horrifying.
In the real world, CPUs have an endianness and write out data
to the memory bus. Instead of RAM, a receiving side here can be
a device. This device gets a byte stream again and needs to
make sense of it.
Since big endian systems
This patch replaces explicit bswaps with endianness hints to the
mmio layer.
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/versatile_pci.c | 14 +-
1 files changed, 1 insertions(+), 13 deletions(-)
diff --git a/hw/versatile_pci.c b/hw/versatile_pci.c
index 3baad96..cc8f9f8
This patch replaces explicit bswaps with endianness hints to the
mmio layer.
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/ppc_prep.c | 38 +++---
1 files changed, 3 insertions(+), 35 deletions(-)
diff --git a/hw/ppc_prep.c b/hw/ppc_prep.c
index
This patch converts the ISA MMIO bridge code to always use little endian mmio.
All bswap code that existed was only there to convert from native cpu
endianness to little endian ISA devices.
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/bonito.c|4 +-
hw/gt64xxx.c |
The e1000 has compatibility code to handle big endianness which makes it
mandatory to be recompiled on different targets.
With the generic mmio endianness solution, there's no need for that anymore.
We just declare all mmio to be little endian and call it a day.
Because we don't depend on the
The only reason we have bswap versions of the pci host code is that
most pci host devices are little endian. The ppc e500 is the only
odd one here, being big endian.
So let's directly pass the endianness down to the mmio layer and not
worry about it on the pci host layer.
Signed-off-by:
Signed-off-by: Juha Riihimäki juha.riihim...@nokia.com
---
target-arm/helper.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 7cd6a4e..1522022 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -76,6 +76,7 @@
This patch replaces explicit bswaps with endianness hints to the
mmio layer.
Because we don't depend on the target endianness anymore, we can also
move the driver over to Makefile.objs.
Signed-off-by: Alexander Graf ag...@suse.de
---
Makefile.objs |1 +
Makefile.target |3 ---
This patch replaces explicit bswaps with endianness hints to the
mmio layer.
Because we don't depend on the target endianness anymore, we can also
move the driver over to Makefile.objs.
Signed-off-by: Alexander Graf ag...@suse.de
---
Makefile.objs |1 +
Makefile.target |3 ---
This patch replaces explicit bswaps with endianness hints to the
mmio layer.
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/heathrow_pic.c |4 +---
1 files changed, 1 insertions(+), 3 deletions(-)
diff --git a/hw/heathrow_pic.c b/hw/heathrow_pic.c
index 390b63c..b19b754 100644
---
This patch replaces explicit bswaps with endianness hints to the
mmio layer.
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/ppc4xx_pci.c | 17 ++---
1 files changed, 2 insertions(+), 15 deletions(-)
diff --git a/hw/ppc4xx_pci.c b/hw/ppc4xx_pci.c
index f2ecece..f62f1f9 100644
Avi, Marcello,
can you please commit this simple fix? (turning 40 to 80?)
Without it QEMU crashes reliably on our new CPUs (they return 46 leaves)
and causes pain in our testing, because we have to manually apply this
patch on each tree.
Thanks!
Andre.
Currently the number of CPUID leaves
The ARM VMSAv6 emulation does not correctly ignore access protection
checks for manager domain translation table descriptors. This causes
ARM Linux kernel to hang during initialization for ARMv7 CPUs. However
that has so far been hidden by another emulation bug where the cp15
c1 system control
Override access control checks (including execute) for mmu translation
table descriptors assigned to manager domains.
Signed-off-by: Juha Riihimäki juha.riihim...@nokia.com
---
target-arm/helper.c | 34 +++---
1 files changed, 19 insertions(+), 15 deletions(-)
diff
From: Mattias Holm h...@liacs.nl
Signed-off-by: Juha Riihimäki juha.riihim...@nokia.com
---
target-arm/helper.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 5bcfcf7..7cd6a4e 100644
--- a/target-arm/helper.c
+++
New get_fw_dev_path callback will be used for build device path usable
by firmware in contrast to qdev qemu internal device path.
Signed-off-by: Gleb Natapov g...@redhat.com
---
hw/qdev.h |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/hw/qdev.h b/hw/qdev.h
index
Prints out mmio or pio used to access child device.
Signed-off-by: Gleb Natapov g...@redhat.com
---
hw/pci_host.c |2 ++
hw/sysbus.c | 30 ++
hw/sysbus.h |4
3 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/hw/pci_host.c
Signed-off-by: Gleb Natapov g...@redhat.com
---
hw/fw_cfg.c | 14 ++
sysemu.h|1 +
vl.c| 48
3 files changed, 63 insertions(+), 0 deletions(-)
diff --git a/hw/fw_cfg.c b/hw/fw_cfg.c
index 7b9434f..20a816f 100644
Use device ioports to create unique device path.
Signed-off-by: Gleb Natapov g...@redhat.com
---
hw/isa-bus.c | 16
1 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/hw/isa-bus.c b/hw/isa-bus.c
index c0ac7e9..c423c1b 100644
--- a/hw/isa-bus.c
+++ b/hw/isa-bus.c
Add fw_name to DeviceInfo to use in device path building. In
contrast to name fw_name should refer to functionality device
provides instead of particular device model like name does.
Signed-off-by: Gleb Natapov g...@redhat.com
---
hw/fdc.c|1 +
hw/ide/isa.c|1 +
hw/ide/qdev.c
Action that depends on fully initialized device model should register
with this notifier chain.
Signed-off-by: Gleb Natapov g...@redhat.com
---
sysemu.h |2 ++
vl.c | 15 +++
2 files changed, 17 insertions(+), 0 deletions(-)
diff --git a/sysemu.h b/sysemu.h
index
Store all io ports used by device in ISADevice structure.
Signed-off-by: Gleb Natapov g...@redhat.com
---
hw/cs4231a.c |1 +
hw/fdc.c |3 +++
hw/gus.c |4
hw/ide/isa.c |2 ++
hw/isa-bus.c | 25 +
hw/isa.h |4
Extend -option-rom command to have additional parameter ,bootindex=.
Signed-off-by: Gleb Natapov g...@redhat.com
---
hw/loader.c| 16 +++-
hw/loader.h|8
hw/multiboot.c |3 ++-
hw/ne2000.c|2 +-
hw/nseries.c |4 ++--
hw/palm.c |6
Forget to save a couple of buffers before sending version 7 :(
Anthony, Blue can this be applied now?
Gleb Natapov (16):
Introduce fw_name field to DeviceInfo structure.
Introduce new BusInfo callback get_fw_dev_path.
Keep track of ISA ports ISA device is using in qdev.
Add
Ports on root hub will have NULL here. This is needed to reconstruct
path from device to its root hub to build device path.
Signed-off-by: Gleb Natapov g...@redhat.com
---
hw/usb-bus.c |3 ++-
hw/usb-hub.c |2 +-
hw/usb-musb.c |2 +-
hw/usb-ohci.c |2 +-
hw/usb-uhci.c |2 +-
Signed-off-by: Gleb Natapov g...@redhat.com
---
hw/scsi-bus.c | 23 +++
1 files changed, 23 insertions(+), 0 deletions(-)
diff --git a/hw/scsi-bus.c b/hw/scsi-bus.c
index 93f0e9a..7febb86 100644
--- a/hw/scsi-bus.c
+++ b/hw/scsi-bus.c
@@ -5,9 +5,12 @@
#include qdev.h
Signed-off-by: Gleb Natapov g...@redhat.com
---
hw/pci.c | 108 -
1 files changed, 85 insertions(+), 23 deletions(-)
diff --git a/hw/pci.c b/hw/pci.c
index 0c15b13..e7ea907 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -43,6 +43,7 @@
Signed-off-by: Gleb Natapov g...@redhat.com
---
hw/ide/cmd646.c |4 ++--
hw/ide/internal.h |3 ++-
hw/ide/isa.c |2 +-
hw/ide/piix.c |4 ++--
hw/ide/qdev.c |3 ++-
hw/ide/via.c |4 ++--
6 files changed, 11 insertions(+), 9 deletions(-)
diff --git
Signed-off-by: Gleb Natapov g...@redhat.com
---
hw/ide/qdev.c | 13 +
1 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/hw/ide/qdev.c b/hw/ide/qdev.c
index 88ff657..01a181b 100644
--- a/hw/ide/qdev.c
+++ b/hw/ide/qdev.c
@@ -24,9 +24,12 @@
/*
If bootindex is specified on command line a string that describes device
in firmware readable way is added into sorted list. Later this list will
be passed into firmware to control boot order.
Signed-off-by: Gleb Natapov g...@redhat.com
---
block_int.h |4 +++-
hw/e1000.c |4
On 6 December 2010 17:07, Peter Maydell peter.mayd...@linaro.org wrote:
(regarding my random-instruction-sequence testing tool)
(I really must get round to writing the README and sticking it
in a public git repo.)
The curious can find it here:
Change fw_cfg_add_file() to get full file path as a parameter instead
of building one internally. Two reasons for that. First caller may need
to know how file is named. Second this moves policy of file naming out
from fw_cfg. Platform may want to use more then two levels of
directories for
Signed-off-by: Gleb Natapov g...@redhat.com
---
hw/usb-bus.c | 42 ++
1 files changed, 42 insertions(+), 0 deletions(-)
diff --git a/hw/usb-bus.c b/hw/usb-bus.c
index 256b881..8b4583c 100644
--- a/hw/usb-bus.c
+++ b/hw/usb-bus.c
@@ -5,11 +5,13 @@
We need a PCI ID for our new AHCI adapter. I just picked an ICH-7M
because that's the one built into the first Macbooks.
This patch adds a PCI ID define for an ICH-7 AHCI adapter.
Signed-off-by: Alexander Graf ag...@suse.de
---
v3 - v4:
- add ICH7 instead of ICH7M (herbszt)
v4 - v5:
-
This patch enables AHCI for all machines supporting PCI.
Signed-off-by: Alexander Graf ag...@suse.de
---
default-configs/pci.mak |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/default-configs/pci.mak b/default-configs/pci.mak
index d700b3c..0471efb 100644
---
From: Roland Elek elek.rol...@gmail.com
I modified ide_identify() to include the zero-based queue length
value in word 75, and set bit 8 in word 76 to signal NCQ support
in the identify data for AHCI SATA drives.
Signed-off-by: Roland Elek elek.rol...@gmail.com
---
hw/ide/core.c |7
From: Sebastian Herbszt herb...@gmx.de
Set SATA Mode Select to AHCI in the Address Map Register.
Signed-off-by: Sebastian Herbszt herb...@gmx.de
---
hw/ide/ahci.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index 7e7aa89..2ef03ed
From: Sebastian Herbszt herb...@gmx.de
Set pci revision id to 0x01.
Signed-off-by: Sebastian Herbszt herb...@gmx.de
---
hw/ide/ahci.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index 2ef03ed..fdfc011 100644
--- a/hw/ide/ahci.c
+++
On 12/08/2010 01:13 PM, Andre Przywara wrote:
Avi, Marcello,
can you please commit this simple fix? (turning 40 to 80?)
Without it QEMU crashes reliably on our new CPUs (they return 46
leaves) and causes pain in our testing, because we have to manually
apply this patch on each tree.
Sorry
The IDE core doesn't care about BMDMA blocking IRQs from getting submitted,
so let's reflect that in the code and make IRQ blocking fully transparent.
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/ide/core.c |6 --
hw/ide/internal.h |4 ++--
hw/ide/pci.c | 44
Every device that can do PCI should also be able to do IDE. So let's move
the IDE definitions over to pci.mak.
Signed-off-by: Alexander Graf ag...@suse.de
---
default-configs/arm-softmmu.mak |1 -
default-configs/i386-softmmu.mak |3 ---
default-configs/mips-softmmu.mak |
The bmdma header definitions currently reside in generic code, but only PCI
specific code should know about BMDMA internals. So let's move the definitions
and everything using them out to pci.h.
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/ide/internal.h | 27 ---
The ATA command interpretation code can be used for PATA and SATA
interfaces alike. So let's split it out into a separate function.
Signed-off-by: Alexander Graf ag...@suse.de
---
v6 - v7:
- use bus instead of opaque (stefanha)
---
hw/ide/core.c | 20 ++--
This patch adds support for AHCI emulation. I have tested and verified it works
in Linux, OpenBSD, Windows Vista and Windows 7. This AHCI emulation supports
NCQ, so multiple read or write requests can be outstanding at the same time.
The code is however not fully optimized yet. I'm fairly sure
On 12/01/2010 02:55 PM, Andre Przywara wrote:
Avi Kivity wrote:
On 12/01/2010 01:17 PM, Andre Przywara wrote:
Currently the number of CPUID leaves KVM handles is limited to 40.
My desktop machine (AthlonII) already has 35 and future CPUs will
expand this well beyond the limit. Extend the limit
This patch adds the storage sata class id.
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/pci_ids.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/hw/pci_ids.h b/hw/pci_ids.h
index 82cba7e..ea3418c 100644
--- a/hw/pci_ids.h
+++ b/hw/pci_ids.h
@@ -15,6 +15,7 @@
Now that we have the function split out, we have to reindent it.
In order to increase the readability of the actual functional change,
this is split out.
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/ide/core.c | 734
1 files
The ATA core is currently heavily intertwined with BMDMA code. Let's loosen
that a bit, so we can happily replace the DMA backend with different
implementations.
Signed-off-by: Alexander Graf ag...@suse.de
---
v7 - v8:
- rewrite as DMA ops
---
hw/ide/cmd646.c |6 +-
hw/ide/core.c
This patch adds an emulation layer for an ICH-7M AHCI controller. For now
this controller does not do IDE legacy emulation. It is a pure AHCI controller.
Signed-off-by: Alexander Graf ag...@suse.de
---
v1 - v2:
- rename IDEExtender to IDEBusOps and make a pointer (kraxel)
- make dma hooks
Signed-off-by: Paolo Bonzini pbonz...@redhat.com
---
I had this patch lying around but I don't think I ever got
qruncom to work completely.
Makefile.target |3 ++
tests/Makefile |7 ++--
tests/qruncom.c | 93 +++---
3
Sure. My proposal is for qemu_chr_write() to succeed all the time. If
the backend can block, and the caller can handle it, it can get a
-EAGAIN (or WSAEWOULDBLOCK) return. When the backend becomes writable,
the chardev can call the -writes_unblocked() callback for that caller.
On Wed, Dec 8, 2010 at 12:13 PM, Alexander Graf ag...@suse.de wrote:
The ATA command interpretation code can be used for PATA and SATA
interfaces alike. So let's split it out into a separate function.
Signed-off-by: Alexander Graf ag...@suse.de
---
v6 - v7:
- use bus instead of opaque
On Wed, Dec 8, 2010 at 12:13 PM, Alexander Graf ag...@suse.de wrote:
Now that we have the function split out, we have to reindent it.
In order to increase the readability of the actual functional change,
this is split out.
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/ide/core.c |
On 12/08/2010 02:11 AM, Yoshiaki Tamura wrote:
2010/12/8 Isaku Yamahatayamah...@valinux.co.jp:
QLIST_FOREACH_SAFE?
Thanks! So, it should be,
QLIST_FOREACH_SAFE(e,vm_change_state_head, entries, ne) {
e-cb(e-opaque, running, reason);
}
I'll put it in the next spin.
This is
Hi list
I got confused after observing that there is no support for VirtIO
block devices in Seabios supplied with Qemu-0.12.3. But still it can
accept a VirtIO disk as a bootable device and perfectly boots from it.
Then How it's done?
But I can see the VirtIO block device code in Seabios source
On (Wed) Dec 08 2010 [12:56:33], Paul Brook wrote:
Sure. My proposal is for qemu_chr_write() to succeed all the time. If
the backend can block, and the caller can handle it, it can get a
-EAGAIN (or WSAEWOULDBLOCK) return. When the backend becomes writable,
the chardev can call
On 12/08/2010 03:15 AM, Stefan Hajnoczi wrote:
On Tue, Dec 07, 2010 at 04:02:03PM +0100, Jes Sorensen wrote:
On 12/07/10 15:48, Michael Roth wrote:
On 12/07/2010 07:31 AM, Jes Sorensen wrote:
On 12/03/10 19:03, Michael Roth wrote:
I am not happy with this addition of numbers
On Wed, Dec 8, 2010 at 12:13 PM, Alexander Graf ag...@suse.de wrote:
@@ -486,8 +440,8 @@ void ide_dma_error(IDEState *s)
ide_transfer_stop(s);
s-error = ABRT_ERR;
s-status = READY_STAT | ERR_STAT;
- ide_dma_set_inactive(s-bus-bmdma);
- s-bus-bmdma-status |= BM_STATUS_INT;
2010/12/8 अनुज anu...@gmail.com:
Hi list
I got confused after observing that there is no support for VirtIO
block devices in Seabios supplied with Qemu-0.12.3. But still it can
accept a VirtIO disk as a bootable device and perfectly boots from it.
Then How it's done?
But I can see the
On 08.12.2010, at 15:26, Stefan Hajnoczi wrote:
On Wed, Dec 8, 2010 at 12:13 PM, Alexander Graf ag...@suse.de wrote:
@@ -486,8 +440,8 @@ void ide_dma_error(IDEState *s)
ide_transfer_stop(s);
s-error = ABRT_ERR;
s-status = READY_STAT | ERR_STAT;
-
Am 08.12.2010 15:26, schrieb Stefan Hajnoczi:
On Wed, Dec 8, 2010 at 12:13 PM, Alexander Graf ag...@suse.de wrote:
@@ -486,8 +440,8 @@ void ide_dma_error(IDEState *s)
ide_transfer_stop(s);
s-error = ABRT_ERR;
s-status = READY_STAT | ERR_STAT;
-
On Wed, Dec 8, 2010 at 2:35 PM, Kevin Wolf kw...@redhat.com wrote:
Am 08.12.2010 15:26, schrieb Stefan Hajnoczi:
On Wed, Dec 8, 2010 at 12:13 PM, Alexander Graf ag...@suse.de wrote:
@@ -486,8 +440,8 @@ void ide_dma_error(IDEState *s)
ide_transfer_stop(s);
s-error = ABRT_ERR;
Am 08.12.2010 15:40, schrieb Stefan Hajnoczi:
On Wed, Dec 8, 2010 at 2:35 PM, Kevin Wolf kw...@redhat.com wrote:
Am 08.12.2010 15:26, schrieb Stefan Hajnoczi:
On Wed, Dec 8, 2010 at 12:13 PM, Alexander Graf ag...@suse.de wrote:
@@ -486,8 +440,8 @@ void ide_dma_error(IDEState *s)
Am 08.12.2010 13:13, schrieb Alexander Graf:
Now that we have the function split out, we have to reindent it.
In order to increase the readability of the actual functional change,
this is split out.
Signed-off-by: Alexander Graf ag...@suse.de
This patch adds some trailing whitespace. Can
2010/12/8 अनुज anu...@gmail.com:
Hi
thanks for your quick response. Please see the comments inline.
2010/12/8 Stefan Hajnoczi stefa...@gmail.com:
2010/12/8 अनुज anu...@gmail.com:
Hi list
I got confused after observing that there is no support for VirtIO
block devices in Seabios supplied
Hi...
On Tue, Dec 7, 2010 at 18:43, John Vele jve...@gmail.com wrote:
Grettings,
I am using user mode qemu for running stand-alone i386 binaries in linux.
What I want to do is this:
I want to run a binary until it ends, but I don't want qemu-i386 to exit
(that is what
it does normally)
2010/12/8 Stefan Hajnoczi stefa...@gmail.com:
2010/12/8 अनुज anu...@gmail.com:
Hi
thanks for your quick response. Please see the comments inline.
2010/12/8 Stefan Hajnoczi stefa...@gmail.com:
2010/12/8 अनुज anu...@gmail.com:
Hi list
I got confused after observing that there is no support
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