On Sat, Feb 12, 2011 at 12:45 AM, Michael Walle mich...@walle.cc wrote:
Am Freitag 11 Februar 2011, 21:41:14 schrieb Blue Swirl:
+Special instructions
+
+The translation recognizes one special instruction to halt the cpu:
+ and r0, r0, r0
+On real hardware this
On Sat, Feb 12, 2011 at 12:27 AM, Andi Kleen a...@linux.intel.com wrote:
I don't have any problems running a statically linked x86_64
helloworld program in an i386 chroot. Dynamically linked programs try
to use wrong libraries, but at least running
/lib64/ld-linux-x86-64.so.2 directly works.
hiI want to run MIPS64 system mode emulation. for this purpose I need kernel
image and initrd. from where I can get these two things?? same question is for
Magnum system mode emulation
Regards
Public bug reported:
When ungrabbing with CTRL-ALT, the host OS mouse cursor should be warped
at the location it was inside the guest OS for better user experience.
The same should be done with grabbing, when the window is clicked and
the focus grabbed from the host OS, the mouse should be
Am Freitag 11 Februar 2011, 22:42:28 schrieb Blue Swirl:
+/* Convenient binary macros */
+#define HEX__(n) 0x##n##LU
+#define B8__(x) (((x0x000FLU) ? 1 : 0) \
+ + ((x0x00F0LU) ? 2 : 0) \
+ + ((x0x0F00LU) ? 4 : 0) \
+ +
On Sat, Feb 12, 2011 at 01:29:47AM -0800, maheen butt wrote:
hiI want to run MIPS64 system mode emulation. for this purpose I need kernel
image and initrd. from where I can get these two things?? same question is
for Magnum system mode emulation
You don't necessarily needs an initrd, as
QEMU has no way to know where the mouse pointer is located in the guest.
For that you have to use the tablet which uses absolute positions
instead, by passing -usbdevice tablet on the command line.
** Changed in: qemu
Status: New = Invalid
--
You received this bug notification because
This patch series adds a pseries machine to qemu, allowing it to
emulate IBM pSeries logical partitions. Along the way we add a bunch
of support for more modern ppc CPUs than are currently supported. It
also makes some significant cleanups to the translation code for hash
page table based ppc
Add the etags generated output file and editor backup files to
.gitignore.
Signed-off-by: David Gibson da...@gibson.dropbear.id.au
---
.gitignore |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/.gitignore b/.gitignore
index 26703e1..1d79680 100644
--- a/.gitignore
+++
From: David Gibson d...@au1.ibm.com
For a 64-bit PowerPC target, qemu correctly implements translation
through the segment lookaside buffer. Likewise it supports the
slbmte instruction which is used to load entries into the SLB.
However, it does not emulate the slbmfee and slbmfev instructions
The slb_lookup() function, used in the ppc translation path returns a
number of slb entry fields in reference parameters. However, only one
of the two callers of slb_lookup() actually wants this information.
This patch, therefore, makes slb_lookup() return a simple pointer to the
located SLB
From: David Gibson d...@au1.ibm.com
Currently qemu_devtree_setprop() expects the new property value to be
given as a uint32_t *. While property values consisting of u32s are
common, in general they can have any bytestring value.
Therefore, this patch alters the function to take a void *
From: David Gibson d...@au1.ibm.com
qemu already includes support for the popcntb instruction introduced
in POWER5 (although it doesn't actually allow you to choose POWER5).
However, the logic is slightly incorrect: it will generate results
truncated to 32-bits when the CPU is in 32-bit mode.
From: David Gibson d...@au1.ibm.com
PowerPC and POWER chips since the POWER4 and 970 have a special
hypervisor mode, and a corresponding form of the system call
instruction which traps to the hypervisor.
qemu currently has stub implementations of hypervisor mode. That
is, the outline is there
Currently the SLB information when emulating a PowerPC 970 is
storeed in a structure with the unhelpfully named fields 'tmp'
and 'tmp64'. While the layout in these fields does match the
description of the SLB in the architecture document, it is not
convenient either for looking up the SLB, or for
From: David Gibson d...@au1.ibm.com
The PURR (Processor Utilization Resource Register) is a register found
on recent POWER CPUs. The guts of implementing it at least enough to
get by are already present in qemu, however some of the helper
functions needed to actually wire it up are missing.
Currently, get_segment() has a variable called hash. However it doesn't
(quite) get the hash value for the ppc hashed page table. Instead it
gets the hash shifted - effectively the offset of the hash bucket within
the hash page table.
As well, as being different to the normal use of plain hash
Currently the path handling hash page table translation in get_segment()
has a mix of common and 32 or 64 bit specific code. However the
division is not done terribly well which results in a lot of messy code
flipping between common and divided paths.
This patch improves the organization,
On ppc machines with hash table MMUs, the special purpose register SDR1
contains both the base address of the encoded size (hashed) page tables.
At present, we interpret the SDR1 value within the address translation
path. But because the encodings of the size for 32-bit and 64-bit are
different
Traditionally, the segments used for the two-stage translation used on
powerpc MMUs were 256MB in size. This was the only option on all hash
page table based 32-bit powerpc cpus, and on the earlier 64-bit hash page
table based cpus. However, newer 64-bit cpus also permit 1TB segments
This patch
This adds emulation support for the recent POWER7 cpu to qemu. It's far
from perfect - it's missing a number of POWER7 features so far, including
any support for VSX or decimal floating point instructions. However, it's
close enough to boot a kernel with the POWER7 PVR.
Signed-off-by: David
This patch adds a pseries machine to qemu. This aims to emulate a
logical partition on an IBM pSeries machine, compliant to the
PowerPC Architecture Platform Requirements (PAPR) document.
This initial version is quite limited, it implements a basic machine
and PAPR hypercall emulation. So far
On 12.02.2011, at 15:54, David Gibson wrote:
From: David Gibson d...@au1.ibm.com
Currently qemu_devtree_setprop() expects the new property value to be
given as a uint32_t *. While property values consisting of u32s are
common, in general they can have any bytestring value.
Therefore,
On 12.02.2011, at 15:54, David Gibson wrote:
From: David Gibson d...@au1.ibm.com
PowerPC and POWER chips since the POWER4 and 970 have a special
hypervisor mode, and a corresponding form of the system call
instruction which traps to the hypervisor.
qemu currently has stub
This extends the pseries (PAPR) machine to include a virtual IO bus
supporting the PAPR defined hypercall based virtual IO mechanisms.
So far only one VIO device is provided, the vty / vterm, providing
a full console (polled only, for now).
Signed-off-by: David Gibson d...@au1.ibm.com
---
On 12.02.2011, at 15:54, David Gibson wrote:
Currently the SLB information when emulating a PowerPC 970 is
storeed in a structure with the unhelpfully named fields 'tmp'
and 'tmp64'. While the layout in these fields does match the
description of the SLB in the architecture document, it is
On 12.02.2011, at 15:54, David Gibson wrote:
From: David Gibson d...@au1.ibm.com
The PURR (Processor Utilization Resource Register) is a register found
on recent POWER CPUs. The guts of implementing it at least enough to
get by are already present in qemu, however some of the helper
On 12.02.2011, at 15:54, David Gibson wrote:
From: David Gibson d...@au1.ibm.com
qemu already includes support for the popcntb instruction introduced
in POWER5 (although it doesn't actually allow you to choose POWER5).
However, the logic is slightly incorrect: it will generate results
On 12.02.2011, at 15:54, David Gibson wrote:
The slb_lookup() function, used in the ppc translation path returns a
number of slb entry fields in reference parameters. However, only one
of the two callers of slb_lookup() actually wants this information.
This patch, therefore, makes
On 12.02.2011, at 15:54, David Gibson wrote:
From: David Gibson d...@au1.ibm.com
For a 64-bit PowerPC target, qemu correctly implements translation
through the segment lookaside buffer. Likewise it supports the
slbmte instruction which is used to load entries into the SLB.
However, it
On 12.02.2011, at 15:54, David Gibson wrote:
On ppc machines with hash table MMUs, the special purpose register SDR1
contains both the base address of the encoded size (hashed) page tables.
At present, we interpret the SDR1 value within the address translation
path. But because the
On 12.02.2011, at 15:54, David Gibson wrote:
Currently, get_segment() has a variable called hash. However it doesn't
(quite) get the hash value for the ppc hashed page table. Instead it
gets the hash shifted - effectively the offset of the hash bucket within
the hash page table.
As
On 12.02.2011, at 15:54, David Gibson wrote:
Currently the path handling hash page table translation in get_segment()
has a mix of common and 32 or 64 bit specific code. However the
division is not done terribly well which results in a lot of messy code
flipping between common and divided
On 12.02.2011, at 15:54, David Gibson wrote:
Traditionally, the segments used for the two-stage translation used on
powerpc MMUs were 256MB in size. This was the only option on all hash
page table based 32-bit powerpc cpus, and on the earlier 64-bit hash page
table based cpus. However,
On 12.02.2011, at 15:54, David Gibson wrote:
This adds emulation support for the recent POWER7 cpu to qemu. It's far
from perfect - it's missing a number of POWER7 features so far, including
any support for VSX or decimal floating point instructions. However, it's
close enough to boot a
On 12.02.2011, at 15:54, David Gibson wrote:
This patch adds a pseries machine to qemu. This aims to emulate a
logical partition on an IBM pSeries machine, compliant to the
PowerPC Architecture Platform Requirements (PAPR) document.
This initial version is quite limited, it implements a
Hi,
Do you plan to boot AIX in one of these partitions ?
Regards,
Laurent
David Gibson da...@gibson.dropbear.id.au a écrit :
This patch series adds a pseries machine to qemu, allowing it to
emulate IBM pSeries logical partitions. Along the way we add a bunch
of support for more modern ppc
On Sat, Feb 12, 2011 at 6:23 PM, Alexander Graf ag...@suse.de wrote:
On 12.02.2011, at 15:54, David Gibson wrote:
This patch adds a pseries machine to qemu. This aims to emulate a
logical partition on an IBM pSeries machine, compliant to the
PowerPC Architecture Platform Requirements (PAPR)
On 12.02.2011, at 15:54, David Gibson wrote:
This extends the pseries (PAPR) machine to include a virtual IO bus
supporting the PAPR defined hypercall based virtual IO mechanisms.
So far only one VIO device is provided, the vty / vterm, providing
a full console (polled only, for now).
Blue Swirl blauwir...@gmail.com writes:
Allow failure with vmware_vga device creation and use standard
VGA instead.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/mips_malta.c |6 +-
hw/pc.c | 11 ---
hw/vmware_vga.h | 11 +--
3 files changed,
Blue Swirl blauwir...@gmail.com writes:
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/pc.h |1 -
hw/pc_piix.c |2 --
hw/vmport.c | 24 +---
3 files changed, 21 insertions(+), 6 deletions(-)
diff --git a/hw/pc.h b/hw/pc.h
index a048768..603a2a3
On Sat, Feb 12, 2011 at 6:47 PM, Alexander Graf ag...@suse.de wrote:
On 12.02.2011, at 15:54, David Gibson wrote:
This extends the pseries (PAPR) machine to include a virtual IO bus
supporting the PAPR defined hypercall based virtual IO mechanisms.
So far only one VIO device is provided,
You have a choice today!
We are an experienced company, who will give you a big chance!
How many days and hours should you spend at the university?
Yes�it is too long!
We offer you the way much better!
100% verified Degree: Bachelors, Masters and Doctorate (PHD).
Our professionals will answer to
On Sat, Feb 12, 2011 at 6:48 PM, Markus Armbruster arm...@redhat.com wrote:
Blue Swirl blauwir...@gmail.com writes:
Allow failure with vmware_vga device creation and use standard
VGA instead.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/mips_malta.c | 6 +-
hw/pc.c
Blue Swirl blauwir...@gmail.com writes:
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/pci.c | 20
hw/pci.h |4
2 files changed, 24 insertions(+), 0 deletions(-)
diff --git a/hw/pci.c b/hw/pci.c
index d5bbba9..5e6e216 100644
--- a/hw/pci.c
+++
Blue Swirl blauwir...@gmail.com writes:
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/qdev.c | 14 +-
hw/qdev.h |1 +
2 files changed, 14 insertions(+), 1 deletions(-)
diff --git a/hw/qdev.c b/hw/qdev.c
index c7fec44..1aa1ea0 100644
--- a/hw/qdev.c
+++
Blue Swirl blauwir...@gmail.com writes:
Convert to qdev, also add a proper reset function.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/pc.c |5 +++--
hw/pc.h |3 ---
hw/vmmouse.c | 37 +
3 files changed, 32 insertions(+),
Blue Swirl blauwir...@gmail.com writes:
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/isa-bus.c | 12
hw/isa.h |1 +
2 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/hw/isa-bus.c b/hw/isa-bus.c
index 0cb1afb..6f349a5 100644
--- a/hw/isa-bus.c
On Sat, Feb 12, 2011 at 6:57 PM, Markus Armbruster arm...@redhat.com wrote:
Blue Swirl blauwir...@gmail.com writes:
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/pc.h | 1 -
hw/pc_piix.c | 2 --
hw/vmport.c | 24 +---
3 files changed, 21
Blue Swirl blauwir...@gmail.com writes:
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/sysbus.c | 31 +++
hw/sysbus.h |9 +
2 files changed, 40 insertions(+), 0 deletions(-)
diff --git a/hw/sysbus.c b/hw/sysbus.c
index 1583bd8..8980f34
On Sat, Feb 12, 2011 at 7:03 PM, Markus Armbruster arm...@redhat.com wrote:
Blue Swirl blauwir...@gmail.com writes:
Convert to qdev, also add a proper reset function.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/pc.c | 5 +++--
hw/pc.h | 3 ---
hw/vmmouse.c |
On Sat, Feb 12, 2011 at 7:15 PM, Markus Armbruster arm...@redhat.com wrote:
Blue Swirl blauwir...@gmail.com writes:
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/sysbus.c | 31 +++
hw/sysbus.h | 9 +
2 files changed, 40 insertions(+), 0
On Sat, Feb 12, 2011 at 7:10 PM, Markus Armbruster arm...@redhat.com wrote:
Blue Swirl blauwir...@gmail.com writes:
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/qdev.c | 14 +-
hw/qdev.h | 1 +
2 files changed, 14 insertions(+), 1 deletions(-)
diff --git
On 2/4/11, Dmitry Eremin-Solenikov dbarysh...@gmail.com wrote:
Init not only first displaystate, but all. Otherwise machines with
multiple display devices (e.g. tosa, as it exists now) will just
segfault on ds switch.
Signed-off-by: Dmitry Eremin-Solenikov dbarysh...@gmail.com
What about
On Sat, 2011-02-12 at 18:40 +0200, Blue Swirl wrote:
sPAPREnvironment has a certain aroma reminding of aHungarian
nNotation, but otherwise the bouquet is entirely passable.
It's just the smell, like a good french cheese :-)
sPAPR as server Power Architecture® Platform Requirements,
which is
On Sat, 2011-02-12 at 18:59 +0200, Blue Swirl wrote:
Actually I don't quite understand the need for vty layer, why not use
the chardev here directly?
I'm not sure what you mean here...
Basically, the interface presented to guests is sPAPR compliant, so
virtual devices come with a bunch of
Hi,
On Mon, Feb 7, 2011 at 3:40 PM, William Dauchy wdau...@gmail.com wrote:
On Thu, 2011-01-27 at 18:00 +0900, Ken'ichi Ohmichi wrote:
Hi,
When I tried to attach the interface after detaching the same interface,
the virsh command output the following and it failed:
# virsh
Hallo,
Diese E-Mail wurde abgeschickt, um Ihnen mitzuteilen, dass wir nicht verarbeiten Ihre bisherigen Bezahlung der Rechnung. Dies könnte dem einen oder anderen der folgenden Gründe: 1. Eine kürzlich durchgeführte Änderungen Ihrer persönlichen Information. (Beispiel:
Make some more devices optional.
Blue Swirl (10):
parallel: refactor device creation
parallel: make optional
ne2000_isa: refactor device creation
ne2000_isa: make optional
serial: refactor device creation
serial: make optional
fdc: move floppy geometry guessing to block.c
fdc: use
Turn parallel_init into an inline function.
Don't expose ParallelState.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/parallel.c | 21 +
hw/pc.h | 19 +++
2 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/hw/parallel.c
Turn serial_init into an inline function.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/pc.h | 14 +-
hw/serial.c | 12
2 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/hw/pc.h b/hw/pc.h
index 50d9943..09f63f0 100644
--- a/hw/pc.h
+++
Turn isa_ne2000_init into an inline function.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/ne2000-isa.c | 13 -
hw/pc.h | 12 +++-
2 files changed, 11 insertions(+), 14 deletions(-)
diff --git a/hw/ne2000-isa.c b/hw/ne2000-isa.c
index 3ff0d89..e41dbba
Other geometry guessing functions already reside in block.c.
Remove some unused or debugging only fields.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
block.c | 103
block.h | 10 +
hw/fdc.c | 114
Ignore failure with parallel device creation.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/pc.h |5 -
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/hw/pc.h b/hw/pc.h
index 443ba34..f823b7d 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -24,7 +24,10 @@ static inline bool
Turn fdc_init_isa into an inline function.
Get floppy geometry directly from the drives.
Don't expose FDCtrl.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/fdc.c | 37 ++---
hw/fdc.h | 24 +---
hw/pc.c | 31
Ignore failure with serial device creation.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/pc.h |5 -
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/hw/pc.h b/hw/pc.h
index 09f63f0..89b43ea 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -21,7 +21,10 @@ static inline bool
Ignore failure with fdc device creation.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/fdc.h |5 -
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/hw/fdc.h b/hw/fdc.h
index 3b2fb3b..09f73c6 100644
--- a/hw/fdc.h
+++ b/hw/fdc.h
@@ -11,7 +11,10 @@ static inline void
Ignore failure with ne2000_isa device creation.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/pc.h |9 +++--
1 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/hw/pc.h b/hw/pc.h
index abdf307..50d9943 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -5,6 +5,7 @@
#include
On Sat, Feb 12, 2011 at 11:00 PM, Benjamin Herrenschmidt
b...@kernel.crashing.org wrote:
On Sat, 2011-02-12 at 18:59 +0200, Blue Swirl wrote:
Actually I don't quite understand the need for vty layer, why not use
the chardev here directly?
I'm not sure what you mean here...
Maybe it would be
On Sun, 2011-02-13 at 00:52 +0200, Blue Swirl wrote:
On Sat, Feb 12, 2011 at 11:00 PM, Benjamin Herrenschmidt
b...@kernel.crashing.org wrote:
On Sat, 2011-02-12 at 18:59 +0200, Blue Swirl wrote:
Actually I don't quite understand the need for vty layer, why not use
the chardev here
Public bug reported:
Hello,
I want to setup serial communication between VM hosts but I have found
it quite difficult...:
...because when trying unix sockets:
- host A has serial device as unix socket (bind)
- host B has serial device as client of unix socket
- host A is down thus not unix
This patch allows to really use the core dumped by qemu with guest
architecture tools.
- it adds a missing bswap_phdr() for the program headers
of memory regions.
objdump -x sample:
BEFORE:
0x100 off0x0020 vaddr 0x0400 paddr 0x align 2**21
filesz 0x
Datatype alignment can be found using following application:
int main(void)
{
printf(alignof(short) %ld\n, __alignof__(short));
printf(alignof(int) %ld\n, __alignof__(int));
printf(alignof(long) %ld\n, __alignof__(long));
printf(alignof(long long) %ld\n,
Hello everyone,
i am working on a project adding instrumentation into qemu. My approach
is to use gen_helper stuff do hook specific opcodes like call or ret to
gain information about running processes in the virtual machine.
Today I noticed that the CPUState* env is not in all cases up-to-date
Hi
On Sun, Feb 13, 2011 at 10:48, felix.matenaar@rwth-aachen
felix.maten...@rwth-aachen.de wrote:
To achieve my goal, it is necessary being able reading actual register
configuration like eax when a ret hook is called to get a function
return value. So my question is how I can do this. Are
The following patch adds PS/2 keyboard Scancode Set 3 support.
Sign-off-by: Roy Tam roy...@gmail.com
--
diff --git a/hw/ps2.c b/hw/ps2.c
index 762bb00..4b73967 100644
--- a/hw/ps2.c
+++ b/hw/ps2.c
@@ -143,12 +143,87 @@ static void ps2_put_keycode(void *opaque, int keycode)
{
PS2KbdState *s
76 matches
Mail list logo
