On 02/02/2012 09:20 AM, Evgeny Voevodin wrote:
Thanks for the remarks. It seems that our patches will not be applied until
Anthony's patches come to upstream. If so, we will fix CamelCases and
spaces, rebase and
produce v12.
Could someone, please, advise a better/faster way: wait until Anthony's
Commit c3febae62b646b5bc7aa88b7cffa88160162a94e fixed this problem.
** Changed in: qemu
Status: New => Fix Released
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https://bugs.launchpad.net/bugs/589564
Title:
Windows host
On 02/01/2012 11:21 PM, Andreas Färber wrote:
The formatting looks interesting here... copied from an external header?
Copied from HW specification :)
--
Kind regards,
Evgeny Voevodin,
Leading Software Engineer,
ASWG, Moscow R&D center, Samsung Electronics
e-mail: e.voevo...@samsung.com
This is fixed with http://patchwork.ozlabs.org/patch/138690/.
** Changed in: qemu
Status: New => Fix Committed
** Changed in: qemu
Assignee: (unassigned) => Stefan Weil (ubuntu-weilnetz)
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On 02/01/2012 08:21 PM, Peter Maydell wrote:
On 30 January 2012 07:38, Evgeny Voevodin wrote:
From: Maksim Kozlov
Patch adds basic model for Exynos4210 SoC PMU.
This model implements PMU registers just as a bulk of memory. Currently,
the only reason this device exists is that secondary CPU boo
Am 01.02.2012 23:16, schrieb Kenneth Salerno:
Another strange problem I've been having with newer builds from Git
lately is I can only execute qemu-system-*.exe correctly from within
gdb (i.e. "/usr/bin/gdb.exe ./i386-softmmu/qemu-system-i386.exe;
gdb>run -L ./pc-bios"). If I run qemu-system-*.
On 02/01/2012 11:21 PM, Andreas Färber wrote:
+static const VMStateDescription VMState_Exynos4210IRQGate = {
Not CamelCase ;)
But seriously, I really think review makes more sense when the patches
can actually be applied unmodified.
Out patches could be applied to current master without modi
Unfortunately the HIOR setting code slipped into upstream QEMU
before it was pulled into upstream KVM. And since Murphy is always
right, comments on the patches only emerged on the pull request
leading to changes in the interface.
So here's an update to the HIOR setting. While at it, I also relaxe
Hi Blue / Aurelien,
This is my current patch queue for ppc. Please pull.
Alex
The following changes since commit d34e8f6e9d3a396c3327aa9807c83f9e1f4a7bd7:
Michael Roth (1):
main-loop: For tools, initialize timers as part of qemu_init_main_loop()
are available in the git repository at
When running Linux on e500 with powersave-nap enabled, Linux tries to
read out the L1CFG0 register and calculates some things from it. Passing
0 there ends up in a division by 0, resulting in -1, resulting in badness.
So let's populate the L1CFG0 register with reasonable defaults. That way
guests
Our code only knows IVORs up to 37. Add the new ones defined in ISA 2.06
from 38 - 42.
Signed-off-by: Alexander Graf
Reviewed-by: Andreas Färber
---
target-ppc/cpu.h|5 +
target-ppc/translate_init.c | 29 +++--
2 files changed, 20 insertions(+), 14
E500mc supports IVORs 36-41. Add them to the support mask. Drop SPE
support too.
Signed-off-by: Alexander Graf
---
target-ppc/translate_init.c |6 +-
1 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 83348b5..f5
We might want to call the tlb check function without actually caring about
the real address resolution. Check if we really should write the value
back.
Signed-off-by: Alexander Graf
---
target-ppc/helper.c |5 -
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/target-ppc/he
We're going to introduce doorbell instructions (called processor
control in the spec) soon. Add some defines for easier patch
readability later.
Signed-off-by: Alexander Graf
---
target-ppc/cpu.h | 16
1 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/target-ppc/
The e500 CPUs don't use 440's msync which falls on the same opcode IDs,
but instead use the real powerpc sync instruction. This is important,
since the invalid mask differs between the two.
Signed-off-by: Alexander Graf
---
target-ppc/translate.c |3 +--
target-ppc/translate_init.c |
This patch implements the msgsnd instruction. It is part of the
Embedded.Processor Control specification and allows one CPU to
IPI another CPU without going through an interrupt controller.
Signed-off-by: Alexander Graf
---
target-ppc/helper.h|1 +
target-ppc/op_helper.c | 18 +
This patch implements the msgclr instruction. It is part of the
Embedded.Processor Control specification and clears pending doorbell
interrupts on the current CPU.
Signed-off-by: Alexander Graf
---
target-ppc/helper.h|1 +
target-ppc/op_helper.c | 35 +++
We already had all the code available to have doorbell exceptions
be handled properly. It was just disabled.
Enable it, so we can rely on it.
Signed-off-by: Alexander Graf
---
target-ppc/helper.c | 16 ++--
1 files changed, 2 insertions(+), 14 deletions(-)
diff --git a/target-ppc
We can have TLBs that only support a single page size. This is defined
by the absence of the AVAIL flag in TLBnCFG. If this is the case, we
currently write invalid size info into the TLB, but override it on
internal fault.
Let's move the check over to tlbwe, so we don't have the AVAIL check in
the
The msync instruction as defined today is only valid on 4xx cores, not
on e500 which also supports msync, but treats it the same way as sync.
Rename it to reflect that it's 4xx only.
Signed-off-by: Alexander Graf
---
target-ppc/translate.c |4 ++--
1 files changed, 2 insertions(+), 2 deleti
On 01/02/12 20:04, Michael S. Tsirkin wrote:
> On Wed, Feb 01, 2012 at 06:44:42PM +1300, Alexey Korolev wrote:
>> On 31/01/12 22:43, Avi Kivity wrote:
>>> On 01/31/2012 11:40 AM, Avi Kivity wrote:
On 01/27/2012 06:42 AM, Alexey Korolev wrote:
> On 27/01/12 04:12, Avi Kivity wrote:
>> O
We're soon going to implement processor control features. Add the
feature flag, so we're well prepared.
Signed-off-by: Alexander Graf
---
target-ppc/cpu.h |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index f9cea3d..fbcf488 100644
This patch is basically what ./scripts/update-linux-headers.sh against
upstream KVM's next branch outputs except that all the HIOR bits are
removed. These we have to update with the code that uses them.
Signed-off-by: Alexander Graf
---
linux-headers/asm-powerpc/kvm.h |9 ++-
linux-
When running with -R (RESERVED_VA > 0) all guest virtual addresses
are within the [0..RESERVED_VA] range. Reflect this with g2h_valid()
too so we can safely check for boundaries of our guest address space.
This is required to have the /proc/self/maps code not show maps that
aren't accessible from
Our EXCP list is getting outdated. By now, 3 new exception vectors have
been introduced. Update the list so we have everything at one place.
Signed-off-by: Alexander Graf
---
target-ppc/cpu.h |5 -
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/target-ppc/cpu.h b/target-p
The e500mc implements Embedded.Processor Control, so enable it and
thus enable guests to IPI each other. This makes -smp work with -cpu
e500mc.
Signed-off-by: Alexander Graf
---
target-ppc/translate_init.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/target-ppc/trans
On Wed, Feb 01, 2012 at 01:08:39PM -0700, Alex Williamson wrote:
> On Wed, 2012-02-01 at 15:46 +1100, David Gibson wrote:
> > This patch series introduces a new infrastructure to the driver core
> > for representing "device isolation groups". That is, groups of
> > devices which can be "isolated"
On Wed, Feb 01, 2012 at 12:17:05PM -0700, Alex Williamson wrote:
> On Wed, 2012-02-01 at 15:46 +1100, David Gibson wrote:
> > This patch adds code to the code for the powernv platform to create
> > and populate isolation groups on hardware using the p7ioc (aka IODA) PCI
> > host
> > bridge used on
Our internal helpers to fetch TLB entries were not able to tell us
that an entry doesn't even exist. Pass an error out if we hit such
a case to not accidently pass beyond the TLB array.
Signed-off-by: Alexander Graf
---
target-ppc/cpu.h |4
target-ppc/helper.c|3 +++
targe
The PowerPC 2.06 BookE ISA defines an opcode called "tlbilx" which is used
to flush TLB entries. It's the recommended way of flushing in virtualized
environments.
So far we got away without implementing it, but Linux for e500mc uses this
instruction, so we better add it :).
Signed-off-by: Alexand
When setting a TLB entry, we need to check if the TLB we're putting it in
actually supports the given size. According to the 2.06 PowerPC ISA, a
value that's out of range can either be redefined to something implementation
dependent or we can raise an illegal opcode exception. We do the latter.
Si
When using MAV 2.0 TLB registers, we have another range of TLB registers
available to read the supported page sizes from.
Add SPR definitions for those and add a helper function that we can use
to receive such a bitmap even when using MAV 1.0.
Signed-off-by: Alexander Graf
---
target-ppc/cpu.h
Commit 84b058d broke compilation for KVM on non-x86 targets, which
don't have KVM_CAP_IRQ_ROUTING defined.
Fix by not using the unavailable constant when it's not around.
Signed-off-by: Alexander Graf
---
kvm-all.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/kvm-
This patch adds the ioctl wrapper definition for BLKBSZGET.
Signed-off-by: Alexander Graf
---
linux-user/ioctls.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/linux-user/ioctls.h b/linux-user/ioctls.h
index 7245ff0..d8caf6f 100644
--- a/linux-user/ioctls.h
+++ b/linux
On 01/31/2012 09:07 PM, Supriya Kannery wrote:
raw-posix driver changes for bdrv_reopen_xx functions to
safely reopen image files. Reopening of image files while
changing hostcache dynamically is handled here.
Signed-off-by: Supriya Kannery
Index: qemu/block/raw.c
==
On 01/31/2012 09:06 PM, Supriya Kannery wrote:
New command "block_set_hostcache" added for dynamically changing
host pagecache setting of a block device.
Usage:
block_set_hostcache
= block device
= on/off
Example:
(qemu) block_set_hostcache ide0-hd0 off
Signed-off-by: Supriya
Am 01.02.2012 20:50, schrieb Anthony Liguori:
> This was done in a mostly automated fashion. I did it in three steps and then
> rebased it into a single step which avoids repeatedly touching every file in
> the tree.
>
> The first step was a sed-based addition of the parent type to the subclass
>
On Wed, 2012-02-01 at 15:57 -0700, Alex Williamson wrote:
> As we start to enable 64bit I/O devices, there's a good chance
> we'll find bugs and compatibility issues. This allows a user
> to toggle off (default on) 64bit PCI MMIO BARs, downgrading
> them to 32bit BARs.
>
> Signed-off-by: Alex Wil
On Thu, 2012-02-02 at 01:14 +0200, Michael S. Tsirkin wrote:
> On Wed, Feb 01, 2012 at 03:57:02PM -0700, Alex Williamson wrote:
> > As we start to enable 64bit I/O devices, there's a good chance
> > we'll find bugs and compatibility issues. This allows a user
> > to toggle off (default on) 64bit P
On Wed, Feb 01, 2012 at 03:57:02PM -0700, Alex Williamson wrote:
> As we start to enable 64bit I/O devices, there's a good chance
> we'll find bugs and compatibility issues. This allows a user
> to toggle off (default on) 64bit PCI MMIO BARs, downgrading
> them to 32bit BARs.
>
> Signed-off-by: A
As we start to enable 64bit I/O devices, there's a good chance
we'll find bugs and compatibility issues. This allows a user
to toggle off (default on) 64bit PCI MMIO BARs, downgrading
them to 32bit BARs.
Signed-off-by: Alex Williamson
---
Should this be an "x-mem64" option implying that it's re
Anthony Liguori a écrit :
On 01/23/2012 04:34 AM, Hervé Poussineau wrote:
Following patches update jazz-led emulation to current Qemu standards:
- use trace framework to report events
- convert to qdev
This is going to need to be rebased. I'd suggest waiting until next
week when the next qom
On 01/27/2012 12:54 PM, Jan Kiszka wrote:
This adds qemu_opts_set_defaults, an interface provide default values
for a QemuOpts set. Default options are parsed from a string and then
prepended to the list of existing options, or they serve as the sole
QemuOpts set.
Signed-off-by: Jan Kiszka
App
On 01/31/2012 06:45 AM, Jan Kiszka wrote:
See individual patches for details.
CC: Erik Rull
Jan Kiszka (5):
sdl: Do not grab mouse on mode switch while in background
sdl: Fix block prevention of SDL_WM_GrabInput
Revert "Handle SDL grabs failing (Mark McLoughlin)"
sdl: Grab input on
On 01/31/2012 08:05 PM, Supriya Kannery wrote:
> For changing host pagecache setting of a running VM, it is
> important to have a safe way of reopening its image file.
>
> Following patchset introduces:
> * a generic way to reopen image files safely.
> In this approach, before reopen
On 01/21/2012 11:13 AM, Michael Roth wrote:
In some cases initializing the alarm timers can lead to non-negligable
overhead from programs that link against qemu-tool.o. At least,
setting a max-resolution WinMM alarm timer via mm_start_timer() (the
current default for Windows) can increase the "ti
Some simplifications in I/O functions are possible because
Jazz LED only registers one byte of I/O.
Signed-off-by: Hervé Poussineau
---
hw/jazz_led.c | 153 +++
hw/mips.h |3 -
hw/mips_jazz.c |2 +-
3 files changed, 65 insertions
On 02/01/2012 12:50 PM, Peter Maydell wrote:
configure creates a linux-headers/asm symlink. Remove this when
doing a distclean.
Signed-off-by: Peter Maydell
Applied. Thanks.
Regards,
Anthony Liguori
---
Makefile |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/M
Signed-off-by: Hervé Poussineau
---
Makefile.objs|1 +
Makefile.target |1 -
default-configs/mips-softmmu.mak |1 +
default-configs/mips64-softmmu.mak |1 +
default-configs/mips64el-softmmu.mak |1 +
default-configs/mipsel-so
Signed-off-by: Hervé Poussineau
---
hw/jazz_led.c | 26 +-
trace-events |4
2 files changed, 13 insertions(+), 17 deletions(-)
diff --git a/hw/jazz_led.c b/hw/jazz_led.c
index f8a2182..1af9268 100644
--- a/hw/jazz_led.c
+++ b/hw/jazz_led.c
@@ -26,17 +26,7 @@
Following patches update jazz-led emulation to current Qemu standards:
- use trace framework to report events
- convert to qdev
Changes v1 -> v2:
- rebased
Hervé Poussineau (3):
jazz-led: use trace framework
jazz-led: convert to qdev
jazz-led: compile it only twice
Makefile.objs
On 1 February 2012 12:57, Andreas Färber wrote:
> It's abstract and derived directly from TYPE_OBJECT.
> Prepare a virtual reset method.
>
> Place it in hw/. Have user emulators pick it up via VPATH, building it
> per target since they didn't use any qdev/QOM devices so far.
> ifdef CONFIG_LINUX
On 01/26/2012 08:19 AM, Gerd Hoffmann wrote:
These days one just needs to specify the romfile in PCiDeviceInfo and
everything magically works. It also allows to disable pxe rom loading
via "romfile=" like it is possible for all other nics.
Signed-off-by: Gerd Hoffmann
This needs rebasing.
Re
On 01/26/2012 04:45 AM, Gerd Hoffmann wrote:
On 01/26/12 08:45, Markus Armbruster wrote:
Gerhard Wiesinger writes:
Option ROM for network interface cards (NICs) can now explicitly disabled
with romfile=disabled (or romfile=no or romfile=none) parameter.
With hotplugable NICs (currently NE2000
Hello,
While the patches fixed the pseudo ICMP between the guest (10.0.2.x) and the
DHCP gateway (10.0.2.2), I have still never been able to get TCP/UDP working. I
even tried compiling glib for MinGW32 without -mms-bitfields to force Qemu to
build without taking this compiler flag from pkg-conf
On 01/23/2012 01:15 PM, Jan Kiszka wrote:
QEMU currently supports lost tick compensation for the periodic RTC
timer. It is controlled via -rtc driftfix=slew|none. However, the next
periodic timer with compensation qualities is approaching: KVM's
in-kernel PIT.
A previous discussion [1] showed th
On 01/19/2012 11:27 AM, Aneesh Kumar K.V wrote:
From: "Aneesh Kumar K.V"
Signed-off-by: Aneesh Kumar K.V
Applied. Thanks.
Regards,
Anthony Liguori
---
MAINTAINERS |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index de2a9163..f9f
On 01/27/2012 11:53 AM, Stefan Weil wrote:
Up to now, there was no special section for the different
host operating systems used with QEMU.
scripts/get_maintainer.pl did not show a maintainer for
OS specific files and patches.
Therefore I added three hosts systems:
* POSIX for the majority of
On 01/29/2012 08:17 PM, Fernando Luis Vázquez Cao wrote:
Some drivers (Linux' 8139too among them) rely on the NIC injecting an interrupt
in the event of a receive buffer overflow and, accordingly, set the RxOverflow
bit in the interrupt mask. Unfortunately rtl8139's can_receive method ignores
the
On 01/31/2012 01:03 PM, Sergei Trofimovich wrote:
From: Sergei Trofimovich
Current './configure --static&& make' fails for me:
LINK qemu-nbd
/usr/lib/gcc/x86_64-pc-linux-gnu/4.5.3/../../../../x86_64-pc-linux-gnu/bin/ld:
cannot find -lssl3
/usr/lib/gcc/x86_64-pc-linux-gnu/4.5
On 01/31/2012 01:03 PM, Sergei Trofimovich wrote:
From: Sergei Trofimovich
Added wrapper around pkg-config to allow:
- safe options injection via ${QEMU_PKG_CONFIG_FLAGS}
- spaces in path to pkg-config
Signed-off-by: Sergei Trofimovich
CC: Peter Maydell
Applied. Thanks.
Regards,
Anthony Li
On 01/17/2012 07:23 AM, Peter Maydell wrote:
Clarify the comment about tlb_flush()'s flush_global parameter,
so it is clearer what it does and why it is OK that the implementation
currently ignores it.
Signed-off-by: Peter Maydell
Applied. Thanks.
Regards,
Anthony Liguori
---
Minor clarif
On 01/30/2012 04:27 AM, Jan Kiszka wrote:
The build process of optionroms spits out an "rm ..." line. Moreover, it
removes all .o files that can be handy for debugging purposes. So
disable automatic intermediate removal.
Signed-off-by: Jan Kiszka
Applied. Thanks.
Regards,
Anthony Liguori
On 01/20/2012 07:08 PM, Michael Roth wrote:
The __attribute__((constructor)) init_main_loop() automatically get
called if qemu-tool.o is linked in. On win32, this leads to
a qemu_notify_event() call which attempts to SetEvent() on a HANDLE that
won't be initialized until qemu_init_main_loop() is
Jan Kiszka wrote:
On 2012-02-01 13:52, Erik Rull wrote:
Hi all,
first of all I'm a bit confused:
What is the difference between qemu with command line option --enable-kvm
and qemu-kvm?
It seems to be a difference in code so far, from the performance point of
view it seems to be the same...
In legacy mode, the HPET suppresses the RTC interrupt delivery via IRQ
8 but keeps track of the RTC output level and applies it when legacy
mode is turned off again. This value has to be preserved across save/
restore as it cannot be reconstructed otherwise.
To document that a raised rtc_irq_level
Links had limited utility before as they only allowed a concrete type to be
specified. Now we can support abstract types and interfaces which means it's
now possible to have a link.
Signed-off-by: Anthony Liguori
---
qom/object.c |9 +
1 files changed, 5 insertions(+), 4 deletions(-
We can probably model USBHidDevice as a base class to get even better code
sharing but for now, just use a common function to initialize the common class
members.
Signed-off-by: Anthony Liguori
---
hw/usb-hid.c | 27 +--
1 files changed, 13 insertions(+), 14 deletions(-
Teach the various bits of code that need to walk through available devices to
do so via QOM.
Signed-off-by: Anthony Liguori
---
hw/qdev.c | 87 +
hw/qdev.h |2 -
hw/ssi.c |2 +-
3 files changed, 31 insertions(+), 60 deletions(
Am 01.02.2012 20:50, schrieb Anthony Liguori:
> Signed-off-by: Anthony Liguori
Reviewed-by: Andreas Färber
Thanks,
Andreas
> ---
> include/qemu/object.h |1 +
> qom/object.c | 18 --
> 2 files changed, 17 insertions(+), 2 deletions(-)
>
> diff --git a/include/q
Avoid changing the IRQ level to high on reset as it may trigger spurious
events. Instead, open-code the effects of pit_load_count(0) in the reset
handler.
Signed-off-by: Jan Kiszka
---
hw/i8254.c |8 +++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/hw/i8254.c b/hw/i825
On 01.02.2012, at 18:38, Grant Likely wrote:
> On Tue, Jan 31, 2012 at 6:44 PM, Alexander Graf wrote:
>>
>> On 01.02.2012, at 02:35, Paul Brook wrote:
>>
We could also just change machine->init() and pass the dtb in there. In a
QOM world these would become machine device properties a
This gets us closer to being able to object_new() a qdev type and have a
functioning object verses having to call qdev_create().
Signed-off-by: Anthony Liguori
---
hw/qdev.c | 41 -
1 files changed, 28 insertions(+), 13 deletions(-)
diff --git a/hw/qdev
Note that the FIXME gets fixed in series 4/4. We need to convert BusState to
QOM before we can make parent_bus a link.
Signed-off-by: Anthony Liguori
---
hw/qdev.c | 35 ++-
hw/qdev.h |3 +++
2 files changed, 25 insertions(+), 13 deletions(-)
diff --git a/
As we use class_init to set class members, DeviceInfo no longer holds this
information.
Signed-off-by: Anthony Liguori
---
hw/qdev.c | 42 +++---
1 files changed, 19 insertions(+), 23 deletions(-)
diff --git a/hw/qdev.c b/hw/qdev.c
index c9f890c..bba84e2 10
When the HPET enters legacy mode, the IRQ output of the PIT is
suppressed and replaced by the HPET timer 0. But the current code to
emulate this was broken in many ways. It reset the PIT state after
re-enabling, it worked against a stale static PIT structure, and it did
not properly saved/restored
On 01/23/2012 04:34 AM, Hervé Poussineau wrote:
Following patches update jazz-led emulation to current Qemu standards:
- use trace framework to report events
- convert to qdev
Hervé Poussineau (3):
jazz-led: use trace framework
jazz-led: convert to qdev
jazz-led: compile it only twice
Now DeviceInfo is no longer used after object construction. All of the
relevant members have been moved to DeviceClass.
Signed-off-by: Anthony Liguori
---
hw/pci.c |4 ++-
hw/qdev.c | 94
hw/qdev.h | 26 +---
3 fi
This allows us to drop per-Device registration functions by allowing the
class_init functions to overload qdev methods.
Signed-off-by: Anthony Liguori
---
hw/qdev.c | 53 +
1 files changed, 33 insertions(+), 20 deletions(-)
diff --git a/hw/q
I'm sure the intentions were good here, but there's no reason this should be in
qdev. Move it to qemu-char where it belongs.
Signed-off-by: Anthony Liguori
---
hw/etraxfs_ser.c |2 +-
hw/lm32_juart.c |2 +-
hw/lm32_uart.c |2 +-
hw/milkymist-uart.c |2 +-
hw/pl01
Instead of providing 4 individual query functions for mode, gate, output
and initial counter state, introduce a service that queries all
information at once. This comes with tiny additional costs for
pcspk_callback but with a much cleaner interface. Also, it will simplify
the implementation of the
HPET legacy emulation will require control over the PIT IRQ output. To
enable this, add support for an alternative IRQ output object to the PIT
factory function. If the isa_irq number is < 0, this object will be
used.
This also removes the IRQ number property from the PIT class as we now
use a gen
Signed-off-by: Anthony Liguori
---
include/qemu/object.h |1 +
qom/object.c | 18 --
2 files changed, 17 insertions(+), 2 deletions(-)
diff --git a/include/qemu/object.h b/include/qemu/object.h
index ba37850..adbcfb1 100644
--- a/include/qemu/object.h
+++ b/include
On 02/01/2012 09:01 PM, Anthony Liguori wrote:
I think that read-only properties could be interesting for SCSIRequest.
For instance, I can imagine having SCSIRequest is-a BlockRequest and
having an error property associated with it. That would provide a nice
way to have an info io operation that
Signed-off-by: Anthony Liguori
---
hw/qdev.c | 57 -
1 files changed, 32 insertions(+), 25 deletions(-)
diff --git a/hw/qdev.c b/hw/qdev.c
index 8f13e49..e3b53b7 100644
--- a/hw/qdev.c
+++ b/hw/qdev.c
@@ -247,31 +247,6 @@ void qdev_init_n
Convert the PC speaker device to a qdev ISA model. Move the public
interface to a dedicated header file at this chance.
CC: Paolo Bonzini
Signed-off-by: Jan Kiszka
---
arch_init.c|1 +
hw/i82378.c|3 +-
hw/mips_jazz.c |3 +-
hw/pc.c|3 +-
hw/pc.h|4 --
Changes in V4:
- rebased over qom-upstream.13
- comment on rtc_irq_level clearing on reset
- fix call to isa_register_ioport by passing the pcspk device
Not changed:
- PIT pointer property of pcspk
(Paolo will port it together with other PROP_PTR users)
CC: Paolo Bonzini
Jan Kiszka (7):
Introduce accessors and remove any code that directly accesses DeviceInfo
members.
Signed-off-by: Anthony Liguori
---
hw/pci.c | 13 -
hw/qdev-properties.c |4 ++--
hw/qdev.c| 30 +-
hw/qdev.h| 24 +
This adds a command that allows searching for types that implement a property.
This allows you to do things like search for all available PCIDevices. In the
future, we'll also have a standard interface for things with a BlockDriverState
property that a PCIDevice could implement.
This will enable
On 02/01/2012 01:55 PM, Peter Maydell wrote:
On 30 January 2012 21:16, Anthony Liguori wrote:
Patch 8/23 is an automated touch everything patch.
It's kind of awkward having a patch series that is both long (number
of patches) and wide (patches that require touching/conversion of
every device
On Wed, 2012-02-01 at 15:46 +1100, David Gibson wrote:
> This patch series introduces a new infrastructure to the driver core
> for representing "device isolation groups". That is, groups of
> devices which can be "isolated" in such a way that the rest of the
> system can be protected from them, e
Limit them to the device_add functionality. Device aliases were a hack based
on the fact that virtio was modeled the wrong way. The mechanism for aliasing
is very limited in that only one alias can exist for any device.
We have to support it for the purposes of compatibility but we only need to
On 01/31/2012 01:46 AM, Paolo Bonzini wrote:
On 01/30/2012 10:08 PM, Anthony Liguori wrote:
This is mostly code movement although not entirely. This makes properties part
of the Object base class which means that we can now start using Object in a
meaningful way outside of qdev.
Can we move th
qdev-monitor.c deals with the -device, device_add, and info qdm/qtree
interfaces.
Signed-off-by: Anthony Liguori
---
Makefile.objs |2 +-
hw/qdev-monitor.c | 585 +
hw/qdev.c | 572 +
Move the public interface of the PIT into its own header file and update
all users.
Signed-off-by: Jan Kiszka
---
hw/alpha_dp264.c |1 +
hw/hpet.c |1 +
hw/i82378.c|1 +
hw/i8254.c |1 +
hw/i8254.h | 54
On 02/01/2012 01:46 PM, Peter Maydell wrote:
On 30 January 2012 21:08, Anthony Liguori wrote:
Subject: [PATCH 09/23] qdev: kill of DeviceInfo
"kill off".
Tanks!
Regards,
Anthony Liguori
-- PMM
On 02/01/2012 01:47 PM, Peter Maydell wrote:
Subject: [PATCH 21/23] object: sure up reference counting
On 30 January 2012 21:08, Anthony Liguori wrote:
Subject: [PATCH 21/23] object: sure up reference counting
"shore up", apparently, although I found that sufficiently
unlikely in this contex
On 30 January 2012 21:16, Anthony Liguori wrote:
> Patch 8/23 is an automated touch everything patch.
It's kind of awkward having a patch series that is both long (number
of patches) and wide (patches that require touching/conversion of
every device in the tree), because the length means it needs
Signed-off-by: Anthony Liguori
---
v1 -> v2
- Add license (Paolo)
---
Makefile.objs |2 +-
hw/container.c| 29 -
hw/qdev-monitor.c | 14 ++
qom/Makefile |2 +-
qom/container.c | 27 +++
qom/object.c
Signed-off-by: Anthony Liguori
---
hw/qdev-monitor.c | 12 +++-
1 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/hw/qdev-monitor.c b/hw/qdev-monitor.c
index a6f0e16..56a3458 100644
--- a/hw/qdev-monitor.c
+++ b/hw/qdev-monitor.c
@@ -163,12 +163,14 @@ int qdev_device_help(Q
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