On 13.08.2013, at 20:03, Peter Maydell wrote:
These patches add support to target-arm for '-cpu host'.
The general semantics are the same as for ppc and x86 (ie whatever
the host kernel can support that looks basically like the host
CPU), but the mechanism is a little different.
The
How about adding a flag that tells QEMU whether to pause or reboot the guest
after the panic?
We cannot assume that we always have a management layer that takes care
of this.
One example is Microsoft's WHQL that deliberately generates a BSOD, and then
examines the dump files.
Ronen.
On
On Wed, Aug 14, 2013 at 3:54 AM, Wenchao Xia xiaw...@linux.vnet.ibm.com wrote:
于 2013-8-13 16:21, Stefan Hajnoczi 写道:
On Tue, Aug 13, 2013 at 4:53 AM, Wenchao Xia xiaw...@linux.vnet.ibm.com
wrote:
于 2013-8-12 19:33, Stefan Hajnoczi 写道:
On Mon, Aug 12, 2013 at 12:26 PM, Alex Bligh
On 14 Aug 2013, at 08:53, Stefan Hajnoczi wrote:
The fork child can minimize the chance of out-of-memory by using
madvise(MADV_DONTNEED) after pages have been written out.
This may also be helpful (last clause) before starting writing.
MADV_SEQUENTIAL
Expect page
On 14.08.2013, at 10:11, Marc Zyngier wrote:
On 2013-08-14 07:32, Alexander Graf wrote:
On 13.08.2013, at 20:03, Peter Maydell wrote:
These patches add support to target-arm for '-cpu host'.
The general semantics are the same as for ppc and x86 (ie whatever
the host kernel can support
On 2013-08-14 05:02, Liu Ping Fan wrote:
If slirp needs to emulate tcp timeout, then the timeout value
for mainloop should be more precise, which is determined by
slirp's fasttimo or slowtimo. Achieve this by swap the logic
sequence of slirp_pollfds_fill and slirp_update_timeout.
On 2013-08-14 04:49, Peter Cheung wrote:
Hi2. I have compile my qemu to --target-list=x86_64-softmmu , in gdb, why
the registers is 32 bits?
(gdb) i reax0x0 0ecx0xf7247edx
0x19a804 1681412ebx0x137 311esp0x19a0d0
On 14.08.2013, at 10:27, Marc Zyngier wrote:
On 2013-08-14 09:16, Alexander Graf wrote:
On 14.08.2013, at 10:11, Marc Zyngier wrote:
On 2013-08-14 07:32, Alexander Graf wrote:
On 13.08.2013, at 20:03, Peter Maydell wrote:
These patches add support to target-arm for '-cpu host'.
The
On Tue, Aug 13, 2013 at 04:13:03PM +0200, Jan Kiszka wrote:
On 2013-08-13 15:45, Stefan Hajnoczi wrote:
On Tue, Aug 13, 2013 at 09:56:17AM +0200, Jan Kiszka wrote:
The details depend on your device, do you have a git repo I can look at
to understand your device model?
Pushed my hacks
On 13.08.2013, at 14:03, Peter Maydell wrote:
This patch series adds a 'virt' platform which uses the
kernel's mach-virt (fully device-tree driven) support
to create a simple minimalist platform intended for
use for KVM VM guests. It's based on John Rigby's
patches, but I've overhauled it a
On Mon, 08/12 18:53, Benoît Canet wrote:
Implement the continuous leaky bucket algorithm devised on IRC as a separate
module.
Signed-off-by: Benoit Canet ben...@irqsave.net
---
include/qemu/throttle.h | 105 +
util/Makefile.objs |1 +
util/throttle.c | 391
On 13.08.2013, at 14:03, Peter Maydell wrote:
From: John Rigby john.ri...@linaro.org
Add 'virt' platform support corresponding to arch/arm/mach-virt
in the Linux kernel tree. This has no platform-specific code but
can use any device whose kernel driver is is able to work purely
from a
On 2013-08-14 10:52, Stefan Hajnoczi wrote:
On Tue, Aug 13, 2013 at 04:13:03PM +0200, Jan Kiszka wrote:
On 2013-08-13 15:45, Stefan Hajnoczi wrote:
On Tue, Aug 13, 2013 at 09:56:17AM +0200, Jan Kiszka wrote:
The details depend on your device, do you have a git repo I can look at
to understand
On 14 August 2013 07:32, Alexander Graf ag...@suse.de wrote:
On 13.08.2013, at 20:03, Peter Maydell wrote:
These patches add support to target-arm for '-cpu host'.
The general semantics are the same as for ppc and x86 (ie whatever
the host kernel can support that looks basically like the
On 14 August 2013 09:46, Alexander Graf ag...@suse.de wrote:
So can we access those even when the vcpu hasn't been init'ed yet? If so, how
about the following flow of things for -cpu host:
- QEMU fetches host target type via ioctl (how will this work for
big-little?)
- QEMU fetches ID
On 14.08.2013, at 11:07, Peter Maydell wrote:
On 14 August 2013 09:46, Alexander Graf ag...@suse.de wrote:
So can we access those even when the vcpu hasn't been init'ed yet? If so,
how about the following flow of things for -cpu host:
- QEMU fetches host target type via ioctl (how will
On 14 August 2013 09:52, Alexander Graf ag...@suse.de wrote:
On 13.08.2013, at 14:03, Peter Maydell wrote:
An obvious thing this machine does not provide is a serial
port. I would rather just use virtio-console (and we
should implement the 'emergency console/earlyprintk' bit of
the virtio
The QEMU command line (/var/log/libvirt/qemu/[domain name].log),
LC_ALL=C PATH=/bin:/sbin:/usr/bin:/usr/sbin HOME=/
QEMU_AUDIO_DRV=none
/usr/local/bin/qemu-system-x86_64 -name ATS1 -S -M pc-0.12 -cpu
qemu32 -enable-kvm -m 12288 -smp 4,sockets=4,cores=1,threads=1 -uuid
Il 14/08/2013 01:58, Kevin O'Connor ha scritto:
On Tue, Aug 13, 2013 at 03:26:43PM +0200, Fabio Fantoni wrote:
Il 13/08/2013 13:09, Laszlo Ersek ha scritto:
On 08/13/13 12:33, Fabio Fantoni wrote:
Il 13/08/2013 12:04, Laszlo Ersek ha scritto:
On 08/13/13 11:16, Fabio Fantoni wrote:
Il
Il 23/07/2013 15:42, Fabio Fantoni ha scritto:
Il 03/07/2013 15:54, fantonifa...@tiscali.it ha scritto:
Usage: spicevdagent=1|0 (default=0)
Enables spice vdagent. The Spice vdagent is an optional component for
enhancing user experience and performing guest-oriented management
tasks. Its
On 14 August 2013 10:02, Alexander Graf ag...@suse.de wrote:
On 13.08.2013, at 14:03, Peter Maydell wrote:
+/* No PSCI for TCG yet */
+#ifdef CONFIG_KVM
Do you need this #ifdef? Are the headers really not included when CONFIG_KVM
is disabled?
Yes, the KVM_PSCI_* constants are defined
On 14 August 2013 10:11, Alexander Graf ag...@suse.de wrote:
You're right, the main difference is that KVM doesn't have any
idea what a host style CPU is. It only knows how to report to QEMU
what the current host CPU would be, so that anything from VCPU_INIT
onwards is 100% identical
On Tue, Aug 13, 2013 at 07:03:56PM +0200, Kaveh Razavi wrote:
Using copy-on-write images with the base image stored remotely is common
practice in data centers. This saves significant network traffic by
avoiding the transfer of the complete base image. However, the data
blocks needed for a VM
On 14.08.2013, at 11:23, Peter Maydell wrote:
On 14 August 2013 10:11, Alexander Graf ag...@suse.de wrote:
You're right, the main difference is that KVM doesn't have any
idea what a host style CPU is. It only knows how to report to QEMU
what the current host CPU would be, so that anything
On Mon, 08/12 18:53, Benoît Canet wrote:
Signed-off-by: Benoit Canet ben...@irqsave.net
---
block.c | 349
++---
block/qapi.c | 21 ++-
blockdev.c| 100 +++--
include/block/block.h |
On 2013-08-14 09:16, Alexander Graf wrote:
On 14.08.2013, at 10:11, Marc Zyngier wrote:
On 2013-08-14 07:32, Alexander Graf wrote:
On 13.08.2013, at 20:03, Peter Maydell wrote:
These patches add support to target-arm for '-cpu host'.
The general semantics are the same as for ppc and x86 (ie
On 2013-08-14 07:32, Alexander Graf wrote:
On 13.08.2013, at 20:03, Peter Maydell wrote:
These patches add support to target-arm for '-cpu host'.
The general semantics are the same as for ppc and x86 (ie whatever
the host kernel can support that looks basically like the host
CPU), but the
On 14.08.2013, at 11:19, Peter Maydell wrote:
On 14 August 2013 10:02, Alexander Graf ag...@suse.de wrote:
On 13.08.2013, at 14:03, Peter Maydell wrote:
+/* No PSCI for TCG yet */
+#ifdef CONFIG_KVM
Do you need this #ifdef? Are the headers really not included when CONFIG_KVM
is
This fixes the following assert when -device adlib is used:
ioport.c:240: portio_list_add: Assertion `pio-offset = off_last' failed.
Signed-off-by: Hervé Poussineau hpous...@reactos.org
---
hw/audio/adlib.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/audio/adlib.c
On Mon, 08/12 18:53, Benoît Canet wrote:
This feature can be used in case where users are avoiding the iops limit by
doing jumbo I/Os hammering the storage backend.
You are accounting io ops by the op size:
(unit = size / iops_sector_count), which is equivelant to bps. So I'm
still not
On Wed, 08/14 17:31, Fam Zheng wrote:
On Mon, 08/12 18:53, Benoît Canet wrote:
Signed-off-by: Benoit Canet ben...@irqsave.net
@@ -1262,7 +1260,7 @@ void qmp_block_set_io_throttle(const char *device,
int64_t bps, int64_t bps_rd,
int64_t bps_wr, int64_t
On 08/14/13 11:19, Fabio Fantoni wrote:
Tried with qemu 1.4.2 and it works also with 4 gb of ram.
This ram regression seems to be introduced with qemu 1.5, and there is
another regression more critical with qemu 1.6.
Can you save qemu's stderr for the 1.5-1.6 regression?
Tried to add
On 13.08.2013, at 13:09, Efimov Vasily wrote:
Signed-off-by: Efimov Vasily r...@ispras.ru
Please provide a patch description :).
---
hw/ppc/virtex_ml507.c | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c
Il 23/07/2013 15:42, Fabio Fantoni ha scritto:
Il 03/07/2013 15:54, fantonifa...@tiscali.it ha scritto:
Usage: spicevdagent=1|0 (default=0)
Enables spice vdagent. The Spice vdagent is an optional component for
enhancing user experience and performing guest-oriented management
tasks. Its
On Wed, Aug 14, 2013 at 11:51:19AM +0200, Alexander Graf wrote:
On 13.08.2013, at 13:09, Efimov Vasily wrote:
Signed-off-by: Efimov Vasily r...@ispras.ru
Please provide a patch description :).
---
hw/ppc/virtex_ml507.c | 13 ++---
1 file changed, 10 insertions(+), 3
On 13.08.2013, at 06:10, Anton Blanchard wrote:
A number of users are reporting stalls when using the pseries
hypervisor virtual console.
A simple test case is to paste 15 or 17 characters at a time
into the console. Pasting 15 characters at a time works fine
but pasting 17 characters
On 14.08.2013, at 11:56, Edgar E. Iglesias wrote:
On Wed, Aug 14, 2013 at 11:51:19AM +0200, Alexander Graf wrote:
On 13.08.2013, at 13:09, Efimov Vasily wrote:
Signed-off-by: Efimov Vasily r...@ispras.ru
Please provide a patch description :).
---
hw/ppc/virtex_ml507.c | 13
On 08/14/2013 12:56 PM, Alon Levy wrote:
Il 23/07/2013 15:42, Fabio Fantoni ha scritto:
Il 03/07/2013 15:54, fantonifa...@tiscali.it ha scritto:
Usage: spicevdagent=1|0 (default=0)
Enables spice vdagent. The Spice vdagent is an optional component for
enhancing user experience and performing
On 12.08.2013, at 23:22, Benjamin Herrenschmidt wrote:
On Mon, 2013-08-12 at 21:17 +0200, Thomas Huth wrote:
Am Mon, 12 Aug 2013 16:03:24 +1000
schrieb Benjamin Herrenschmidt b...@kernel.crashing.org:
On Mon, 2013-08-12 at 10:07 +0530, Prerna Saxena wrote:
.../...
I dont know what
Il 18/07/2013 14:35, Paolo Bonzini ha scritto:
Il 18/07/2013 14:31, Andreas Färber ha scritto:
I'm just curious, why is this so complicated? Is this likely to be
fragile and break in the future?
As pointed out previously, the bus=pci.0 bit will break with different
PCI host bridges, such as
Am 14.08.2013 12:18, schrieb Alexander Graf:
On 12.08.2013, at 23:22, Benjamin Herrenschmidt wrote:
On Mon, 2013-08-12 at 21:17 +0200, Thomas Huth wrote:
Am Mon, 12 Aug 2013 16:03:24 +1000
schrieb Benjamin Herrenschmidt b...@kernel.crashing.org:
On Mon, 2013-08-12 at 10:07 +0530, Prerna
2013/8/14 Alexander Graf ag...@suse.de:
-void *fdt;
+void *fdt = 0;
This should be NULL. NULL doesn't have to be 0 according to C IIRC.
The last statement is wrong here, NULL is always the same as 0
language-wise. Although the above code is always correct, some will
consider it better
On Mon, Aug 12, 2013 at 04:04:08PM -0700, Guenter Roeck wrote:
Hacked diff is below. Can I write that up as clean patch and submit it,
or do we need a test on real hardware ?
Well, if we want to ensure that it is really correct, the sensible thing
to do is to try it on real hardware, otherwise
On 14.08.2013, at 12:34, Felix Deichmann wrote:
2013/8/14 Alexander Graf ag...@suse.de:
-void *fdt;
+void *fdt = 0;
This should be NULL. NULL doesn't have to be 0 according to C IIRC.
The last statement is wrong here, NULL is always the same as 0
language-wise. Although the
Il 14/08/2013 11:56, Laszlo Ersek ha scritto:
On 08/14/13 11:19, Fabio Fantoni wrote:
Tried with qemu 1.4.2 and it works also with 4 gb of ram.
This ram regression seems to be introduced with qemu 1.5, and there is
another regression more critical with qemu 1.6.
Can you save qemu's stderr for
On Wed, Aug 14, 2013 at 12:03:34PM +0200, Alexander Graf wrote:
On 14.08.2013, at 11:56, Edgar E. Iglesias wrote:
On Wed, Aug 14, 2013 at 11:51:19AM +0200, Alexander Graf wrote:
On 13.08.2013, at 13:09, Efimov Vasily wrote:
Signed-off-by: Efimov Vasily r...@ispras.ru
Am 14.08.2013 12:18, schrieb Alexander Graf:
So the POWER7 fw_name field would just contain PowerPC,POWER7 and the
device tree creation code merely appends the @%d piece.
Speaking of POWER7, Paul said that POWER7+ would look like
PowerPC,POWER7+@0 but my POWER5+ is
On 14.08.2013, at 13:03, Edgar E. Iglesias wrote:
On Wed, Aug 14, 2013 at 12:03:34PM +0200, Alexander Graf wrote:
On 14.08.2013, at 11:56, Edgar E. Iglesias wrote:
On Wed, Aug 14, 2013 at 11:51:19AM +0200, Alexander Graf wrote:
On 13.08.2013, at 13:09, Efimov Vasily wrote:
Am 14.08.2013 13:03, schrieb Edgar E. Iglesias:
On Wed, Aug 14, 2013 at 12:03:34PM +0200, Alexander Graf wrote:
Then let's make the logic work like this:
if (user provided -dtb) {
if (load_dtb(user provided dtb)) {
abort();
}
} else {
if (load_dtb(ppc.dtb)) {
if
On 08/13/2013 11:37 PM, Eric Blake wrote:
What is the QMP counterpart for hot-plugging a disk with the cache
attached? Is this something that can integrate nicely with Kevin's
planned blockdev-add for 1.7?
I do not know the details of this, but as long as it has proper support
for backing
On 08/14/13 12:54, Fabio Fantoni wrote:
Il 14/08/2013 11:56, Laszlo Ersek ha scritto:
On 08/14/13 11:19, Fabio Fantoni wrote:
Tried with qemu 1.4.2 and it works also with 4 gb of ram.
This ram regression seems to be introduced with qemu 1.5, and there is
another regression more critical with
On Wed, Aug 14, 2013 at 01:16:24PM +0200, Laszlo Ersek wrote:
On 08/14/13 12:54, Fabio Fantoni wrote:
Il 14/08/2013 11:56, Laszlo Ersek ha scritto:
On 08/14/13 11:19, Fabio Fantoni wrote:
Tried with qemu 1.4.2 and it works also with 4 gb of ram.
This ram regression seems to be
On 08/14/2013 12:53 AM, Alex Bligh wrote:
What is this cache keyed on and how is it invalidated? Let's say a
2 VM on node X boot with backing file A. The first populates the cache,
and the second utilises the cache. I then stop both VMs, delete
the derived disks, and change the contents of the
This was once introduced by commit 100d9891d6 but was never used in-tree
and then got broken by commit 32e0c8260d. Time to clean up.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
hw/timer/mc146818rtc.c |9 +
1 files changed, 1 insertions(+), 8 deletions(-)
diff --git
On Wed, Aug 14, 2013 at 11:05:29AM +0200, Jan Kiszka wrote:
On 2013-08-14 10:52, Stefan Hajnoczi wrote:
On Tue, Aug 13, 2013 at 04:13:03PM +0200, Jan Kiszka wrote:
On 2013-08-13 15:45, Stefan Hajnoczi wrote:
On Tue, Aug 13, 2013 at 09:56:17AM +0200, Jan Kiszka wrote:
The details depend on
On 08/14/2013 01:16 AM, Alex Bligh wrote:
The above para implies you intend one cache file to be shared by
two VMs booting from the same backing image on the same node.
If that's true, how do you protect yourself from the following:
Not really. I meant different backing images, and not
On Wed, Aug 14, 2013 at 11:02:51AM +0800, Liu Ping Fan wrote:
@@ -47,6 +47,9 @@ static QTAILQ_HEAD(slirp_instances, Slirp) slirp_instances =
static struct in_addr dns_addr;
static u_int dns_addr_time;
+#define TIMEOUT_FAST 2
+#define TIMEOUT_SLOW 499
#define TIMEOUT_FAST 2 /*
Am 30.07.2013 18:55, schrieb Andreas Färber:
Hello everyone,
A short CPUState series for a change: This mini-series replaces our home-grown
CPU list (first_cpu global and CPUState::next_cpu) with a QTAILQ.
To avoid repeated QTAILQ_FOREACH(foo, cpus, node) I am proposing a wrapper
On 07.08.2013, at 03:06, Anthony Liguori wrote:
On Tue, Aug 6, 2013 at 7:47 PM, Anton Blanchard an...@samba.org wrote:
On POWER7, LPCR_ILE is used to control what endian guests take
their exceptions in so use it instead of MSR_ILE.
Signed-off-by: Anton Blanchard an...@samba.org
On Wed, 08/14 13:28, Kaveh Razavi wrote:
On 08/14/2013 12:53 AM, Alex Bligh wrote:
What is this cache keyed on and how is it invalidated? Let's say a
2 VM on node X boot with backing file A. The first populates the cache,
and the second utilises the cache. I then stop both VMs, delete
the
Kaveh,
On 14 Aug 2013, at 12:28, Kaveh Razavi wrote:
On 08/14/2013 12:53 AM, Alex Bligh wrote:
What is this cache keyed on and how is it invalidated? Let's say a
2 VM on node X boot with backing file A. The first populates the cache,
and the second utilises the cache. I then stop both VMs,
On 14 Aug 2013, at 12:42, Kaveh Razavi wrote:
On 08/14/2013 01:16 AM, Alex Bligh wrote:
The above para implies you intend one cache file to be shared by
two VMs booting from the same backing image on the same node.
If that's true, how do you protect yourself from the following
Not really.
On 14 Aug 2013, at 12:52, Fam Zheng wrote:
Yes, this one sounds good to have. VMDK and VHDX have this kind of
backing file status validation.
... though I'd prefer something safer than looking at mtime, for
instance a sequence number that is incremented prior to any
bdrv_close if a write has
On Mon, 29 Jul 2013, Maciej W. Rozycki wrote:
Decode trap instructions during the handling of an EXCP_BREAK or EXCP_TRAP
according to the current ISA mode.
Signed-off-by: Kwok Cheung Yeung k...@codesourcery.com
---
linux-user/main.c | 46
When there are no snapshots qemu_rbd_snap_list() returns 0 and the
snapshot table pointer is NULL. Don't forget to free the snaps buffer
we allocated for librbd rbd_snap_list().
Cc: qemu-sta...@nongnu.org
Signed-off-by: Stefan Hajnoczi stefa...@redhat.com
---
block/rbd.c | 2 +-
1 file changed,
From: M. Mohan Kumar mo...@in.ibm.com
bdrv_flags is set by bdrv_parse_discard_flags(), but later it is reset
to zero.
Signed-off-by: M. Mohan Kumar mo...@in.ibm.com
---
blockdev.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/blockdev.c b/blockdev.c
index e174b7d..bc7016a 100644
---
On Wed, Aug 14, 2013 at 12:54:06PM +0200, Fabio Fantoni wrote:
I retried with the correct parameters and on both cases (2 gb of ram
working and 4gb of ram not working) I get only this one more line on
qemu log:
Start bios (version debian/1.7.3-1-1-ga76c6f1-dirty-20130813_122010-test)
Xen
On 2013-08-13 16:13, Jan Kiszka wrote:
On 2013-08-13 15:45, Stefan Hajnoczi wrote:
This should make timers usable in another thread for clock device
emulation if only your iothread uses the AioContext and its timers
(besides the thread-safe mod/del interfaces).
As argued in the other
On Tue, Aug 13, 2013 at 08:49:21AM +0200, Gerd Hoffmann wrote:
On Mo, 2013-08-12 at 18:42 -0400, Kevin O'Connor wrote:
On Mon, Aug 12, 2013 at 08:05:08AM +0200, Gerd Hoffmann wrote:
We'll need some way to make sure the pmbase (also mmconf xbar) set by
the firmware matches the pmbase
On 14 August 2013 11:33, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
On Mon, Aug 12, 2013 at 04:04:08PM -0700, Guenter Roeck wrote:
Hacked diff is below. Can I write that up as clean patch and submit it,
or do we need a test on real hardware ?
Well, if we want to ensure that it is
On Wed, Aug 14, 2013 at 01:44:44PM +0100, Peter Maydell wrote:
On 14 August 2013 11:33, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
On Mon, Aug 12, 2013 at 04:04:08PM -0700, Guenter Roeck wrote:
Hacked diff is below. Can I write that up as clean patch and submit it,
or do we
Il 14/08/2013 14:29, Kevin O'Connor ha scritto:
On Wed, Aug 14, 2013 at 12:54:06PM +0200, Fabio Fantoni wrote:
I retried with the correct parameters and on both cases (2 gb of ram
working and 4gb of ram not working) I get only this one more line on
qemu log:
Start bios (version
On 14 August 2013 13:49, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
On Wed, Aug 14, 2013 at 01:44:44PM +0100, Peter Maydell wrote:
Yes, I definitely think we should test on the hardware before we
land yet another change to this PCI code that hasn't really been
thoroughly tested on
On Tue, Aug 13, 2013 at 03:26:53PM +0100, Alex Bligh wrote:
On 13 Aug 2013, at 15:22, Stefan Hajnoczi wrote:
We can change the semantics of aio_poll() so long as we don't break
existing callers and tests. It would make sense to do that after
merging the io_flush and AioContext timers
Hi Xi,
You should use git format-patch with -s and --cover-letter next time,
and manually edit cover letter for a brief description of your patch set.
More info. at http://qemu-project.org/Contribute/SubmitAPatch .
On Wed, Aug 14, 2013 at 1:55 PM, Xi Wang xi.w...@gmail.com wrote:
Consider the
Hi Xi,
On Wed, Aug 14, 2013 at 1:55 PM, Xi Wang xi.w...@gmail.com wrote:
In C99 signed shift (1 31) is undefined behavior, since the result
exceeds INT_MAX. Use 1U instead and move the shift after the check.
Cc: Jia Liu pro...@gmail.com
Cc: Paolo Bonzini pbonz...@redhat.com
Signed-off-by:
On Wed, Aug 14, 2013 at 05:56:41PM +0530, M. Mohan Kumar wrote:
From: M. Mohan Kumar mo...@in.ibm.com
bdrv_flags is set by bdrv_parse_discard_flags(), but later it is reset
to zero.
Signed-off-by: M. Mohan Kumar mo...@in.ibm.com
---
blockdev.c | 1 -
1 file changed, 1 deletion(-)
QEMU has 'dtb' option for specifing the device tree file for the kernel.
The patch adds support for this option to the 'virtex_ml507' machine
implementation.
Signed-off-by: Efimov Vasily r...@ispras.ru
---
hw/ppc/virtex_ml507.c | 29 +++--
1 file changed, 19
On 07.08.2013, at 03:05, Anthony Liguori wrote:
On Tue, Aug 6, 2013 at 7:47 PM, Anton Blanchard an...@samba.org wrote:
Add MSR_LE to the msr_mask for POWER7.
Signed-off-by: Anton Blanchard an...@samba.org
Reviewed-by: Anthony Liguori aligu...@us.ibm.com
Thanks, applied to ppc-next.
On 07.08.2013, at 02:47, Anton Blanchard wrote:
Use info-endian to select the endian of the instruction to
be disassembled.
Signed-off-by: Anton Blanchard an...@samba.org
Thanks, applied to ppc-next.
Alex
On 08/14/2013 01:57 PM, Alex Bligh wrote:
I don't agree. The penalty for a qcow2 suffering a false positive on
a change to a backing file is that the VM can no longer boot. The
penalty for your cache suffering a false positive is that the
VM boots marginally slower. Moreover, it is expected
On 14.08.2013, at 15:26, Efimov Vasily wrote:
QEMU has 'dtb' option for specifing the device tree file for the kernel.
The patch adds support for this option to the 'virtex_ml507' machine
implementation.
Signed-off-by: Efimov Vasily r...@ispras.ru
Thanks, applied to ppc-next.
Alex
On 08/14/2013 02:02 PM, Alex Bligh wrote:
Not really. I meant different backing images, and not necessarily
booting on the same host.
So how does your cache solve the problem you mentioned in that
para?
If you have a fast network (think 10GbE), then qcow2 can easily boot
many VMs over
On 14 Aug 2013, at 14:43, Kaveh Razavi wrote:
No, once the read-only cache is created, it can be used by different VMs
on the same host. But yes, it first needs to be created.
OK - this was the point I had missed.
Assuming the cache quota is not exhausted, how do you know how that
a VM has
On 05.08.2013, at 22:59, Andreas Färber wrote:
Commit 03a15a5436ed7723f406f15cc3798aa9991e75b5 claimed to add a POWER7+
model but instead added a POWER7P model, with an unhelpful POWER7P
description on top. Fix this to POWER7+ as we already have POWER3+,
POWER4+ and POWER5+ and there being
On 01.08.2013, at 03:41, Andreas Färber wrote:
Hello,
This mini-series cleans up, enables and complements POWER5+ support, so that
KVM with default -cpu host works on POWER5+ (gs) v2.1.
Thanks to Ben for some valuable hints on how to model POWER5P family!
Regards,
Andreas
Cc:
Am 14.08.2013 15:59, schrieb Alexander Graf:
On 01.08.2013, at 03:41, Andreas Färber wrote:
Hello,
This mini-series cleans up, enables and complements POWER5+ support, so that
KVM with default -cpu host works on POWER5+ (gs) v2.1.
Thanks to Ben for some valuable hints on how to model
The UIP (update in progress) hold time was set to 8 32.768KHz clock
cycles (around 244uS). However the timing diagram in the datasheet
(Figure 16) shows that the UIP bit is held for both the update cycle
time (either 248uS or 1984uS depending on the clock source), and the
minimum time before
On Fri, Aug 09, 2013 at 07:43:51PM +0200, Charlie Shepherd wrote:
Coroutine functions that can yield directly or indirectly should be annotated
with a coroutine_fn annotation. Add an explanation to that effect in
include/block/coroutine.h.
Signed-off-by: Charlie Shepherd
Hi,
On 08/14/2013 11:29 AM, Stefan Hajnoczi wrote:
100 MB is small enough for RAM. Did you try enabling the host kernel
page cache for the backing file? That way all guests running on this
host share a single RAM-cached version of the backing file.
Yes, indeed. That is why we think it
On Fri, Aug 09, 2013 at 07:43:52PM +0200, Charlie Shepherd wrote:
@@ -133,3 +133,8 @@ void coroutine_fn qemu_coroutine_yield(void)
self-caller = NULL;
coroutine_swap(self, to);
}
+
+coroutine_fn Coroutine *qemu_coroutine_self(void)
+{
+return qemu_coroutine_self_int();
+}
On Fri, Aug 09, 2013 at 07:43:53PM +0200, Charlie Shepherd wrote:
diff --git a/block/cow.c b/block/cow.c
index 1cc2e89..34c181a 100644
--- a/block/cow.c
+++ b/block/cow.c
@@ -255,7 +255,7 @@ static void cow_close(BlockDriverState *bs)
{
}
-static int cow_create(const char *filename,
On 08/14/2013 03:50 PM, Alex Bligh wrote:
Assuming the cache quota is not exhausted, how do you know how that
a VM has finished 'creating' the cache? At any point it might
read a bit more from the backing image.
I was assuming on shutdown.
I'm wondering whether you could just use POSIX
On 08/14/2013 05:44 AM, Peter Maydell wrote:
On 14 August 2013 11:33, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
On Mon, Aug 12, 2013 at 04:04:08PM -0700, Guenter Roeck wrote:
Hacked diff is below. Can I write that up as clean patch and submit it,
or do we need a test on real
Maybe this wasn't clear, but in (4) the table is generated by *qemu*
with the values programmed by the firmware.
Yes. I still don't much like it. I'd think it would be much simpler
for qemu to generate the tables once at startup and not have to patch
them at runtime. It also introduces
Quoting Doug Goldstein (2013-08-13 23:05:31)
On Tue, Aug 13, 2013 at 10:10 AM, Michael Roth
mdr...@linux.vnet.ibm.com wrote:
Hi everyone,
The following new patches are queued for QEMU stable v1.5.3:
https://github.com/mdroth/qemu/commits/stable-1.5-staging
The release is planned
On 14 Aug 2013, at 15:26, Kaveh Razavi wrote:
This is a good idea, since it relaxes the requirement for releasing the
cache only on shutdown. I am not sure how the 'finish point' can be
recognized. Full cache quota is one obvious scenario, but I imagine most
VMs do/should not really read
Hello all,
my name is Dacian and I'm new on this mailing list.
I would like to visualize during execution the addresses of the instruction
currently been executed, the address of the memory being read and being written
by the same execution if it applies.
has anyone tried this before maybe is
Am 14.08.2013 um 16:26 hat Kaveh Razavi geschrieben:
On 08/14/2013 03:50 PM, Alex Bligh wrote:
Assuming the cache quota is not exhausted, how do you know how that
a VM has finished 'creating' the cache? At any point it might
read a bit more from the backing image.
I was assuming on
On Wed, Aug 14, 2013 at 2:20 AM, Eric Blake ebl...@redhat.com wrote:
On 08/13/2013 03:05 PM, Taimoor wrote:
From: Taimoor Mirza tmi...@codesourcery.com
port redirection code uses SO_REUSEADDR socket option before binding to
host port. Behavior of SO_REUSEADDR is different on Windows and
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