On some parallel workloads this gives up to a 15% speed improvement.
Signed-off-by: Emilio G. Cota c...@braap.org
---
include/qemu/thread-posix.h | 47 ++
include/qemu/thread.h | 6 --
util/qemu-thread-posix.c| 50
So that the declaration of tb_lock can be found.
Signed-off-by: Emilio G. Cota c...@braap.org
---
hw/i386/kvmvapic.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/i386/kvmvapic.c b/hw/i386/kvmvapic.c
index 1c3b5b6..a9a33fd 100644
--- a/hw/i386/kvmvapic.c
+++ b/hw/i386/kvmvapic.c
@@
Signed-off-by: Emilio G. Cota c...@braap.org
---
aie-helper.c | 3 +-
linux-user/main.c | 4 +-
target-i386/cpu.h | 3 -
target-i386/excp_helper.c | 7 ++
target-i386/helper.h | 6 +-
target-i386/mem_helper.c | 39 +++--
target-i386/translate.c
On 23/08/2015 17:24, Emilio G. Cota wrote:
Note that user-only uses mmap_lock for this.
Signed-off-by: Emilio G. Cota c...@braap.org
Why is this needed? The RCU-like page_find should work just fine.
Paolo
---
translate-all.c | 31 +++
1 file changed, 23
This reverts commit 81f3053b77f7d3a4d9100c425cd8cec99ee7a3d4.
The interrupt raised by the change in the commit above
kills performance when running many idling VCPUs. For example,
on my 64-core host when running a workload where cores are
idling often (e.g. blackscholes), performance drops
On 23/08/2015 17:23, Emilio G. Cota wrote:
+case INDEX_op_fence_load:
+tcg_out_fence(s, 0xe8);
+break;
+case INDEX_op_fence_full:
+tcg_out_fence(s, 0xf0);
+break;
+case INDEX_op_fence_store:
+tcg_out_fence(s, 0xf8);
+break;
+
On 22.08.15 08:32, Cormac O'Brien wrote:
This patchset greatly improves QEMU's ability to run Mac OS 9 on the mac99
machine, allowing progress past the bootloader and partial progress through
the load screen.
Signed-off-by: Cormac O'Brien cor...@c-obrien.org
You don't need to SoB your
Only grab tb_lock when new code has to be generated.
Note that due to the RCU usage we lose the ability to move
recently-found TB's to the beginning of the slot's list.
We could in theory try to do something smart about this,
but given that each CPU has a private tb_jmp_cache, it
might be OK to
On 23/08/2015 17:23, Emilio G. Cota wrote:
On some parallel workloads this gives up to a 15% speed improvement.
Signed-off-by: Emilio G. Cota c...@braap.org
---
include/qemu/thread-posix.h | 47 ++
include/qemu/thread.h | 6 --
On 23/08/2015 17:23, Emilio G. Cota wrote:
Hi all,
Here is MTTCG code I've been working on out-of-tree for the last few months.
The patchset applies on top of pbonzini's mttcg branch, commit ca56de6f.
Fetch the branch from: https://github.com/bonzini/qemu/commits/mttcg
The highlights
On 24.08.15 00:03, Pavel Fedin wrote:
This large region is necessary for some devices like ivshmem and video cards
32-bit kernels can be built without LPAE support. In this case such a kernel
will not be able to use PCI controller which has windows in high addresses.
In order to work around
On 23/08/2015 17:24, Emilio G. Cota wrote:
This is similar in intent to the async_safe_work mechanism. The main
differences are:
- Work is run on a single CPU thread *after* all others are put to sleep
- Sleeping threads are woken up by the worker thread upon completing its job
- A
On 12.08.15 05:12, Pavel Fedin wrote:
This large region is necessary for some devices like ivshmem and video cards
32-bit kernels can be built without LPAE support. In this case such a kernel
will not be able to use PCI controller which has windows in high addresses.
In order to work around
On Wed, Aug 19, 2015 at 01:57:55AM +0200, Alberto Garcia wrote:
We have this code in qjson.c to produce JSON from a QFloat:
QFloat *val = qobject_to_qfloat(obj);
char buffer[1024];
int len;
len = snprintf(buffer, sizeof(buffer), %f, qfloat_get_double(val));
On 22.08.15 08:32, Cormac O'Brien wrote:
This patchset greatly improves QEMU's ability to run Mac OS 9 on the mac99
machine, allowing progress past the bootloader and partial progress through
the load screen.
Signed-off-by: Cormac O'Brien cor...@c-obrien.org
Sorry, I just realized that
Hi, some very old 64-bit processors had virtualization extensions but not
lahf_lm. However, they are very rare, so it is probably a good idea to add it
for the 2.5 machine type.
Thanks,
Paolo
Inviato dal telefono Android mediante TouchDown (www.nitrodesk.com)
-Original Message-
This includes linux/arch/powerpc/include/uapi/asm/eeh.h while
updating linux header files. The specific header file, introduced
by the following Linux upstream commits for EEH on sPAPR platform:
ed3e81f (powerpc/eeh: Move PE state constants around)
ec33d36 (powerpc/eeh: Introduce
Am 24.08.2015 um 13:50 schrieb Paolo Bonzini:
Hi, some very old 64-bit processors had virtualization extensions but not
lahf_lm. However, they are very rare, so it is probably a good idea to add it
for the 2.5 machine type.
Maybe same accounts for sep ?
Will you send a patch?
BR,
Peter
The patch supports RTAS call ibm,errinjct to allow injecting
EEH errors to VFIO PCI devices. The implementation is similiar
to EEH support for VFIO PCI devices: The RTAS request is captured
by QEMU and routed to sPAPRPHBClass::eeh_inject_error() where the
request is translated to VFIO container
When I use the usb_add command, isn't the bus.address number suppose to be
different for each device I add?
If I use the command-line to add a usb mouse and usb sound card like this -usb
-device usb-mouse -device usb-audio, they each have a different bus.address
value when I see them using the
Signed-off-by: Emilio G. Cota c...@braap.org
---
tcg/tcg-op.c | 5 +
tcg/tcg-op.h | 18 ++
tcg/tcg-opc.h | 5 +
3 files changed, 28 insertions(+)
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
index 45098c3..6d5b1df 100644
--- a/tcg/tcg-op.c
+++ b/tcg/tcg-op.c
@@ -57,6
Signed-off-by: Emilio G. Cota c...@braap.org
---
tcg/tcg.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/tcg/tcg.h b/tcg/tcg.h
index 8d30d61..9a873ac 100644
--- a/tcg/tcg.h
+++ b/tcg/tcg.h
@@ -599,6 +599,7 @@ void tb_lock(void);
void tb_unlock(void);
bool tb_lock_recursive(void);
void
Signed-off-by: Emilio G. Cota c...@braap.org
---
Makefile.target| 1 +
aie.c | 57 ++
include/qemu/aie.h | 49 ++
translate-all.c| 2 ++
4 files changed, 109 insertions(+)
Signed-off-by: Emilio G. Cota c...@braap.org
---
include/exec/gen-icount.h | 1 +
translate-all.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/include/exec/gen-icount.h b/include/exec/gen-icount.h
index 05d89d3..f429821 100644
--- a/include/exec/gen-icount.h
+++
Signed-off-by: Emilio G. Cota c...@braap.org
---
tcg/i386/tcg-target.c | 20
1 file changed, 20 insertions(+)
diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c
index 887f22f..6600c45 100644
--- a/tcg/i386/tcg-target.c
+++ b/tcg/i386/tcg-target.c
@@ -1123,6 +1123,13
Signed-off-by: Emilio G. Cota c...@braap.org
---
cpu-exec.c| 34 --
include/qom/cpu.h | 1 +
2 files changed, 29 insertions(+), 6 deletions(-)
diff --git a/cpu-exec.c b/cpu-exec.c
index fd57b9c..a1700ac 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -371,6
Otherwise after an exception we end up in a deadlock.
Signed-off-by: Emilio G. Cota c...@braap.org
---
bsd-user/mmap.c | 12
cpu-exec.c | 1 +
include/exec/exec-all.h | 2 ++
linux-user/mmap.c | 8
4 files changed, 23 insertions(+)
diff --git
Signed-off-by: Emilio G. Cota c...@braap.org
---
include/qemu/rcu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/qemu/rcu.h b/include/qemu/rcu.h
index 7df1e86..f6d1d56 100644
--- a/include/qemu/rcu.h
+++ b/include/qemu/rcu.h
@@ -71,7 +71,7 @@ struct rcu_reader_data
While at it, add an assertion in tb_flush to check for tb_lock
being held.
Signed-off-by: Emilio G. Cota c...@braap.org
---
translate-all.c | 40 +++-
1 file changed, 11 insertions(+), 29 deletions(-)
diff --git a/translate-all.c b/translate-all.c
index
Signed-off-by: Emilio G. Cota c...@braap.org
---
cputlb.c | 39 +++
1 file changed, 11 insertions(+), 28 deletions(-)
diff --git a/cputlb.c b/cputlb.c
index d81a4eb..717a856 100644
--- a/cputlb.c
+++ b/cputlb.c
@@ -145,41 +145,24 @@ void
This avoids the chance of reading a corrupted list of CPUs in usermode.
Note: this breaks hw/ppc/spapr due to the removal of CPU_FOREACH_REVERSE.
Signed-off-by: Emilio G. Cota c...@braap.org
---
exec.c | 16 ++--
include/qom/cpu.h| 15 +++
This will allow us to safely look up TB's without taking any locks.
Note however that tb_lock protects the valid field, so if chaining
is an option then we'll have to acquire the lock.
Signed-off-by: Emilio G. Cota c...@braap.org
---
cpu-exec.c | 23 +++---
Using ccache with CCACHE_BASEDIR set to $(SRC_PATH) or a parent will
rewrite all absolute paths to relative paths. This interacts poorly with
QEMU's two-level build directory scheme. For example, lets say
BUILD_DIR=$(SRC_PATH)/build so build/blockdev.d will contain:
blockdev.o: ../blockdev.c
On 23.08.15 16:42, Laurent Vivier wrote:
All tcg host architectures now support the guest base and as
there is no real performance lost, it can be always enabled.
Anyway, guest base use can be disabled lively by setting guest
base to 0.
CONFIG_USE_GUEST_BASE is defined as
On 23/08/2015 17:23, Emilio G. Cota wrote:
@@ -16,6 +16,7 @@ static inline void gen_tb_start(TranslationBlock *tb)
exitreq_label = gen_new_label();
flag = tcg_temp_new_i32();
+tcg_gen_smp_rmb();
tcg_gen_ld_i32(flag, cpu_env,
offsetof(CPUState,
On 21 August 2015 at 05:47, Gabriel L. Somlo so...@cmu.edu wrote:
On Thu, Aug 20, 2015 at 07:21:48AM +0200, Ard Biesheuvel wrote:
On 19 August 2015 at 22:49, Gabriel L. Somlo so...@cmu.edu wrote:
From: Gabriel L. Somlo so...@cmu.edu
Several different architectures supported by QEMU are set
On 23.08.15 16:42, Laurent Vivier wrote:
Signed-off-by: Laurent Vivier laur...@vivier.eu
I would prefer to have a commit message here. It's not critical in this
patch, but makes life easier for people who dig through them later in
the git log, so they don't see the patch contents.
On 08/21/2015 05:43 PM, Cornelia Huck wrote:
On Fri, 21 Aug 2015 17:05:47 +0800
Jason Wang jasow...@redhat.com wrote:
diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c
index 788b556..c971ba2 100644
--- a/hw/virtio/virtio.c
+++ b/hw/virtio/virtio.c
@@ -1056,6 +1056,17 @@ static bool
On Tue, Aug 11, 2015 at 10:11:03AM +0100, Peter Maydell wrote:
On 10 August 2015 at 08:13, Gavin Shan gws...@linux.vnet.ibm.com wrote:
The header file was introduced by following Linux upstream commits:
commit ed3e81f (powerpc/eeh: Move PE state constants around)
commit ec33d36
Copying the USB maintainer.
Programmingkid programmingk...@gmail.com writes:
On Aug 8, 2015, at 8:48 AM, Programmingkid wrote:
On Aug 8, 2015, at 2:04 AM, Markus Armbruster wrote:
USB devices can be connected with the @option{-usbdevice} commandline
option
-or the @code{usb_add}
This submits changes with formatted commit log while updating Linux
headers using scripts/update-linux-headers.sh.
Signed-off-by: Gavin Shan gws...@linux.vent.ibm.com
---
scripts/update-linux-headers.sh | 21 +
1 file changed, 21 insertions(+)
diff --git
This supports RTAS calls ibm,{open,close}-errinjct to manupliate
the token, which is passed to RTAS call ibm,errinjct to indicate
the valid context for error injection. Each VM is permitted to have
only one token at once and we simply have sequential number for that.
It's notable that the least
Update cpu_model in MachineState for i386, so that the field can be used
for cpu hotplug, instead of using a static variable.
Signed-off-by: Zhu Guihua zhugh.f...@cn.fujitsu.com
---
v2:
-transfer MachineState from all pc_cpus_init() callers
---
hw/i386/pc.c | 16 +++-
It has no callers left.
Signed-off-by: Emilio G. Cota c...@braap.org
---
cpu-exec.c| 10 -
cpus.c| 64 +--
include/qom/cpu.h | 24 +
3 files changed, 2 insertions(+), 96 deletions(-)
diff --git
On 23/08/2015 17:23, Emilio G. Cota wrote:
Otherwise after an exception we end up in a deadlock.
Can you explain better the path that exits cpu_exec with the lock taken?
Also, let's remove the recursive locking by introducing mmap_lock()
already taken variants of target_mprotect and
On 23/08/2015 17:23, Emilio G. Cota wrote:
This paves the way for a lockless tb_find_fast.
Signed-off-by: Emilio G. Cota c...@braap.org
---
cpu-exec.c| 8 +++-
exec.c| 2 ++
include/qom/cpu.h | 15 +++
qom/cpu.c | 2 +-
translate-all.c
On 23/08/2015 17:23, Emilio G. Cota wrote:
Signed-off-by: Emilio G. Cota c...@braap.org
---
cpu-exec.c | 9 ++---
exec.c | 2 +-
hw/openrisc/cputimer.c | 2 +-
qom/cpu.c | 4 ++--
On 12.08.15 05:12, Pavel Fedin wrote:
This large region is necessary for some devices like ivshmem and video cards
32-bit kernels can be built without LPAE support. In this case such a kernel
will not be able to use PCI controller which has windows in high addresses.
In order to work around
On 23/08/2015 17:23, Emilio G. Cota wrote:
This will be used by the atomic instruction emulation code.
Is this a fast path? If not, we can use the existing addend field and
convert the host address to a ram_addr_t easily.
Paolo
Signed-off-by: Emilio G. Cota c...@braap.org
---
If the file is readonly its not expected to grow so
save the blocking call to nfs_fstat_async and use
the value saved at connection time. Also important
the monitor (and thus the main loop) will not hang
if block device info is queried and the NFS share
is unresponsive.
Signed-off-by: Peter
this patch adds a probe that lists all enforceable and migrateable
CPU models to the -cpu help output. The idea is to know a priory
which CPU modules can be exposed to the user without loosing any
feature flags.
Signed-off-by: Peter Lieven p...@kamp.de
---
target-i386/cpu.c | 49
This introduces rtas_ldq() to load 64-bits parameter from continuous
two 4-bytes memory chunk of RTAS parameter buffer, to simplify the
code.
Signed-off-by: Gavin Shan gws...@linux.vnet.ibm.com
---
hw/ppc/spapr_pci.c | 20 ++--
include/hw/ppc/spapr.h | 5 +
2 files
The patchset depends on below Linux upstream commits:
commit ed3e81f (powerpc/eeh: Move PE state constants around)
commit ec33d36 (powerpc/eeh: Introduce eeh_pe_inject_err())
According to PAPR specification 2.7, there're 3 RTAS calls relevent to error
injection: ibm,open-errinjct,
This allows to include stdint.h in virtio header files. Otherwise,
scripts/update-linux-headers.sh fails when updating headers from
Linux 4.2.rc8 kernel. include/uapi/linux/virtio_ring.h starts to
include stdint.h from commit d768f32a (virtio: Fix typecast of
pointer in vring_init()).
On 24.08.15 00:31, Pavel Fedin wrote:
This large region is necessary for some devices like ivshmem and video cards
32-bit kernels can be built without LPAE support. In this case such a kernel
will not be able to use PCI controller which has windows in high addresses.
In order to work around
Signed-off-by: Emilio G. Cota c...@braap.org
---
aie-helper.c | 112 ++
include/exec/cpu-defs.h | 5 +++
include/qemu/aie-helper.h | 6 +++
3 files changed, 123 insertions(+)
create mode 100644 aie-helper.c
create mode 100644
Hi all,
Here is MTTCG code I've been working on out-of-tree for the last few months.
The patchset applies on top of pbonzini's mttcg branch, commit ca56de6f.
Fetch the branch from: https://github.com/bonzini/qemu/commits/mttcg
The highlights of the patchset are as follows:
- The first 5
Note that user-only uses mmap_lock for this.
Signed-off-by: Emilio G. Cota c...@braap.org
---
translate-all.c | 31 +++
1 file changed, 23 insertions(+), 8 deletions(-)
diff --git a/translate-all.c b/translate-all.c
index e7b4a31..8f8c402 100644
--- a/translate-all.c
This will be used by atomic instruction emulation code.
Signed-off-by: Emilio G. Cota c...@braap.org
---
include/qemu/radix-tree.h | 29 ++
util/Makefile.objs| 2 +-
util/radix-tree.c | 75 +++
3 files changed, 105
On 23/08/2015 17:24, Emilio G. Cota wrote:
This reverts commit 81f3053b77f7d3a4d9100c425cd8cec99ee7a3d4.
The interrupt raised by the change in the commit above
kills performance when running many idling VCPUs. For example,
on my 64-core host when running a workload where cores are
idling
On 23/08/2015 17:24, Emilio G. Cota wrote:
Signed-off-by: Emilio G. Cota c...@braap.org
---
cputlb.c | 41 +++--
1 file changed, 11 insertions(+), 30 deletions(-)
As suggested by me and Peter, synchronization on TLB flushes should be
arch-specific. CPUs
This is similar in intent to the async_safe_work mechanism. The main
differences are:
- Work is run on a single CPU thread *after* all others are put to sleep
- Sleeping threads are woken up by the worker thread upon completing its job
- A flag as been added to tcg_ctx so that only one thread
On 08/21/2015 11:47 PM, Eduardo Habkost wrote:
On Fri, Aug 21, 2015 at 05:05:45PM +0800, Jason Wang wrote:
[...]
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index a896624..2a7b7d9 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -304,9 +304,15 @@ static void
On 23.08.15 03:50, Mark Cave-Ayland wrote:
The code to flush the DBDMA channel was effectively duplicated in
dbdma_control_write(), except for the fact that the copy executed outside of a
RUN bit transition was broken by not clearing the FLUSH bit once the flush was
complete.
Newer PPC
This large region is necessary for some devices like ivshmem and video cards
32-bit kernels can be built without LPAE support. In this case such a kernel
will not be able to use PCI controller which has windows in high addresses.
In order to work around the problem, highmem option is introduced.
On 08/22/2015 08:10 AM, David Gibson wrote:
On Fri, Aug 21, 2015 at 05:05:46PM +0800, Jason Wang wrote:
This will be used by virtio 1.0 virtio-pci virtqueue migration
backward compatibility.
Cc: David Gibson da...@gibson.dropbear.id.au
Cc: Alexander Graf ag...@suse.de
Cc:
On Mon, Aug 24, 2015 at 05:23:15PM +1000, Gavin Shan wrote:
On Tue, Aug 11, 2015 at 10:11:03AM +0100, Peter Maydell wrote:
On 10 August 2015 at 08:13, Gavin Shan gws...@linux.vnet.ibm.com wrote:
The header file was introduced by following Linux upstream commits:
commit ed3e81f (powerpc/eeh:
c13dcf9 Linux 4.2-rc8
Signed-off-by: Gavin Shan gws...@linux.vnet.ibm.com
---
include/standard-headers/linux/pci_regs.h| 381 ---
include/standard-headers/linux/virtio_ring.h | 3 +-
linux-headers/asm-powerpc/eeh.h | 56
Signed-off-by: Emilio G. Cota c...@braap.org
---
util/qemu-thread-posix.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/util/qemu-thread-posix.c b/util/qemu-thread-posix.c
index 04dae0f..3760e27 100644
--- a/util/qemu-thread-posix.c
+++ b/util/qemu-thread-posix.c
Signed-off-by: Emilio G. Cota c...@braap.org
---
linux-user/syscall.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index f62c698..732936f 100644
--- a/linux-user/syscall.c
+++ b/linux-user/syscall.c
@@ -4513,6 +4513,7 @@ static void
This will be used by the atomic instruction emulation code.
Signed-off-by: Emilio G. Cota c...@braap.org
---
softmmu_template.h | 48
tcg/tcg.h | 5 +
2 files changed, 53 insertions(+)
diff --git a/softmmu_template.h
Signed-off-by: Emilio G. Cota c...@braap.org
---
tcg/tcg-op.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h
index 52482c0..3ec9f13 100644
--- a/tcg/tcg-op.h
+++ b/tcg/tcg-op.h
@@ -716,6 +716,16 @@ static inline void tcg_gen_fence_full(void)
On 23/08/2015 17:23, Emilio G. Cota wrote:
So that it applies to usermode as well.
Signed-off-by: Emilio G. Cota c...@braap.org
---
cpu-exec.c | 2 ++
cpus.c | 1 -
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/cpu-exec.c b/cpu-exec.c
index b8a11e1..2b9a447 100644
Signed-off-by: Emilio G. Cota c...@braap.org
---
translate-all.c | 28
1 file changed, 28 insertions(+)
diff --git a/translate-all.c b/translate-all.c
index df65c83..e7b4a31 100644
--- a/translate-all.c
+++ b/translate-all.c
@@ -252,6 +252,8 @@ static int
This paves the way for a lockless tb_find_fast.
Signed-off-by: Emilio G. Cota c...@braap.org
---
cpu-exec.c| 8 +++-
exec.c| 2 ++
include/qom/cpu.h | 15 +++
qom/cpu.c | 2 +-
translate-all.c | 32 +++-
5 files
Signed-off-by: Emilio G. Cota c...@braap.org
---
cputlb.c | 41 +++--
1 file changed, 11 insertions(+), 30 deletions(-)
diff --git a/cputlb.c b/cputlb.c
index 1b3673e..d81a4eb 100644
--- a/cputlb.c
+++ b/cputlb.c
@@ -73,43 +73,24 @@ void tlb_flush(CPUState
Signed-off-by: Emilio G. Cota c...@braap.org
---
cpu-exec.c | 9 ++---
exec.c | 2 +-
hw/openrisc/cputimer.c | 2 +-
qom/cpu.c | 4 ++--
target-arm/helper-a64.c| 2 +-
target-arm/helper.c
The hash table size allocated to guest depends on the maxmem size.
If the host isn't able to allocate the required hash table size but
instead allocates less than the optimal requested size, then it will
not be possible to grow the RAM until maxmem via memory hotplug.
Attempts to hotplug memory
On 21/08/2015 15:54, Eduardo Habkost wrote:
+if (tcg_enabled()) {
+memory_region_add_subregion_overlap(cpu-cpu_as_root,
+apic-apicbase
+MSR_IA32_APICBASE_BASE,
+
Hi Michael,
-Original Message-
From: snabb-de...@googlegroups.com [mailto:snabb-
de...@googlegroups.com] On Behalf Of Michael S. Tsirkin
Sent: Thursday, August 13, 2015 5:23 PM
To: Ouyang, Changchun
Cc: qemu-devel@nongnu.org; snabb-de...@googlegroups.com;
thibaut.col...@6wind.com;
On Mon 24 Aug 2015 12:05:02 PM CEST, Markus Armbruster wrote:
This seems to happen because of GTK+ calling setlocale(). The easiest
solution is probably to call setlocale(LC_NUMERIC, C) before
snprintf() (or at start-up ui/gtk.c), but opinions are welcome.
A library calling setlocale() is a
Eric Blake ebl...@redhat.com writes:
On 08/04/2015 02:18 AM, Markus Armbruster wrote:
A command's or event's 'data' must be a struct type, given either as a
dictionary, or as struct type name.
Commit dd883c6 tightened the checking there, but not enough: we still
accept 'union'. Fix to
Hi, some very old 64-bit processors had virtualization extensions but not
lahf_lm. However, they are very rare, so it is probably a good idea to add it
for the 2.5 machine type.
Thanks,
Paolo
Inviato dal telefono Android mediante TouchDown (www.nitrodesk.com)
-Original Message-
This large region is necessary for some devices like ivshmem and video cards
32-bit kernels can be built without LPAE support. In this case such a kernel
will not be able to use PCI controller which has windows in high addresses.
In order to work around the problem, highmem option is introduced.
On 08/24/2015 05:30 AM, Markus Armbruster wrote:
We mentioned moving this into its own patch. In particular, I looked at
what it would take to allow anonymous structs for flat union types:
{ 'union': 'Flat', 'base': 'Base',
'discriminator': 'type',
'data': { 'branch1': {},
This one is
As we have removed CONFIG_USE_GUEST_BASE, we always use a guest base
and the macros GUEST_BASE and RESERVED_VA become useless: replace
them by their values.
Signed-off-by: Laurent Vivier laur...@vivier.eu
---
v2: add a commit message. Repost only PATCH 2.
include/exec/cpu-all.h | 4 +---
Switch VNC server over to using the QCryptoTLSSession object
for the TLS session. This removes the direct use of gnutls
from the VNC server code. It also removes most knowledge
about TLS certificate handling from the VNC server code.
This has the nice effect that all the CONFIG_VNC_TLS
John Snow js...@redhat.com writes:
On 08/19/2015 02:55 AM, Dr. David Alan Gilbert wrote:
* Eduardo Habkost (ehabk...@redhat.com) wrote:
Migration with q35 was not possible before commit
04329029a8c539eb5f75dcb6d8b016f0c53a031a, because q35 unconditionally
creates
an ich9-ahci device, that
Introduce a QCryptoTLSSession object that will encapsulate
all the code for setting up and using a client/sever TLS
session. This isolates the code which depends on the gnutls
library, avoiding #ifdefs in the rest of the codebase, as
well as facilitating any possible future port to other TLS
About structs and constraints:
== Optional Header ==
64bit nb_dirty_bitmaps
valid: 1 - 65536. I think here should not be 0, in this case
dirty-bitmap-optional-header should not exist at all. Should it instead
be 0 - 65536
64bit dirty_bitmaps_offset
valid: any, but
On Mon, Aug 24, 2015 at 2:23 AM, Emilio G. Cota c...@braap.org wrote:
Hi all,
Here is MTTCG code I've been working on out-of-tree for the last few months.
The patchset applies on top of pbonzini's mttcg branch, commit ca56de6f.
Fetch the branch from:
On 24 August 2015 at 13:03, Gavin Shan gws...@linux.vnet.ibm.com wrote:
This submits changes with formatted commit log while updating Linux
headers using scripts/update-linux-headers.sh.
Signed-off-by: Gavin Shan gws...@linux.vent.ibm.com
Thanks for writing a patch for this.
---
From: Chen Gang xili_gchen_5...@hotmail.com
They are based on Linux kernel tilegx architecture for 64 bit binary,
and also based on tilegx ABI reference document, and also reference from
other targets implementations.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson r...@twiddle.net
---
target-tilegx/translate.c | 51 +++
1 file changed, 51 insertions(+)
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index af4b34a..1224a8e 100644
--- a/target-tilegx/translate.c
Signed-off-by: Richard Henderson r...@twiddle.net
---
linux-user/main.c | 3 +++
target-tilegx/cpu.c | 5 -
target-tilegx/cpu.h | 2 ++
3 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/linux-user/main.c b/linux-user/main.c
index 2d4b0b4..5ca09d2 100644
--- a/linux-user/main.c
Omitting crc instructions.
Signed-off-by: Richard Henderson r...@twiddle.net
---
target-tilegx/helper.c| 23 ++
target-tilegx/helper.h| 2 ++
target-tilegx/translate.c | 60 ++-
3 files changed, 84 insertions(+), 1 deletion(-)
Signed-off-by: Richard Henderson r...@twiddle.net
---
target-tilegx/translate.c | 1145 +
1 file changed, 1145 insertions(+)
create mode 100644 target-tilegx/translate.c
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
new file mode
Signed-off-by: Richard Henderson r...@twiddle.net
---
target-tilegx/translate.c | 96 ++-
1 file changed, 87 insertions(+), 9 deletions(-)
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index ddee2b0..37c6ec5 100644
---
On 08/24/2015 03:17 AM, Peter Lieven wrote:
this patch adds a probe that lists all enforceable and migrateable
CPU models to the -cpu help output. The idea is to know a priory
which CPU modules can be exposed to the user without loosing any
feature flags.
Signed-off-by: Peter Lieven
On 24 August 2015 at 11:03, françois Guerret
francois.guer...@hotmail.fr wrote:
Hello,
I use qemu to emulate a SMP multicore processor and I am looking for a way :
* either to ask qemu scheduler to execute an other core. For that I need a
kind of
*yield()* syscall that I could insert
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