Re: [Qemu-devel] [PATCH 4/6] i.MX: Add i.MX6 System Reset Controller device.

On 6 February 2016 at 20:07, Jean-Christophe DUBOIS wrote: > Le 02/02/2016 17:46, Peter Maydell a écrit : >> >> On 26 January 2016 at 21:45, Jean-Christophe Dubois >> wrote: >>> +static void imx6_src_reset(DeviceState *dev) >>> +{ >>> +

Re: [Qemu-devel] [PATCH 15/37] tcg: Clean up includes

On Feb 7, 2016 00:43, Peter Maydell wrote: > Alternatively we could rename these tcg-target.c > files to some other extension that makes it clearer that > they're not standalone source files. Maybe for next cycle I can get around my goal of changing this around to be

Re: [Qemu-devel] [PATCH 4/6] i.MX: Add i.MX6 System Reset Controller device.

Le 02/02/2016 17:46, Peter Maydell a écrit : On 26 January 2016 at 21:45, Jean-Christophe Dubois wrote: This controller is also present in i.MX5X devices but they are not yet emulated by Qemu. QEMU is all-caps. Signed-off-by: Jean-Christophe Dubois

Re: [Qemu-devel] [PATCH RFC] external backup api

On 05.02.2016 22:48, John Snow wrote: On 01/22/2016 12:07 PM, Vladimir Sementsov-Ogievskiy wrote: Hi all. This is the early begin of the series which aims to add external backup api. This is needed to allow backup software use our dirty bitmaps. Vmware and Parallels Cloud Server have this

[Qemu-devel] [PATCH COLO-Frame v14 17/40] COLO failover: Introduce a new command to trigger a failover

We leave users to choose whatever heartbeat solution they want, if the heartbeat is lost, or other errors they detect, they can use experimental command 'x_colo_lost_heartbeat' to tell COLO to do failover, COLO will do operations accordingly. For example, if the command is sent to the PVM, the

[Qemu-devel] [PATCH COLO-Frame v14 27/40] migration/savevm: Add new helpers to process the different stages of loadvm

There are several stages during loadvm process. In different stage, migration incoming processes different section. We want to control these stages more accuracy, to optimize the COLO capability. Here we add two new helper functions: qemu_loadvm_state_begin() and qemu_load_device_state().

[Qemu-devel] [PATCH COLO-Frame v14 22/40] COLO failover: Shutdown related socket fd when do failover

If the net connection between COLO's two sides is broken while colo/colo incoming thread is blocked in 'read'/'write' socket fd. It will not detect this error until connect timeout. It will be a long time. Here we shutdown all the related socket file descriptors to wake up the blocking

[Qemu-devel] [PATCH COLO-Frame v14 00/40] COarse-grain LOck-stepping(COLO) Virtual Machines for Non-stop Service (FT)

This is the 14th version of COLO (Still only support periodic checkpoint). Here is only COLO frame part, you can get the whole codes from github: https://github.com/coloft/qemu/commits/colo-v2.5-periodic-mode There are little changes for this series except the network releated part. We have

[Qemu-devel] [PATCH COLO-Frame v14 10/40] COLO: Save PVM state to secondary side when do checkpoint

The main process of checkpoint is to synchronize SVM with PVM. VM's state includes ram and device state. So we will migrate PVM's state to SVM when do checkpoint, just like migration does. We will cache PVM's state in slave, we use QEMUSizedBuffer to store the data, we need to know the size of VM

[Qemu-devel] [PATCH COLO-Frame v14 26/40] savevm: Introduce two helper functions for save/find loadvm_handlers entry

For COLO's checkpoint process, we will do savevm/loadvm repeatedly. So every time we call qemu_loadvm_section_start_full(), we will add all sections information into loadvm_handlers list for one time. There will be many instances in loadvm_handlers for one section, and this will lead to memory

[Qemu-devel] [PATCH COLO-Frame v14 23/40] COLO failover: Don't do failover during loading VM's state

We should not do failover work while the main thread is loading VM's state, otherwise it will destroy the consistent of VM's memory and device state. Here we add a new failover status 'RELAUNCH' which means we should relaunch the process of failover. Signed-off-by: zhanghailiang

Re: [Qemu-devel] [PULL 06/49] virtio: move allocation to virtqueue_pop/vring_pop

On Fri, Feb 05, 2016 at 12:52:55PM +, Peter Maydell wrote: > On 4 February 2016 at 21:51, Michael S. Tsirkin wrote: > > From: Paolo Bonzini > > > > The return code of virtqueue_pop/vring_pop is unused except to check for > > errors or 0. We can thus

Re: [Qemu-devel] [PATCH 3/3] target-arm: Fix IL bit reported for Thumb VFP and Neon traps

On 05.02.2016 17:37, Peter Maydell wrote: > All Thumb Neon and VFP instructions are 32 bits, so the IL > bit in the syndrome register should be set. Pass false to the > syn_* function's is_16bit argument rather than s->thumb > so we report the correct IL bit. > > Signed-off-by: Peter Maydell

Re: [Qemu-devel] [PATCH 2/3] target-arm: Fix IL bit reported for Thumb coprocessor traps

On 05.02.2016 17:37, Peter Maydell wrote: > All Thumb coprocessor instructions are 32 bits, so the IL > bit in the syndrome register should be set. Pass false to the > syn_* function's is_16bit argument rather than s->thumb > so we report the correct IL bit. > > Signed-off-by: Peter Maydell

Re: [Qemu-devel] [Qemu-arm] [PATCH 1/3] target-arm: Correct misleading 'is_thumb' syn_* parameter names

On 05.02.2016 17:37, Peter Maydell wrote: > In syndrome register values, the IL bit indicates the instruction > length, and is 1 for 4-byte instructions and 0 for 2-byte > instructions. All A64 and A32 instructions are 4-byte, but > Thumb instructions may be either 2 or 4 bytes long. Unfortunately

Re: [Qemu-devel] [PATCH 5/7] target-arm: Add isread parameter to CPAccessFns

On 03.02.2016 16:38, Peter Maydell wrote: > System registers might have access requirements which need to > be described via a CPAccessFn and which differ for reads and > writes. For this to be possible we need to pass the access > function a parameter to tell it whether the access being checked >

[Qemu-devel] [PULL v2 00/45] pc and misc cleanups and fixes, virtio optimizations

The following changes since commit 382d34ff9fcc534db32d54eb82590de7c04f9b33: Merge remote-tracking branch 'remotes/stefanha/tags/tracing-pull-request' into staging (2016-02-03 19:00:33 +) are available in the git repository at: git://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git

[Qemu-devel] [PULL v2 01/45] Fix virtio migration

From: "Dr. David Alan Gilbert" I misunderstood the vmstate macro definition when I reworked the virtio .get/.put. The VMSTATE_STRUCT_VARRAY_KNOWN, was described as being for "a variable length array (i.e. _type *_field) but we know the length". However it actually specified

[Qemu-devel] [PULL v2 25/45] ipmi: add ACPI power and GUID commands

From: Cédric Le Goater >From the specs (20.8 Get Device GUID Command), the command needs to return a GUID (Globally Unique ID), or UUID, that should never change over the lifetime of the device. qemu_uuid looked like a good candidate to start with but we could use a specific BMC

[Qemu-devel] [PULL v2 16/45] vhost-user-test: use correct ROM to speed up and avoid spurious failures

From: Paolo Bonzini The mechanism to get the option ROM for virtio-net does not block the PCI ROM from being loaded. Therefore, in vhost-user-test there are two entries in the boot menu for the virtio-net card: one as an embedded option ROM, one from the ROM BAR. The

[Qemu-devel] [PULL v2 31/45] acpi: Don't save PcGuestInfo on AcpiBuildState

From: Eduardo Habkost We don't need to save the pointer on AcpiBuildState, as it is not used anymore. Signed-off-by: Eduardo Habkost Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by:

[Qemu-devel] [PULL v2 34/45] pc: Remove PcGuestInfo.isapc_ram_fw field

From: Eduardo Habkost The code can use the PCMachineClass.pci_enabled field directly. Signed-off-by: Eduardo Habkost Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Marcel Apfelbaum

[Qemu-devel] [PULL v2 24/45] ipmi: add GET_SYS_RESTART_CAUSE chassis command

From: Cédric Le Goater This is a simulator. Just return an unknown cause (0). Signed-off-by: Cédric Le Goater Acked-by: Corey Minyard Reviewed-by: Greg Kurz Acked-by: Michael S. Tsirkin

[Qemu-devel] [PULL v2 14/45] virtio: combine write of an entry into used ring

From: Vincenzo Maffione Fill in an element of the used ring with a single combined access to the guest physical memory, rather than using two separated accesses. This reduces the overhead due to expensive address translation. Signed-off-by: Vincenzo Maffione

[Qemu-devel] [PULL v2 13/45] virtio: read avail_idx from VQ only when necessary

From: Vincenzo Maffione The virtqueue_pop() implementation needs to check if the avail ring contains some pending buffers. To perform this check, it is not always necessary to fetch the avail_idx in the VQ memory, which is expensive. This patch introduces a shadow variable

[Qemu-devel] [PULL v2 21/45] ipmi: fix SDR length value

From: Cédric Le Goater The IPMI BMC simulator populates the SDR table with a set of initial SDRs. The length of each SDR is taken from the record itself (byte 4) which does not include the size of the header. But, the full length (header + data) is required by the

[Qemu-devel] [PULL v2 32/45] pc: Remove compat fields from PcGuestInfo

From: Eduardo Habkost Remove the fields: legacy_acpi_table_size, has_acpi_build, has_reserved_memory, and rsdp_in_ram from PcGuestInfo, and let the existing code use the PCMachineClass fields directly. Signed-off-by: Eduardo Habkost Reviewed-by:

Re: [Qemu-devel] [PATCH 7/7] target-arm: Enable EL3 for Cortex-A53 and Cortex-A57

On Wed, Feb 03, 2016 at 01:38:41PM +, Peter Maydell wrote: > Enable EL3 support for our Cortex-A53 and Cortex-A57 CPU models. > We have enough implemented now to be able to run real world code > at least to some extent (I can boot ARM Trusted Firmware to the > point where it pulls in OP-TEE

Re: [Qemu-devel] [PATCH v2 0/5] q35: Remove old machines and unused compat code

On Fri, Feb 05, 2016 at 12:46:11PM -0200, Eduardo Habkost wrote: > On Fri, Feb 05, 2016 at 12:14:16AM +0200, Michael S. Tsirkin wrote: > > On Thu, Feb 04, 2016 at 05:09:44PM -0200, Eduardo Habkost wrote: > > > On Thu, Feb 04, 2016 at 08:02:30PM +0200, Michael S. Tsirkin wrote: > > > > On Thu, Feb

[Qemu-devel] [PULL v2 12/45] virtio: cache used_idx in a VirtQueue field

From: Vincenzo Maffione Accessing used_idx in the VQ requires an expensive access to guest physical memory. Before this patch, 3 accesses are normally done for each pop/push/notify call. However, since the used_idx is only written by us, we can track it in our internal data

[Qemu-devel] [PULL v2 09/45] virtio: slim down allocation of VirtQueueElements

From: Paolo Bonzini Build the addresses and s/g lists on the stack, and then copy them to a VirtQueueElement that is just as big as required to contain this particular s/g list. The cost of the copy is minimal compared to that of a large malloc. When virtqueue_map is used

[Qemu-devel] [PULL v2 15/45] hw/pxb: add pxb devices to the bridge category

From: Marcel Apfelbaum Signed-off-by: Marcel Apfelbaum Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/pci-bridge/pci_expander_bridge.c | 2 ++ 1 file changed, 2 insertions(+) diff --git

[Qemu-devel] [PULL v2 11/45] virtio: combine the read of a descriptor

From: Paolo Bonzini Compared to vring, virtio has a performance penalty of 10%. Fix it by combining all the reads for a descriptor in a single address_space_read call. This also simplifies the code nicely. Reviewed-by: Cornelia Huck

[Qemu-devel] [PULL v2 08/45] virtio: introduce virtqueue_alloc_element

From: Paolo Bonzini Allocate the arrays for in_addr/out_addr/in_sg/out_sg outside the VirtQueueElement. For now, virtqueue_pop and vring_pop keep allocating a very large VirtQueueElement. Reviewed-by: Cornelia Huck Signed-off-by: Paolo Bonzini

[Qemu-devel] [PULL v2 43/45] intel_iommu: large page support

From: Jason Wang Current intel_iommu only supports 4K page which may not be sufficient to cover guest working set. This patch tries to enable 2M and 1G mapping for intel_iommu. This is also useful for future device IOTLB implementation to have a better hit rate. Major work

[Qemu-devel] [PULL v2 45/45] net: set endianness on all backend devices

From: Laurent Vivier commit 5be7d9f1b1452613b95c6ba70b8d7ad3d0797991 vhost-net: tell tap backend about the vnet endianness makes vhost net to set the endianness of the device, but only for the first device. In case of multiqueue, we have multiple devices... This

[Qemu-devel] [PULL v2 44/45] fix MSI injection on Xen

From: Stefano Stabellini On Xen MSIs can be remapped into pirqs, which are a type of event channels. It's mostly for the benefit of PCI passthrough devices, to avoid the overhead of interacting with the emulated lapic. However remapping interrupts and MSIs is

[Qemu-devel] [PULL v2 22/45] ipmi: introduce a struct ipmi_sdr_compact

From: Cédric Le Goater Currently, sdr attributes are identified using byte offsets and this can be a bit confusing. This patch adds a struct ipmi_sdr_compact conforming to the IPMI specs and replaces byte offsets with names. It also introduces and uses a struct ipmi_sdr_header

[Qemu-devel] [PULL v2 42/45] dimm: Correct type of MemoryHotplugState->base

From: David Gibson The 'base' field of MemoryHotplugState is ram_addr_t, which indicates that it exists in the abstract address space of RAM regions. However, the actual usage of this field indicates that it is a concrete physical address (it's passed as an offset

[Qemu-devel] [PULL v2 27/45] pc: Eliminate struct PcGuestInfoState

From: Eduardo Habkost Instead of allocating a new struct just for PcGuestInfo and the mchine_done Notifier, place them inside PCMachineState. Signed-off-by: Eduardo Habkost Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S.

[Qemu-devel] [PULL v2 23/45] ipmi: add get and set SENSOR_TYPE commands

From: Cédric Le Goater Signed-off-by: Cédric Le Goater Acked-by: Corey Minyard Reviewed-by: Greg Kurz Acked-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin ---

[Qemu-devel] [PULL v2 38/45] acpi: take oem_id in build_header(), optionally

From: Laszlo Ersek This patch is the continuation of commit 8870ca0e94f2 ("acpi: support specified oem table id for build_header"). It will allow us to control the OEM ID field too in the SDT header. Cc: "Michael S. Tsirkin" (supporter:ACPI/SMBIOS) Cc: Igor

Re: [Qemu-devel] [PATCH 4/7] target-arm: Update arm_generate_debug_exceptions() to handle EL2/EL3

On 03.02.2016 16:38, Peter Maydell wrote: > The arm_generate_debug_exceptions() function as originally implemented > assumes no EL2 or EL3. Since we now have much more of an implementation > of those now, fix this assumption. > > Signed-off-by: Peter Maydell

Re: [Qemu-devel] [PATCH 2/7] target-arm: Implement MDCR_EL3 and SDCR

On 03.02.2016 16:38, Peter Maydell wrote: > Implement the MDCR_EL3 register (which is SDCR for AArch32). > For the moment we implement it as reads-as-written. > > Signed-off-by: Peter Maydell > --- > target-arm/cpu.h| 1 + > target-arm/helper.c | 24

[Qemu-devel] [PULL v2 07/45] virtio: introduce qemu_get/put_virtqueue_element

From: Paolo Bonzini Move allocation to virtio functions also when loading/saving a VirtQueueElement. This will also let the load/save functions keep backwards compatibility when the VirtQueueElement layout is changed. Reviewed-by: Cornelia Huck

[Qemu-devel] [PULL v2 02/45] pc: acpi: merge SSDT into DSDT

From: Igor Mammedov Since both tables are built dynamically now, there is no point in keeping ASL in them in separate tables. So do the same as we do for ARM where we have only DSDT table, i.e. move SSDT ASL into DSDT and drop SSDT altogether. This patch doesn't change moved

[Qemu-devel] [PULL v2 04/45] tests: pc: acpi: add expected DSDT.bridge blobs and update DSDT blobs

From: Igor Mammedov Signed-off-by: Igor Mammedov Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/acpi-test-data/pc/DSDT | Bin 3028 -> 5478 bytes

[Qemu-devel] [PULL v2 05/45] virtio: move VirtQueueElement at the beginning of the structs

From: Paolo Bonzini The next patch will make virtqueue_pop/vring_pop allocate memory for the VirtQueueElement. In some cases (blk, scsi, gpu) the device wants to extend VirtQueueElement with device-specific fields and, until now, the place of the VirtQueueElement within the

[Qemu-devel] [PULL v2 03/45] tests: pc: acpi: drop not needed 'expected SSDT' blobs

From: Igor Mammedov Signed-off-by: Igor Mammedov Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/acpi-test-data/pc/SSDT | Bin 2486 -> 0 bytes tests/acpi-test-data/pc/SSDT.bridge

[Qemu-devel] [PULL v2 40/45] acpi: add function to extract oem_id and oem_table_id from the user's SLIC

From: Laszlo Ersek The acpi_get_slic_oem() function stores pointers to these fields in the (first) SLIC table that the user passes in with the -acpitable switch. Cc: "Michael S. Tsirkin" (supporter:ACPI/SMBIOS) Cc: Igor Mammedov

[Qemu-devel] [PULL v2 33/45] pc: Remove RAM size fields from PcGuestInfo

From: Eduardo Habkost The ACPI code can use the PCMachineState fields directly. Signed-off-by: Eduardo Habkost Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Marcel Apfelbaum

[Qemu-devel] [PULL v2 41/45] pc: set the OEM fields in the RSDT and the FADT from the SLIC

From: Laszlo Ersek The Microsoft spec about the SLIC and MSDM ACPI tables at requires the OEM ID and OEM Table ID fields to be consistent between the SLIC and the RSDT/XSDT. That further affects the FADT, because a similar

[Qemu-devel] [PULL v2 36/45] pc: Move APIC and NUMA data from PcGuestInfo to PCMachineState

From: Eduardo Habkost Signed-off-by: Eduardo Habkost Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Marcel Apfelbaum --- include/hw/i386/pc.h | 14 +-

[Qemu-devel] [PULL v2 39/45] acpi: expose oem_id and oem_table_id in build_rsdt()

From: Laszlo Ersek Since build_rsdt() is implemented as common utility code (in "hw/acpi/aml-build.c"), it should expose -- and forward -- the oem_id and oem_table_id parameters between board code and the generic build_header() function. Cc: "Michael S. Tsirkin"

Re: [Qemu-devel] [PATCH 3/7] target-arm: Use access_trap_aa32s_el1() for SCR and MVBAR

On Sat, Feb 06, 2016 at 01:48:19PM +, Peter Maydell wrote: > On 6 February 2016 at 12:17, Edgar E. Iglesias > wrote: > > It seems to me like if EL3 is running in AArch32, then we shouldn't > > trap accesses from Secure EL1 but I can't find that logic. Am I missing >

[Qemu-devel] [PULL v2 28/45] pc: Simplify pc_memory_init() signature

From: Eduardo Habkost We can get the PcGuestInfo struct directly from PCMachineState, and the return value is not needed at all. Signed-off-by: Eduardo Habkost Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin

[Qemu-devel] [PULL v2 35/45] pc: Move PcGuestInfo.fw_cfg to PCMachineState

From: Eduardo Habkost Signed-off-by: Eduardo Habkost Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Marcel Apfelbaum --- include/hw/i386/pc.h | 2 +-

[Qemu-devel] [PULL v2 37/45] pc: Eliminate PcGuestInfo struct

From: Eduardo Habkost The struct is not used for anything, now. Signed-off-by: Eduardo Habkost Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- include/hw/i386/pc.h | 7 +-- hw/i386/pc.c

[Qemu-devel] [PULL v2 17/45] hw/pci: ensure that only PCI/PCIe bridges can be attached to pxb/pxb-pcie devices

From: Marcel Apfelbaum PCI devices can't be plugged directly into PCI extra root bridges because their resources can't be computed by firmware before the ACPI tables are loaded. Signed-off-by: Marcel Apfelbaum Reviewed-by: Michael S. Tsirkin

[Qemu-devel] [PULL v2 26/45] pc: Move PcGuestInfo declaration to top of file

From: Eduardo Habkost The struct will be used inside PCMachineState. Signed-off-by: Eduardo Habkost Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Marcel Apfelbaum

[Qemu-devel] [PULL v2 30/45] acpi: Remove guest_info parameters from functions

From: Eduardo Habkost We can use PC_MACHINE(qdev_get_machine())->acpi_guest_info to get guest_info. Signed-off-by: Eduardo Habkost Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin ---

[Qemu-devel] [PULL v2 19/45] ipmi: replace *_MAXCMD defines

From: Cédric Le Goater ARRAY_SIZE() is simple to use and removes the need to pre-define the size of the command arrays. Signed-off-by: Cédric Le Goater Reviewed-by: Greg Kurz Acked-by: Michael S. Tsirkin

Re: [Qemu-devel] [PATCH 3/7] target-arm: Use access_trap_aa32s_el1() for SCR and MVBAR

On Wed, Feb 03, 2016 at 01:38:37PM +, Peter Maydell wrote: > The registers MVBAR and SCR should have the behaviour of trapping to > EL3 if accessed from Secure EL1, but we were incorrectly implementing > them to UNDEF (which would trap to EL1). Fix this by using the new >

Re: [Qemu-devel] [Qemu-arm] [PATCH 1/7] target-arm: Fix typo in comment in arm_is_secure_below_el3()

On 03.02.2016 16:38, Peter Maydell wrote: > Fix a typo where "EL2" was written but "EL3" intended. > > Signed-off-by: Peter Maydell Reviewed-by: Sergey Fedorov > --- > target-arm/cpu.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > >

Re: [Qemu-devel] [PATCH 5/7] target-arm: Add isread parameter to CPAccessFns

On Wed, Feb 03, 2016 at 01:38:39PM +, Peter Maydell wrote: > System registers might have access requirements which need to > be described via a CPAccessFn and which differ for reads and > writes. For this to be possible we need to pass the access > function a parameter to tell it whether the

Re: [Qemu-devel] [PATCH 6/7] target-arm: Implement NSACR trapping behaviour

On Wed, Feb 03, 2016 at 01:38:40PM +, Peter Maydell wrote: > Implement some corner cases of the behaviour of the NSACR > register on ARMv8: > * if EL3 is AArch64 then accessing the NSACR from Secure EL1 >with AArch32 should trap to EL3 > * if EL3 is not present or is AArch64 then reads

Re: [Qemu-devel] [PATCH 7/7] target-arm: Enable EL3 for Cortex-A53 and Cortex-A57

On 03.02.2016 16:38, Peter Maydell wrote: > Enable EL3 support for our Cortex-A53 and Cortex-A57 CPU models. > We have enough implemented now to be able to run real world code > at least to some extent (I can boot ARM Trusted Firmware to the > point where it pulls in OP-TEE and then falls over

[Qemu-devel] [PULL v2 10/45] vring: slim down allocation of VirtQueueElements

From: Paolo Bonzini Build the addresses and s/g lists on the stack, and then copy them to a VirtQueueElement that is just as big as required to contain this particular s/g list. The cost of the copy is minimal compared to that of a large malloc. Reviewed-by: Cornelia Huck

[Qemu-devel] [PULL v2 06/45] virtio: move allocation to virtqueue_pop/vring_pop

From: Paolo Bonzini The return code of virtqueue_pop/vring_pop is unused except to check for errors or 0. We can thus easily move allocation inside the functions and just return a pointer to the VirtQueueElement. The advantage is that we will be able to allocate only the

[Qemu-devel] [PULL v2 18/45] ipmi: replace goto by a return statement

From: Cédric Le Goater Each routine using the IPMI_ADD_RSP_DATA, IPMI_CHECK_CMD_LEN or IPMI_CHECK_RESERVATION macros needs to define a goto label 'out' to handle hidden errors. Using directly a return statement has the same effect and it removes the fact that 'out' needs to be

[Qemu-devel] [PULL v2 20/45] ipmi: cleanup error_report messages

From: Cédric Le Goater Signed-off-by: Cédric Le Goater Cc: Greg Kurz Acked-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/ipmi/ipmi_bmc_sim.c | 4 ++-- 1 file changed, 2

[Qemu-devel] [PULL v2 29/45] pc: Simplify xen_load_linux() signature

From: Eduardo Habkost We can get the PcGuestInfo struct directly from PCMachineState, and the return value is not needed at all. Signed-off-by: Eduardo Habkost Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin

Re: [Qemu-devel] [PATCH v8 2/4] kobject: export kset_find_obj() for module use

On Thu, Jan 28, 2016 at 09:23:12AM -0500, Gabriel L. Somlo wrote: > From: Gabriel Somlo > > Signed-off-by: Gabriel Somlo > --- > lib/kobject.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/lib/kobject.c b/lib/kobject.c > index 7cbccd2..90d1be6 100644 >

[Qemu-devel] [PATCH COLO-Frame v14 38/40] filter-buffer: make filter_buffer_flush() public

We will use it in COLO to flush the buffered packets. Signed-off-by: zhanghailiang Cc: Jason Wang Cc: Yang Hongyang --- v14: - New patch --- include/net/filter.h | 2 ++ net/filter-buffer.c | 2 +- 2 files

[Qemu-devel] [PATCH COLO-Frame v14 32/40] net/filter: Introduce a helper to add a filter to the netdev

We add a new helper function netdev_add_filter(), this function can help adding a filter object to a netdev. Signed-off-by: zhanghailiang Cc: Jason Wang Cc: Yang Hongyang --- include/net/filter.h | 7 +++

[Qemu-devel] [PATCH COLO-Frame v14 33/40] filter-buffer: Accept zero interval

We may want to accept zero interval when VM FT solutions like MC or COLO use this filter to release packets on demand. Signed-off-by: zhanghailiang Reviewed-by: Yang Hongyang Cc: Jason Wang Cc: Yang Hongyang

[Qemu-devel] [PATCH COLO-Frame v14 35/40] COLO/filter: add each netdev a buffer filter

For COLO periodic mode, it need to buffer packets that sent by VM, and we will not release these packets until finish a checkpoint. Here, we add each netdev a buffer-filter that will be controlled by COLO. It is disabled by default, and the packets will not pass through these filters. If users

[Qemu-devel] [PATCH COLO-Frame v14 28/40] migration/savevm: Export two helper functions for savevm process

We add a new helper functions qemu_savevm_live_state(), and make qemu_save_device_state() public. Signed-off-by: zhanghailiang Signed-off-by: Li Zhijian --- v14: - New patch split from previous 'COLO: Separate the process of

Re: [Qemu-devel] [PATCH 3/7] target-arm: Use access_trap_aa32s_el1() for SCR and MVBAR

On Wed, Feb 03, 2016 at 01:38:37PM +, Peter Maydell wrote: > The registers MVBAR and SCR should have the behaviour of trapping to > EL3 if accessed from Secure EL1, but we were incorrectly implementing > them to UNDEF (which would trap to EL1). Fix this by using the new >

Re: [Qemu-devel] [PATCH 3/7] target-arm: Use access_trap_aa32s_el1() for SCR and MVBAR

On 6 February 2016 at 12:17, Edgar E. Iglesias wrote: > It seems to me like if EL3 is running in AArch32, then we shouldn't > trap accesses from Secure EL1 but I can't find that logic. Am I missing > something? If EL3 is running in AArch32 then there is no Secure EL1 --

Re: [Qemu-devel] [Qemu-block] [PATCH v2] blockdev: unset inappropriate flags when changing medium

On 06.02.2016 14:36, Alyssa Milburn wrote: > Most importantly, this removes BDRV_O_TEMPORARY, to avoid unlink()ing an > image which replaces a snapshotted one. > > Signed-off-by: Alyssa Milburn > --- > blockdev.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git

[Qemu-devel] [PATCH COLO-Frame v14 09/40] QEMUSizedBuffer: Introduce two help functions for qsb

Introduce two new QEMUSizedBuffer APIs which will be used by COLO to buffer VM state: One is qsb_put_buffer(), which put the content of a given QEMUSizedBuffer into QEMUFile, this is used to send buffered VM state to secondary. Another is qsb_fill_buffer(), read 'size' bytes of data from the file

[Qemu-devel] [PATCH COLO-Frame v14 14/40] COLO: Flush PVM's cached RAM into SVM's memory

During the time of VM's running, PVM may dirty some pages, we will transfer PVM's dirty pages to SVM and store them into SVM's RAM cache at next checkpoint time. So, the content of SVM's RAM cache will always be same with PVM's memory after checkpoint. Instead of flushing all content of PVM's RAM

[Qemu-devel] [PATCH COLO-Frame v14 08/40] COLO: Add a new RunState RUN_STATE_COLO

Guest will enter this state when paused to save/restore VM state under colo checkpoint. Cc: Eric Blake Cc: Markus Armbruster Signed-off-by: zhanghailiang Signed-off-by: Li Zhijian Signed-off-by:

[Qemu-devel] [PATCH COLO-Frame v14 06/40] COLO/migration: Create a new communication path from destination to source

This new communication path will be used for returning messages from destination to source. Signed-off-by: zhanghailiang Signed-off-by: Li Zhijian Reviewed-by: Dr. David Alan Gilbert --- v13: - Remove useless error

[Qemu-devel] [PATCH COLO-Frame v14 01/40] configure: Add parameter for configure to enable/disable COLO support

configure --enable-colo/--disable-colo to switch COLO support on/off. COLO support is On by default. Signed-off-by: zhanghailiang Signed-off-by: Li Zhijian Signed-off-by: Gonglei Reviewed-by: Dr. David Alan

[Qemu-devel] [PATCH COLO-Frame v14 36/40] net/filter: Add a helper to traverse all the filters

Add a new API qemu_foreach_netfilter(), it will traverse all the filters, and call the callback function. Signed-off-by: zhanghailiang Cc: Jason Wang Cc: Yang Hongyang --- v14: - New patch split from previous

[Qemu-devel] [PATCH COLO-Frame v14 40/40] COLO: Add block replication into colo process

Make sure master start block replication after slave's block replication started. Signed-off-by: zhanghailiang Signed-off-by: Wen Congyang Signed-off-by: Li Zhijian Cc: Stefan Hajnoczi Cc:

[Qemu-devel] [PATCH COLO-Frame v14 39/40] COLO: flush buffered packets in checkpoint process or exit COLO

In COLO periodic mode, the packets from VM should not be sent during the time interval of two checkpoints, we will release all these buffered packets after the checkpoint process, before VM is resumed. In this way, we can ensure not to break the network services if COLO goes into failover

Re: [Qemu-devel] [PATCH 15/37] tcg: Clean up includes

On 6 February 2016 at 00:51, Richard Henderson wrote: > On 01/27/2016 05:17 AM, Peter Maydell wrote: >> diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c >> index 9187d34..d90636c 100644 >> --- a/tcg/i386/tcg-target.c >> +++ b/tcg/i386/tcg-target.c >> @@ -22,6 +22,7 @@

Re: [Qemu-devel] [Qemu-block] [PATCH] blockdev: Unset temporary flag when changing medium.

On 06.02.2016 14:47, Alyssa Milburn wrote: > On Sat, Feb 06, 2016 at 02:04:23PM +0100, Max Reitz wrote: >> On 04.02.2016 18:36, Alyssa Milburn wrote: >>> This avoids a 'change' command from the monitor unlink()ing the new >>> file if the bdrv was previously snapshotted. >>> >>> Signed-off-by:

Re: [Qemu-devel] [PATCH 00/13] cuda: misc fixes and cleanups

Hi Mark, Le 06/02/2016 14:32, Mark Cave-Ayland a écrit : On 23/01/16 20:39, Hervé Poussineau wrote: Hi, This patchset cleans up a little bit the Apple CUDA emulation: - correctly reject unknown commands - correctly reject commands with wrong parameters - support changing the frequency of

[Qemu-devel] [PATCH COLO-Frame v14 13/40] COLO: Load VMState into qsb before restore it

We should not destroy the state of SVM (Secondary VM) until we receive the whole state from the PVM (Primary VM), in case the primary fails in the middle of sending the state, so, here we cache the device state in Secondary before restore it. Besides, we should call qemu_system_reset() before

[Qemu-devel] [PATCH COLO-Frame v14 11/40] COLO: Load PVM's dirty pages into SVM's RAM cache temporarily

We should not load PVM's state directly into SVM, because there maybe some errors happen when SVM is receving data, which will break SVM. We need to ensure receving all data before load the state into SVM. We use an extra memory to cache these data (PVM's ram). The ram cache in secondary side is

[Qemu-devel] [PATCH COLO-Frame v14 24/40] COLO: Process shutdown command for VM in COLO state

If VM is in COLO FT state, we should do some extra work before normal shutdown process. SVM will ignore the shutdown command if this command is issued directly to it, PVM will send the shutdown command to SVM if it gets this command. Cc: Paolo Bonzini Signed-off-by:

[Qemu-devel] [PATCH COLO-Frame v14 30/40] COLO: Split qemu_savevm_state_begin out of checkpoint process

It is unnecessary to call qemu_savevm_state_begin() in every checkponit process. It mainly sets up devices and does the first device state pass. These data will not change during the later checkpoint process. So, we split it out of colo_do_checkpoint_transaction(), in this way, we can reduce these

Re: [Qemu-devel] [PATCH 1/7] target-arm: Fix typo in comment in arm_is_secure_below_el3()

On Wed, Feb 03, 2016 at 01:38:35PM +, Peter Maydell wrote: > Fix a typo where "EL2" was written but "EL3" intended. Reviewed-by: Edgar E. Iglesias > > Signed-off-by: Peter Maydell > --- > target-arm/cpu.h | 2 +- > 1 file changed, 1

Re: [Qemu-devel] [Qemu-block] [PATCH] blockdev: Unset temporary flag when changing medium.

On 04.02.2016 18:36, Alyssa Milburn wrote: > This avoids a 'change' command from the monitor unlink()ing the new > file if the bdrv was previously snapshotted. > > Signed-off-by: Alyssa Milburn > --- > blockdev.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git

Re: [Qemu-devel] [PATCH 00/13] cuda: misc fixes and cleanups

On 23/01/16 20:39, Hervé Poussineau wrote: > Hi, > > This patchset cleans up a little bit the Apple CUDA emulation: > - correctly reject unknown commands > - correctly reject commands with wrong parameters > - support changing the frequency of auto-polling > - support changing device list probed

Re: [Qemu-devel] [PATCH v10] spec: add qcow2 bitmaps extension specification

On 05.02.2016 09:58, Vladimir Sementsov-Ogievskiy wrote: > The new feature for qcow2: storing bitmaps. > > This patch adds new header extension to qcow2 - Bitmaps Extension. It > provides an ability to store virtual disk related bitmaps in a qcow2 > image. For now there is only one type of such

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