[Qemu-devel] [PULL 13/17] ppc: Add real mode CI load/store instructions for P7 and P8

From: Benjamin Herrenschmidt Those instructions are only available in hypervisor real mode and allow cache inhibited garded access to devices in that mode. Signed-off-by: Benjamin Herrenschmidt [clg: fixed checkpatch.pl errors ]

[Qemu-devel] [PULL 17/17] ppc: Disable huge page support if it is not available for main RAM

From: Thomas Huth On powerpc, we must only signal huge page support to the guest if all memory areas are capable of supporting huge pages. The commit 2d103aae8765 ("fix hugepage support when using memory-backend-file") already fixed the case when the user specified the mem-path

[Qemu-devel] [PULL 07/17] ppc: Fix rfi/rfid/hrfi/... emulation

From: Benjamin Herrenschmidt This reworks emulation of the various "rfi" variants. I removed some masking bits that I couldn't make sense of, the only bit that I am aware we should mask here is POW, the CPU's MSR mask should take care of the rest. This also fixes some

[Qemu-devel] [PULL 16/17] ppc: Add P7/P8 Power Management instructions

From: Benjamin Herrenschmidt This adds the ISA 2.06 and later power management instructions (doze, nap, sleep and rvwinkle) and associated wakeup cause testing in LPCR Signed-off-by: Benjamin Herrenschmidt [clg: fixed checkpatch.pl errors ]

[Qemu-devel] [PULL 00/17] ppc-for-2.7 queue 20160623

The following changes since commit 6f1d2d1c5ad20d464705b17318cb7ca495f8078a: Merge remote-tracking branch 'remotes/stsquad/tags/pull-travis-20160621-1' into staging (2016-06-21 15:19:58 +0100) are available in the git repository at: git://github.com/dgibson/qemu.git

[Qemu-devel] [PULL 09/17] ppc: fix exception model for HV mode

From: Benjamin Herrenschmidt This properly implements LPES0 handling for HV vs. !HV mode and removes the unsupported LPES1. This has been removed from the specs since ISA v2.07. Signed-off-by: Benjamin Herrenschmidt [clg: AIL implementation

[Qemu-devel] [PULL 03/17] ppc64: disable gen_pause() for linux-user mode

From: Laurent Vivier While trying to install a fedora container with "lxc-create -t fedora -- -I qemu-ppc64" the installation abort with the following error: qemu: fatal: Unknown exception 0x65537. Aborting NIP 004000927924 LR 0040009e325c CTR 004000927480 XER

[Qemu-devel] [PULL 01/17] powerpc/mm: Update the WIMG check during H_ENTER

From: "Aneesh Kumar K.V" Support for 0 value for memeory coherence is optional and with ppc64 we can always enable memory coherence. Linux kernel did that during the development of 4.7 kernel. But that resulted in failure in Qemu in H_ENTER hcall due to below

[Qemu-devel] [PULL 02/17] tests: Use '+=' to add additional tests, not '='

From: Thomas Huth The recent commit that added the prom-env-test accidentially overwrote the check-qtest-ppc-y, check-qtest-ppc64-y and check-qtest-sparc-y variables instead of extending them. Fixes: fcbf4a3c0c576eec1321f9cff4fa0dd8e0b1a82f Signed-off-by: Thomas Huth

Re: [Qemu-devel] [PATCH qemu v18 4/5] vfio/spapr: Create DMA window dynamically (SPAPR IOMMU v2)

On 23/06/16 13:59, Alexey Kardashevskiy wrote: >> ret is not initialized and it is used in "fail:". >> >> hw/vfio/common.c: In function ‘vfio_listener_region_add’: >> hw/vfio/common.c:493:30: error: ‘ret’ may be used uninitialized in this >> function [-Werror=maybe-uninitialized] >>

Re: [Qemu-devel] [PATCH v2 3/3] socket: unlink unix socket on remove

On Thu, Jun 23, 2016 at 07:41:55AM +0300, Michael S. Tsirkin wrote: > On Thu, Jun 16, 2016 at 09:28:52PM +0200, marcandre.lur...@redhat.com wrote: > > From: Marc-André Lureau > > > > qemu leaves unix socket files behind when removing a listening chardev > > or

Re: [Qemu-devel] [PATCH v2 3/3] socket: unlink unix socket on remove

On Thu, Jun 16, 2016 at 09:28:52PM +0200, marcandre.lur...@redhat.com wrote: > From: Marc-André Lureau > > qemu leaves unix socket files behind when removing a listening chardev > or leaving. qemu could clean that up, even if doing so isn't race-free. > > Fixes: >

Re: [Qemu-devel] [PATCH 05/12] monitor: register the qapi generated commands

On 23/06/2016 02:08, marcandre.lur...@redhat.com wrote: > > Stop using the so-called 'middle' mode. Instead, use qmp_find_command() > from generated qapi commands registry. > > Note: this commit requires a 'make clean' prior to make, since the > generated files do not depend on Makefile (due

Re: [Qemu-devel] [PATCH 00/24] vhost-user reconnect fixes

On Tue, Jun 21, 2016 at 12:02:28PM +0200, marcandre.lur...@redhat.com wrote: > From: Marc-André Lureau > > Hi, > > Since 'vhost-user: simple reconnection support' was merged, it is > possible to disconnect and reconnect a vhost-user backend. However, > many code

Re: [Qemu-devel] [PATCH 00/24] vhost-user reconnect fixes

On Tue, Jun 21, 2016 at 12:02:28PM +0200, marcandre.lur...@redhat.com wrote: > From: Marc-André Lureau > > Hi, > > Since 'vhost-user: simple reconnection support' was merged, it is > possible to disconnect and reconnect a vhost-user backend. However, > many code

Re: [Qemu-devel] [PATCH 06/24] vhost-user: check vhost_user_write() return value

On Tue, Jun 21, 2016 at 12:02:34PM +0200, marcandre.lur...@redhat.com wrote: > From: Marc-André Lureau > > Just some more error checking. > > Signed-off-by: Marc-André Lureau Point being? Callers just ignore it afterwards ... > --- >

Re: [Qemu-devel] [PATCH 08/24] vhost-user: return a read error

On Tue, Jun 21, 2016 at 12:02:36PM +0200, marcandre.lur...@redhat.com wrote: > From: Marc-André Lureau > > Return read errors (not sure why those were ignored) > > Signed-off-by: Marc-André Lureau why bother? So callers can just

Re: [Qemu-devel] [PATCH 05/24] vhost: change some assert() for error_report() or silent fail

On Tue, Jun 21, 2016 at 12:02:33PM +0200, marcandre.lur...@redhat.com wrote: > From: Marc-André Lureau > > Calling a vhost operation may fail, especially with disconnectable > backends. Treat some that look harmless as recoverable errors (print > error, or ignore on

Re: [Qemu-devel] [PATCH 23/24] vhost-user: wait until link is up

On Tue, Jun 21, 2016 at 12:02:51PM +0200, marcandre.lur...@redhat.com wrote: > From: Marc-André Lureau > > The chardev waits for an initial connection before starting qemu, > vhost-user wants the backend negotiation to be completed. vhost-user is > started in the

Re: [Qemu-devel] [PATCH qemu v18 4/5] vfio/spapr: Create DMA window dynamically (SPAPR IOMMU v2)

On 23/06/16 00:38, Laurent Vivier wrote: > > > On 21/06/2016 03:14, Alexey Kardashevskiy wrote: >> New VFIO_SPAPR_TCE_v2_IOMMU type supports dynamic DMA window management. >> This adds ability to VFIO common code to dynamically allocate/remove >> DMA windows in the host kernel when new VFIO

[Qemu-devel] [Bug 1580459] Re: Windows (10?) guest freezes entire host on shutdown if using PCI passthrough

I got impatient and got the rom file from EVGA and loaded it in, but for me and my GTX 960, I get no graphical output when it's loaded. I don't know anything beyond that. I don't get any error messages in dmesg or anything--just no video output whatsoever. It was also strangely booting into the

Re: [Qemu-devel] [PATCH RFC 1/1] qemu-img: add the 'dd' subcommand

On Wed, 06/22 19:21, Reda Sallahi wrote: > This patch adds a basic dd subcommand analogous to dd(1) to qemu-img. > > For the start, this implements the bs, if, of and count options and requires > both if and of to be specified (no stdin/stdout if not specified) and doesn't > support tty, pipes,

Re: [Qemu-devel] [PATCH] ppc: Disable huge page support if it is not available for main RAM

On Wed, Jun 22, 2016 at 10:50:05AM +0200, Thomas Huth wrote: > On powerpc, we must only signal huge page support to the guest if > all memory areas are capable of supporting huge pages. The commit > 2d103aae8765 ("fix hugepage support when using memory-backend-file") > already fixed the case when

Re: [Qemu-devel] [PATCH 3/3] blockdev: Add dynamic module loading for block drivers

On Wed, 06/22 17:35, Colin Lord wrote: > From: Marc Mari > > Extend the current module interface to allow for block drivers to be loaded > dynamically on request. > > The only block drivers that can be converted into modules are the drivers > that don't perform any init

[Qemu-devel] [PATCH v2 3/3] palmetto-bmc: Configure the SCU's hardware strapping register

The magic constant configures the following options: * 28:27: Configure DRAM size as 256MB * 26:24: DDR3 SDRAM with CL = 6, CWL = 5 * 23: Configure 24/48MHz CLKIN * 22: Disable GPIOE pass-through mode * 21: Disable GPIOD pass-through mode * 20: Enable LPC decode of SuperIO 0x2E/0x4E addresses *

[Qemu-devel] [PATCH v2 2/3] ast2400: Integrate the SCU model and set silicon revision

By specifying the silicon revision we select the appropriate reset values for the SoC. Additionally, expose hardware strapping properties aliasing those provided by the SCU for board-specific configuration. Signed-off-by: Andrew Jeffery --- Since v1: * Remove reset value

[Qemu-devel] [PATCH v2 1/3] hw/misc: Add a model for the ASPEED System Control Unit

The SCU is a collection of chip-level control registers that manage the various functions supported by ASPEED SoCs. Typically the bits control interactions with clocks, external hardware or reset behaviour, and we can largly take a hands-off approach to reads and writes. Firmware makes heavy use

[Qemu-devel] [PATCH v2 0/3] Add ASPEED SCU device

Hi all, These are three patches implementing minimal functionality for the ASPEED System Control Unit device and integrating it into the AST2400 SoC model/palmetto-bmc machine. The device is critical for initialisation of u-boot and the kernel as it provides chip level control registers,

Re: [Qemu-devel] [PATCH 3/3] blockdev: Add dynamic module loading for block drivers

On Wed, 06/22 17:35, Colin Lord wrote: > From: Marc Mari > > Extend the current module interface to allow for block drivers to be loaded > dynamically on request. > > The only block drivers that can be converted into modules are the drivers > that don't perform any init

Re: [Qemu-devel] [PATCH qemu v18 5/5] spapr_pci/spapr_pci_vfio: Support Dynamic DMA Windows (DDW)

On 22/06/16 19:44, Thomas Huth wrote: > On 22.06.2016 05:23, Alexey Kardashevskiy wrote: >> On 22/06/16 12:35, David Gibson wrote: >>> On Tue, Jun 21, 2016 at 11:14:05AM +1000, Alexey Kardashevskiy wrote: This adds support for Dynamic DMA Windows (DDW) option defined by the SPAPR

Re: [Qemu-devel] [PATCH 0/3] Dynamic module loading for block drivers

On Wed, 06/22 17:35, Colin Lord wrote: > This is v2 of the series I sent out last week. These are the changes I > made based on the feedback I got: > - Fixed typo and Marc's email address in the python script > - Moved registration of iscsi_opts into vl.c > > What I didn't do: > - Remove

Re: [Qemu-devel] [PATCH 2/3] blockdev: Add dynamic generation of module_block.h

On Wed, 06/22 17:35, Colin Lord wrote: > From: Marc Mari > > To simplify the addition of new block modules, add a script that generates > include/qemu/module_block.h automatically from the modules' source code. > > This script assumes that the QEMU coding style rules are

Re: [Qemu-devel] [PATCH v3 00/20] GICv3 emulation

On 2016/6/23 5:45, Ed Maste wrote: > On 22 June 2016 at 16:53, Peter Maydell wrote: >> >> Yeah, it looks like the same bug is also present in UEFI itself >> (it's super popular!). Laszlo, Ard, do you have a prebuilt >> UEFI binary with Ard's fix? >> >> Probably you'll

Re: [Qemu-devel] [PATCH 1/3] blockdev: prepare iSCSI block driver for dynamic loading

On Wed, 06/22 17:35, Colin Lord wrote: > This commit moves the initialization of the QemuOptsList qemu_iscsi_opts > struct out of block/iscsi.c in order to allow it to be dynamically > loaded. Drivers that perform init operations other than registering > themselves can't be modularized, so this

Re: [Qemu-devel] [PATCH 1/2] blockjob: assert(cb) in the entry functions of blockjob

On 06/23/2016 01:31 AM, Eric Blake wrote: On 06/22/2016 04:19 AM, Paolo Bonzini wrote: On 22/06/2016 12:12, Changlong Xie wrote: commit/mirror/stream/backup use block_job_create(..., cb,..) to create relevant blockjob. When they finished, these jobs will invoke block_job_completed, then

Re: [Qemu-devel] [PATCH 3/3] iotests: add small-granularity mirror test

On Wed, 06/22 15:51, John Snow wrote: > Signed-off-by: John Snow > --- > tests/qemu-iotests/041 | 30 ++ > tests/qemu-iotests/041.out | 4 ++-- > 2 files changed, 32 insertions(+), 2 deletions(-) Reviewed-by: Fam Zheng

Re: [Qemu-devel] [PATCH 2/3] mirror: limit niov to IOV_MAX elements, again

On Wed, 06/22 15:51, John Snow wrote: > During the refactor of mirror_iteration in e5b43573, > we regressed the fix introduced in cae98cb8. > > This patch re-adds IOV_MAX checking to cases where we > aren't checking alignment (and size) already. > > Signed-off-by: John Snow >

Re: [Qemu-devel] [PATCH 1/3] mirror: clarify mirror_do_read return code

On Wed, 06/22 15:51, John Snow wrote: > mirror_do_read intends to return the number of sectors processed after > the starting sector, without regard to how many sectors were processed > before the starting sector due to alignment. > > Clean up the comments and code to hopefully illustrate this

[Qemu-devel] [PATCH 11/12] qmp: update qmp_query_spice fallback

From: Marc-André Lureau There are a few commands that are undef #ifdef conditions in qmp-commands.hx. Move all the qmp_query_spice fallback in the same location, return an error and update the comment. Signed-off-by: Marc-André Lureau

[Qemu-devel] [PATCH 08/12] build-sys: remove qmp-commands-old.h

From: Marc-André Lureau Signed-off-by: Marc-André Lureau --- Makefile.target | 7 ++- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/Makefile.target b/Makefile.target index d720b3e..8c13294 100644 ---

[Qemu-devel] [PATCH 06/12] monitor: remove mhandler.cmd_new

From: Marc-André Lureau This is no longer necessary, now that middle mode has been removed. Signed-off-by: Marc-André Lureau --- docs/writing-qmp-commands.txt | 8 +- hmp-commands-info.hx | 118

[Qemu-devel] [PATCH 10/12] monitor: use qmp_dispatch()

From: Marc-André Lureau Replace the old manual dispatch and validation code by the generic one provided by qapi common code. Signed-off-by: Marc-André Lureau --- monitor.c| 319

[Qemu-devel] [PATCH 07/12] monitor: implement 'qmp_query_commands' without qmp_cmds

From: Marc-André Lureau So we can get rid of the static qmp_cmds table. Signed-off-by: Marc-André Lureau --- monitor.c | 32 ++-- 1 file changed, 14 insertions(+), 18 deletions(-) diff --git a/monitor.c

[Qemu-devel] [PATCH 12/12] Drop qmp-commands.hx

From: Marc-André Lureau Only the documentation remains useful, so strip it. (a later update will move the documentation in the respective json files and generate the text file) Signed-off-by: Marc-André Lureau --- .gitignore

[Qemu-devel] [PATCH 04/12] monitor: remove usage of generated marshal functions

From: Marc-André Lureau Once the middle mode is removed, the generated marshal functions will no longer be exported. Signed-off-by: Marc-André Lureau --- monitor.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff

[Qemu-devel] [PATCH 09/12] qapi: remove the "middle" mode

From: Marc-André Lureau Now that the register function is always generated, we can remove the so-called "middle" mode from the generator script. Signed-off-by: Marc-André Lureau --- scripts/qapi-commands.py | 29

[Qemu-devel] [PATCH 00/12] qapi: remove the 'middle' mode

From: Marc-André Lureau Hi, Although some QMP commands are still not fully qapi'fied, it is possible to use more qapi common and generated code by dropping the 'middle' mode. This series of patches was sent last year as part of a larger series 'post-Eric's fixes,

[Qemu-devel] [PATCH 05/12] monitor: register the qapi generated commands

From: Marc-André Lureau Stop using the so-called 'middle' mode. Instead, use qmp_find_command() from generated qapi commands registry. Note: this commit requires a 'make clean' prior to make, since the generated files do not depend on Makefile (due to a cyclic rule

[Qemu-devel] [PATCH 01/12] qapi-schema: use generated marshaller for 'qmp_capabilities'

From: Marc-André Lureau qapi'fy the 'qmp_capabilities' command. Signed-off-by: Marc-André Lureau --- monitor.c| 4 ++-- qapi-schema.json | 19 +++ qmp-commands.hx | 2 +- 3 files changed, 22 insertions(+), 3

[Qemu-devel] [PATCH 03/12] monitor: register gen:false commands manually

From: Marc-André Lureau Since a few commands are using 'gen': false, they are not registered automatically by the generator. Register manually instead. This is in preparation for removal of qapi 'middle' mode generation. Signed-off-by: Marc-André Lureau

[Qemu-devel] [PATCH 02/12] qapi-schema: add 'device_add'

From: Marc-André Lureau Even though device_add is not fully qapi'fied, we may add it to the json schema with 'gen': false, so registration and documentation can be generated. Signed-off-by: Marc-André Lureau --- qapi-schema.json | 26

Re: [Qemu-devel] Default for phys-addr-bits? (was Re: [PATCH 4/5] x86: Allow physical address bits to be set)

On Thu, Jun 23, 2016 at 01:23:08AM +0200, Andrea Arcangeli wrote: > On Thu, Jun 23, 2016 at 01:44:06AM +0300, Michael S. Tsirkin wrote: > > On Wed, Jun 22, 2016 at 04:24:14PM +0200, Andrea Arcangeli wrote: > > > > cause malfunctioning, only crashes (and as Gerd said, if you cross your > > > >

Re: [Qemu-devel] Default for phys-addr-bits? (was Re: [PATCH 4/5] x86: Allow physical address bits to be set)

On Thu, Jun 23, 2016 at 01:44:06AM +0300, Michael S. Tsirkin wrote: > On Wed, Jun 22, 2016 at 04:24:14PM +0200, Andrea Arcangeli wrote: > > > cause malfunctioning, only crashes (and as Gerd said, if you cross your > > > fingers and hope the guest doesn't put anything so high in memory, > > >

Re: [Qemu-devel] Default for phys-addr-bits? (was Re: [PATCH 4/5] x86: Allow physical address bits to be set)

On Thu, Jun 23, 2016 at 01:40:42AM +0300, Michael S. Tsirkin wrote: > Where's a problem then? If EPT/NPT is enabled, the guest pagetables are parsed by the hardware and not by the KVM shadow MMU in software. The hardware speaks host phys bits and AFIK the hardware will behave different depending

Re: [Qemu-devel] Default for phys-addr-bits? (was Re: [PATCH 4/5] x86: Allow physical address bits to be set)

On Wed, Jun 22, 2016 at 04:24:14PM +0200, Andrea Arcangeli wrote: > > cause malfunctioning, only crashes (and as Gerd said, if you cross your > > fingers and hope the guest doesn't put anything so high in memory, > > chances are you'll succeed), and this makes it "safer". I'm not sure > > which

Re: [Qemu-devel] Default for phys-addr-bits? (was Re: [PATCH 4/5] x86: Allow physical address bits to be set)

On Wed, Jun 22, 2016 at 02:41:22PM +0200, Paolo Bonzini wrote: > > > On 21/06/2016 21:44, Eduardo Habkost wrote: > > The consequences of migrating (or having migration blocked) to a > > host with smaller phys-addr-bits sound worse to me than the > > consequences of just having guest's

[Qemu-devel] [PATCH 3/5] curses: use wide output functions

This makes use of cchar_t instead of chtype when using ncursesw, which allows to store a wide char as well as the WACS values. This also allows to complete the printable glyphs list beyond ascii and the ACS values. Signed-off-by: Samuel Thibault ---

[Qemu-devel] [PATCH 1/5] curses: fix left/right arrow translation

In default VGA font, left/right arrow are glyphs 0x1a and 0x1b, not 0x0a and 0x0b. Signed-off-by: Samuel Thibault --- ui/curses.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/ui/curses.c b/ui/curses.c index 49d3ce6..438b8be 100644 ---

[Qemu-devel] [PATCH 4/5] curses: add option to specify VGA font encoding

This detects and uses iconv to convert glyphs from the specified VGA font encoding to unicode. Signed-off-by: Samuel Thibault --- configure | 37 + include/sysemu/sysemu.h | 1 + qemu-options.hx | 20

[Qemu-devel] [PATCH 2/5] curses: Use cursesw when available

Signed-off-by: Samuel Thibault --- configure | 64 ++- 1 file changed, 63 insertions(+), 1 deletion(-) diff --git a/configure b/configure index 10cb212..ff10012 100755 --- a/configure +++ b/configure @@

[Qemu-devel] [PATCH 5/5] curses: support wide input

This makes use of wide curses functions instead of 8bit functions. This allows to type e.g. accented letters. Unfortunately, key codes are then returned with values that could be confused with wide characters by ncurses, so we need to add a maybe_keycode variable to know whether the returned

[Qemu-devel] [PATCH 0/5] curses: wide character support

Hello, This patch series adds wide character support to the curses frontend of qemu, thus allowing to fix a lot of input and output issues with e.g. accented letters and semi-graphic glyphs. Since qemu can't know the encoding of the VGA font, the user has to specify it (just like he has to

Re: [Qemu-devel] [PATCH v2 00/10] globals: Clean up validation and error checking

Markus, all patches in this series got at least one Reviewed-by line. I would like to have your Acked-by to merge it through my tree, so I can apply Igor's -cpu + global property series that depend on it. On Mon, Jun 20, 2016 at 12:52:53PM -0300, Eduardo Habkost wrote: > This series includes

Re: [Qemu-devel] [PATCH v5 00/13] NVDIMM: introduce nvdimm label support

On Wed, Jun 22, 2016 at 08:19:46PM +0100, Stefan Hajnoczi wrote: > On Fri, Jun 17, 2016 at 07:08:03PM +0800, Xiao Guangrong wrote: > > Changelog in v5: > > fix string format error when it is compiled on 32 bit box > > > > Xiao Guangrong (13): > > pc-dimm: introduce get_vmstate_memory_region

Re: [Qemu-devel] [PATCH v3 00/20] GICv3 emulation

On 22 June 2016 at 22:45, Ed Maste wrote: > On 22 June 2016 at 16:53, Peter Maydell wrote: >> >> Yeah, it looks like the same bug is also present in UEFI itself >> (it's super popular!). Laszlo, Ard, do you have a prebuilt >> UEFI binary with Ard's

Re: [Qemu-devel] [PATCH v3 00/20] GICv3 emulation

On 22 June 2016 at 16:53, Peter Maydell wrote: > > Yeah, it looks like the same bug is also present in UEFI itself > (it's super popular!). Laszlo, Ard, do you have a prebuilt > UEFI binary with Ard's fix? > > Probably you'll find that if UEFI is configuring the GIC

Re: [Qemu-devel] [PATCH 0/3] Dynamic module loading for block drivers

On 06/22/2016 05:35 PM, Colin Lord wrote: > This is v2 of the series I sent out last week. These are the changes I > made based on the feedback I got: > - Fixed typo and Marc's email address in the python script > - Moved registration of iscsi_opts into vl.c > > What I didn't do: > - Remove

[Qemu-devel] [PATCH 3/3] blockdev: Add dynamic module loading for block drivers

From: Marc Mari Extend the current module interface to allow for block drivers to be loaded dynamically on request. The only block drivers that can be converted into modules are the drivers that don't perform any init operation except for registering themselves. All the

[Qemu-devel] [PATCH 1/3] blockdev: prepare iSCSI block driver for dynamic loading

This commit moves the initialization of the QemuOptsList qemu_iscsi_opts struct out of block/iscsi.c in order to allow it to be dynamically loaded. Drivers that perform init operations other than registering themselves can't be modularized, so this moves the initialization of this struct into the

[Qemu-devel] [PATCH 2/3] blockdev: Add dynamic generation of module_block.h

From: Marc Mari To simplify the addition of new block modules, add a script that generates include/qemu/module_block.h automatically from the modules' source code. This script assumes that the QEMU coding style rules are followed. Signed-off-by: Marc Mari

[Qemu-devel] [PATCH 0/3] Dynamic module loading for block drivers

This is v2 of the series I sent out last week. These are the changes I made based on the feedback I got: - Fixed typo and Marc's email address in the python script - Moved registration of iscsi_opts into vl.c What I didn't do: - Remove copy-pasted loops There was a bit of discussion about how to

Re: [Qemu-devel] [PATCH] Reduce curses escdelay from 1s to 0.2s

On 22 June 2016 at 22:06, Samuel Thibault wrote: > Peter Maydell, on Wed 22 Jun 2016 21:49:04 +0100, wrote: >> On 22 June 2016 at 16:44, Samuel Thibault >> wrote: >> > By default, curses will only report single ESC key event after 1s delay,

Re: [Qemu-devel] [PATCH] Reduce curses escdelay from 1s to 0.2s

Peter Maydell, on Wed 22 Jun 2016 21:49:04 +0100, wrote: > On 22 June 2016 at 16:44, Samuel Thibault > wrote: > > By default, curses will only report single ESC key event after 1s delay, > > since ESC is also used for keypad escape sequences. This however makes

Re: [Qemu-devel] [PATCH v2 1/1] cpu: report hyperv feature words through qom

On Tue, Jun 21, 2016 at 02:00:22PM +0200, Paolo Bonzini wrote: > On 20/06/2016 17:29, Denis V. Lunev wrote: > > +static int hyperv_handle_properties(CPUState *cs) > > +{ > > +X86CPU *cpu = X86_CPU(cs); > > +CPUX86State *env = >env; > > + > > +if (cpu->hyperv_relaxed_timing) { > > +

Re: [Qemu-devel] [PATCH v2 1/1] cpu: report hyperv feature words through qom

On Mon, Jun 20, 2016 at 06:29:40PM +0300, Denis V. Lunev wrote: > From: Evgeny Yakovlev > > This change adds hyperv feature words report through qom rpc. > > When VM is configured with hyperv features enabled > libvirt will check that required feature words are set > in

Re: [Qemu-devel] [PATCH v2 05/17] nbd: Advertise realistic limits to block layer

On 06/15/2016 07:38 AM, Paolo Bonzini wrote: > > > On 14/06/2016 23:30, Eric Blake wrote: >> We were basing the advertisement of maximum discard and transfer >> length off of UINT32_MAX, but since the rest of the block layer >> has signed int limits on a transaction, nothing could ever reach >>

Re: [Qemu-devel] Qemu and heavily increased RSS usage

On 22 June 2016 at 20:55, Peter Lieven wrote: > What makes the coroutine pool memory intensive is the stack size of 1MB per > coroutine. Is it really necessary to have such a big stack? That reminds me that I was wondering if we should allocate our coroutine stacks with

Re: [Qemu-devel] [PATCH v3 00/20] GICv3 emulation

On 22 June 2016 at 19:09, Ed Maste wrote: > On 15 June 2016 at 06:10, Peter Maydell wrote: >> >> A quick scan through http://fxr.watson.org/fxr/source/arm64/arm64/gic_v3.c >> doesn't seem to show it setting the IGROUPR registers anywhere, >> so it

Re: [Qemu-devel] [PATCH] Reduce curses escdelay from 1s to 0.2s

On 22 June 2016 at 16:44, Samuel Thibault wrote: > By default, curses will only report single ESC key event after 1s delay, > since ESC is also used for keypad escape sequences. This however makes users > believe that ESC is not working. Reducing to 0.2s provides

Re: [Qemu-devel] [PATCH 3/3] iotests: add small-granularity mirror test

On 06/22/2016 01:51 PM, John Snow wrote: > Signed-off-by: John Snow > --- > tests/qemu-iotests/041 | 30 ++ > tests/qemu-iotests/041.out | 4 ++-- > 2 files changed, 32 insertions(+), 2 deletions(-) > Reviewed-by: Eric Blake

Re: [Qemu-devel] [RFC v3 PATCH 10/14] tcg/tci: Add support for fence

On 06/22/2016 12:57 PM, Sergey Fedorov wrote: >> > @@ -1236,6 +1236,9 @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, >> > uint8_t *tb_ptr) >> > tcg_abort(); >> > } >> > break; >> > +case INDEX_op_mb: >> > +smp_mb(); > I think we

Re: [Qemu-devel] [RFC v3 PATCH 07/14] tcg/ppc: Add support for fence

On 22/06/16 23:21, Richard Henderson wrote: > On 06/22/2016 12:50 PM, Sergey Fedorov wrote: >> On 18/06/16 07:03, Pranith Kumar wrote: >>> Signed-off-by: Richard Henderson >>> Signed-off-by: Pranith Kumar >>> --- >>> tcg/ppc/tcg-target.inc.c | 24

[Qemu-devel] [PATCH v7 08/12] xilinx_zynq: Connect devcfg to the Zynq machine model

From: Peter Crosthwaite Signed-off-by: Peter Crosthwaite Signed-off-by: Alistair Francis --- V7: - Remove unused property add V4: - Small corrections to the device model logic hw/arm/xilinx_zynq.c | 6

Re: [Qemu-devel] [RFC v3 PATCH 10/14] tcg/tci: Add support for fence

On 22/06/16 23:25, Richard Henderson wrote: > On 06/22/2016 12:57 PM, Sergey Fedorov wrote: @@ -1236,6 +1236,9 @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr) tcg_abort(); } break; +case

Re: [Qemu-devel] [PATCH 2/3] mirror: limit niov to IOV_MAX elements, again

On 06/22/2016 01:51 PM, John Snow wrote: > During the refactor of mirror_iteration in e5b43573, > we regressed the fix introduced in cae98cb8. > > This patch re-adds IOV_MAX checking to cases where we > aren't checking alignment (and size) already. > > Signed-off-by: John Snow

[Qemu-devel] [PATCH v7 02/12] register: Add Register API

This API provides some encapsulation of registers and factors out some common functionality to common code. Bits of device state (usually MMIO registers) often have all sorts of access restrictions and semantics associated with them. This API allows you to define what those restrictions are on a

Re: [Qemu-devel] [V12 3/4] hw/i386: Introduce AMD IOMMU

On 2016-06-15 14:21, David Kiarie wrote: > Add AMD IOMMU emulaton to Qemu in addition to Intel IOMMU > The IOMMU does basic translation, error checking and has a > minimal IOTLB implementation. This IOMMU bypassed the need > for target aborts by responding with IOMMU_NONE access rights > and

Re: [Qemu-devel] [V12 4/4] hw/i386: AMD IOMMU IVRS table

On 2016-06-15 14:21, David Kiarie wrote: > Add IVRS table for AMD IOMMU. Generate IVRS or DMAR > depending on emulated IOMMU. > > Signed-off-by: David Kiarie > --- > hw/acpi/aml-build.c | 2 +- > hw/i386/acpi-build.c| 95 >

[Qemu-devel] [PATCH v7 05/12] register: QOMify

From: Peter Crosthwaite QOMify registers as a child of TYPE_DEVICE. This allows registers to define GPIOs. Define an init helper that will do QOM initialisation. Signed-off-by: Peter Crosthwaite Signed-off-by: Alistair Francis

[Qemu-devel] [PATCH v7 11/12] misc: Introduce ZynqMP IOU SLCR

From: Peter Crosthwaite IOU = I/O Unit SLCR = System Level Control Registers This IP is a misc collections of control registers that switch various properties of system IPs. Currently the only thing implemented is the SD_SLOTTYPE control (implemented as a GPIO

[Qemu-devel] [PATCH v7 07/12] dma: Add Xilinx Zynq devcfg device model

Add a minimal model for the devcfg device which is part of Zynq. This model supports DMA capabilities and interrupt generation. Signed-off-by: Peter Crosthwaite Signed-off-by: Alistair Francis --- V7: - Corrections to the internal

[Qemu-devel] [PATCH v7 04/12] register: Define REG and FIELD macros

From: Peter Crosthwaite Define some macros that can be used for defining registers and fields. The REG32 macro will define A_FOO, for the byte address of a register as well as R_FOO for the uint32_t[] register number (A_FOO / 4). The FIELD macro will define

[Qemu-devel] [PATCH v7 06/12] register: Add block initialise helper

From: Peter Crosthwaite Add a helper that will scan a static RegisterAccessInfo Array and populate a container MemoryRegion with registers as defined. Signed-off-by: Peter Crosthwaite Signed-off-by: Alistair Francis

[Qemu-devel] [PATCH v7 10/12] register: Add GPIO API

Add GPIO functionality to the register API. This allows association and automatic connection of GPIOs to bits in registers. GPIO inputs will attach to handlers that automatically set read-only bits in registers. GPIO outputs will be updated to reflect their field value when their respective

[Qemu-devel] [PATCH v7 01/12] bitops: Add MAKE_64BIT_MASK macro

Add a macro that creates a 64bit value which has length number of ones shifted across by the value of shift. Signed-off-by: Alistair Francis Reviewed-by: Alex Bennée --- V7: - Fixup commit typo - Use the method from deposit64() V5: -

[Qemu-devel] [PATCH v7 09/12] irq: Add opaque setter routine

From: Peter Crosthwaite Add a routine to set or override the opaque data of an IRQ. Qdev currently always initialises IRQ opaque as the device itself. This allows you to override to a custom opaque in the case where there is extra or different data needed.

[Qemu-devel] [PATCH v7 03/12] register: Add Memory API glue

Add memory io handlers that glue the register API to the memory API. Just translation functions at this stage. Although it does allow for devices to be created without all-in-one mmio r/w handlers. This patch also adds the RegisterInfoArray struct, which allows all of the individual RegisterInfo

[Qemu-devel] [PATCH v7 00/12] data-driven device registers

This patch series is based on Peter C's original register API. His original cover letter is below. Future work: Allow support for memory attributes. V7: - Rebase - Fixup the DecCFG model - Fixes and corrections to the register API model and functions V6: - Small changes to the API based on

Re: [Qemu-devel] [RFC v3 PATCH 07/14] tcg/ppc: Add support for fence

On 06/22/2016 12:50 PM, Sergey Fedorov wrote: > On 18/06/16 07:03, Pranith Kumar wrote: >> Signed-off-by: Richard Henderson >> Signed-off-by: Pranith Kumar >> --- >> tcg/ppc/tcg-target.inc.c | 24 >> 1 file changed, 24

Re: [Qemu-devel] [PATCH 1/3] mirror: clarify mirror_do_read return code

On 06/22/2016 01:51 PM, John Snow wrote: > mirror_do_read intends to return the number of sectors processed after > the starting sector, without regard to how many sectors were processed > before the starting sector due to alignment. > Eventually, we may want this to be in terms of bytes instead

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