[Qemu-devel] [PULL 10/34] nvdimm acpi: save arg3 of _DSM method

From: Xiao Guangrong Check if the input Arg3 is valid then store it into ARG3 if it is needed Signed-off-by: Xiao Guangrong Reviewed-by: Stefan Hajnoczi Reviewed-by: Michael S. Tsirkin

[Qemu-devel] [PULL 02/34] ipmi: Add SMBIOS table entry

From: Corey Minyard Add an IPMI table entry to the SMBIOS. Signed-off-by: Corey Minyard Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- include/hw/smbios/ipmi.h | 15 ++

[Qemu-devel] [PULL 01/34] smbios: Move table build tools into an include file.

From: Corey Minyard This will let things in other files (like IPMI) build SMBIOS tables. Signed-off-by: Corey Minyard Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/smbios/smbios_build.h |

Re: [Qemu-devel] [PATCH v2 09/10] tests: acpi: add CPU hotplug testcase

On Thu, Jun 23, 2016 at 03:47:36PM +0200, Igor Mammedov wrote: > On Thu, 23 Jun 2016 16:08:38 +0300 > Marcel Apfelbaum wrote: > > > On 06/16/2016 07:55 PM, Igor Mammedov wrote: > > > Test with: > > > > > > -smp 2,cores=3,sockets=2,maxcpus=6 > > > > > > to capture sparse

Re: [Qemu-devel] [PATCH 00/13] virtio migration: Flip outer layer to vmstate

On Tue, Jun 21, 2016 at 08:13:54PM +0100, Dr. David Alan Gilbert (git) wrote: > From: "Dr. David Alan Gilbert" > > Hi, > This series converts the outer most layer of virtio to > use VMState macros; this is the easy bit, but I'm hoping that > having done that, the next

Re: [Qemu-devel] [PATCH v4 0/4] enable iommu with -device

On Tue, Jun 14, 2016 at 10:19:32AM +0300, Marcel Apfelbaum wrote: > Create the iommu device with '-device intel-iommu' instead of > '-machine,iommu=on'. > > The device is part of the machine properties because we wanted > to ensure is created before any other PCI device. > > The alternative is

Re: [Qemu-devel] Change of max-ram-below-4g initial value breaks Xen

On Do, 2016-06-23 at 17:18 +0100, Anthony PERARD wrote: > On Thu, Jun 23, 2016 at 04:57:54PM +0200, Gerd Hoffmann wrote: > > Hi, > > > > > How could xen_ram_init() find out if the value of max-ram-below-4g is > > > the default or if a user have set it? Is there another way we could fix > > >

Re: [Qemu-devel] [PATCH v1 04/11] ppc/xics: Remove unused xics_set_irq_type()

On Thu, Jun 23, 2016 at 11:17:23PM +0530, Nikunj A Dadhania wrote: > From: Benjamin Herrenschmidt > > Signed-off-by: Benjamin Herrenschmidt > Reviewed-by: David Gibson > Signed-off-by: Nikunj A Dadhania

Re: [Qemu-devel] [PATCH v3 09/22] blkdebug: Set request_alignment during .bdrv_refresh_limits()

On Thu, 06/23 16:37, Eric Blake wrote: > We want to eventually stick request_alignment alongside other > BlockLimits, but first, we must ensure it is populated at the > same time as all other limits, rather than being a special case > that is set only when a block is first opened. > > Note that

Re: [Qemu-devel] [PATCH 1/3] qapi: Report support for -device cpu hotplug in query-machines

On Fri, Jun 24, 2016 at 14:56:51 +1000, David Gibson wrote: [...] > > You are correct - query-commands says whether 'query-hotpluggable-cpus' > > exists as a command. But that is insufficient. See my review, or the > > v2 patch, where the above poor wording was corrected to say what was > >

Re: [Qemu-devel] [PATCH v2 0/2] qapi: Fix up cpu hotplug property names and add witness for cpu hotplug support

On Fri, 24 Jun 2016 07:31:39 +0200 Igor Mammedov wrote: > On Fri, 24 Jun 2016 13:00:56 +1000 > David Gibson wrote: > > > On Thu, 23 Jun 2016 23:23:32 +0200 > > Peter Krempa wrote: > > > > > Version 2: > > > - fix

Re: [Qemu-devel] [PATCH v2 2/2] qapi: keep names in 'CpuInstanceProperties' in sync with struct CPUCore

On Thu, 23 Jun 2016 23:23:34 +0200 Peter Krempa wrote: > struct CPUCore uses 'id' suffix in the property name. As docs for > query-hotpluggable-cpus state that the cpu core properties should be > passed back to device_add by management in case new members are added > and thus

Re: [Qemu-devel] [PATCH v2 0/2] qapi: Fix up cpu hotplug property names and add witness for cpu hotplug support

On Fri, 24 Jun 2016 13:00:56 +1000 David Gibson wrote: > On Thu, 23 Jun 2016 23:23:32 +0200 > Peter Krempa wrote: > > > Version 2: > > - fix typos/incompetence/drowsiness based language errors in commit > > message > > - select version 1 as prefered way

Re: [Qemu-devel] [PATCH v3 08/22] block: Give nonzero result to blk_get_max_transfer_length()

On Thu, 06/23 16:37, Eric Blake wrote: > Making all callers special-case 0 as unlimited is awkward, > and we DO have a hard maximum of BDRV_REQUEST_MAX_SECTORS given > our current block layer API limits. > > In the case of scsi, this means that we now always advertise a > limit to the guest, even

Re: [Qemu-devel] [PATCH 1/3] qapi: Report support for -device cpu hotplug in query-machines

On Fri, 24 Jun 2016 14:56:51 +1000 David Gibson wrote: > On Thu, 23 Jun 2016 21:49:25 -0600 > Eric Blake wrote: > > > On 06/23/2016 08:56 PM, David Gibson wrote: > > > On Thu, 23 Jun 2016 22:23:23 +0200 > > > Peter Krempa wrote: > > >

Re: [Qemu-devel] [PATCH 06/11] target-i386: add socket/core/thread properties to X86CPU

On Thu, 23 Jun 2016 18:43:53 -0300 Eduardo Habkost wrote: > On Thu, Jun 23, 2016 at 10:46:36PM +0200, Igor Mammedov wrote: > > On Thu, 23 Jun 2016 17:18:46 -0300 > > Eduardo Habkost wrote: > [...] > > > > > > > > > > > > > > I suggest validating the

Re: [Qemu-devel] [PATCH v1 02/11] ppc/xics: Move SPAPR specific code to a separate file

On Thu, Jun 23, 2016 at 11:17:21PM +0530, Nikunj A Dadhania wrote: > From: Benjamin Herrenschmidt > > Leave the core ICP/ICS logic in xics.c and move the top level > class wrapper, hypercall and RTAS handlers to xics_spapr.c > > Signed-off-by: Benjamin Herrenschmidt

Re: [Qemu-devel] [PATCH v3 07/22] scsi: Advertise limits by blocksize, not 512

On Thu, 06/23 16:37, Eric Blake wrote: > s->blocksize may be larger than 512, in which case our > tweaks to max_xfer_len and opt_xfer_len must be scaled > appropriately. > > Reported-by: Fam Zheng > Signed-off-by: Eric Blake > CC: qemu-sta...@nongnu.org > >

Re: [Qemu-devel] [PATCH v1 03/11] ppc/xics: Implement H_IPOLL using an accessor

On Thu, Jun 23, 2016 at 11:17:22PM +0530, Nikunj A Dadhania wrote: > From: Benjamin Herrenschmidt > > None of the other presenter functions directly mucks with the > internal state, so don't do it there either. > > Signed-off-by: Benjamin Herrenschmidt

Re: [Qemu-devel] [PATCH v1 01/11] ppc/xics: Rename existing xics to xics_spapr

On Thu, Jun 23, 2016 at 11:17:20PM +0530, Nikunj A Dadhania wrote: > From: Benjamin Herrenschmidt > > The common class doesn't change, the KVM one is sPAPR specific. Rename > variables and functions to xics_spapr. > > Retain the type name as "xics" to preserve

[Qemu-devel] [PATCH 4/4] Revert "mirror: Workaround for unexpected iohandler events during completion"

This reverts commit ab27c3b5e7408693dde0b565f050aa55c4a1bcef. The virtio host notifiers are now covered by bdrv_drained_begin/end, so we don't need this hacky quiescing of the iohandler context anymore. Signed-off-by: Fam Zheng --- block/mirror.c | 9 - 1 file changed,

[Qemu-devel] [PATCH 2/4] virtio: Always use aio path to set host handler

Apart from the interface difference, the aio version works the same as the non-aio one. The event notifier versus aio fd handler makes no diffeerence, except the former led to an ugly patch in commit ab27c3b5e7, which won't be necessary any more. As the first step to unify them, all callers are

[Qemu-devel] [PATCH 3/4] virtio: Drop the unused virtio_queue_set_host_notifier_fd_handler code

Signed-off-by: Fam Zheng --- hw/virtio/virtio.c | 24 include/hw/virtio/virtio.h | 2 -- 2 files changed, 26 deletions(-) diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c index 99cd0c0..7a375c1 100644 --- a/hw/virtio/virtio.c +++

[Qemu-devel] [PATCH 1/4] virtio: Add typedef for handle_output

The function pointer signature has been repeated a few times, using a typedef may make coding easier. Signed-off-by: Fam Zheng --- hw/virtio/virtio.c | 9 - include/hw/virtio/virtio.h | 5 +++-- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git

[Qemu-devel] [PATCH 0/4] virtio: Merge two host notifier handling paths

This series is based on top of Cornelia's [PATCH 0/6] virtio: refactor host notifiers The benifit is we don't use event_notifier_set_handler even in non-dataplane now, which in turn makes virtio-blk and virtio-scsi follow block layer aio context semantics. Specifically, I/O requests must

[Qemu-devel] [PATCH v3 3/3] palmetto-bmc: Configure the SCU's hardware strapping register

The magic constant configures the following options: * 28:27: Configure DRAM size as 256MB * 26:24: DDR3 SDRAM with CL = 6, CWL = 5 * 23: Configure 24/48MHz CLKIN * 22: Disable GPIOE pass-through mode * 21: Disable GPIOD pass-through mode * 20: Enable LPC decode of SuperIO 0x2E/0x4E addresses *

[Qemu-devel] [PATCH v3 1/3] hw/misc: Add a model for the ASPEED System Control Unit

The SCU is a collection of chip-level control registers that manage the various functions supported by ASPEED SoCs. Typically the bits control interactions with clocks, external hardware or reset behaviour, and we can largly take a hands-off approach to reads and writes. Firmware makes heavy use

[Qemu-devel] [PATCH v3 2/3] ast2400: Integrate the SCU model and set silicon revision

By specifying the silicon revision we select the appropriate reset values for the SoC. Additionally, expose hardware strapping properties aliasing those provided by the SCU for board-specific configuration. Signed-off-by: Andrew Jeffery Reviewed-by: Cédric Le Goater

[Qemu-devel] [PATCH v3 0/3] Add ASPEED SCU device

Hi all, These are three patches implementing minimal functionality for the ASPEED System Control Unit device and integrating it into the AST2400 SoC model/palmetto-bmc machine. The device is critical for initialisation of u-boot and the kernel as it provides chip level control registers,

Re: [Qemu-devel] Question about a qemu Aarch64 error when adding several SCSI disks

Hi Peter, Follow your advice, I have complied the Qemu v2.6. stack@u202158:~$ kvm --version QEMU emulator version 2.6.50 (v2.6.0-1280-g6f1d2d1-dirty), Copyright (c) 2003-2008 Fabrice Bellard With this newest version, I use virt-manager to create the guest , the xml file is in the

Re: [Qemu-devel] [PATCH 1/3] qapi: Report support for -device cpu hotplug in query-machines

On Thu, 23 Jun 2016 21:49:25 -0600 Eric Blake wrote: > On 06/23/2016 08:56 PM, David Gibson wrote: > > On Thu, 23 Jun 2016 22:23:23 +0200 > > Peter Krempa wrote: > > > >> For management apps it's very useful to know whether the selected > >> machine

[Qemu-devel] [PATCH] target-sparc: Use overalignment flags for twinx and block asis

This allows us to enforce 16 and 64-byte alignment without any extra overhead. Signed-off-by: Richard Henderson --- This patch is dependent on by sparc improvements branch, along with Sergey's alignment improvement patch. A buildable tree is at

Re: [Qemu-devel] [PATCH v4] Improve the alignment check infrastructure

On 06/23/2016 12:18 PM, Richard Henderson wrote: On 06/23/2016 11:16 AM, Sergey Sorokin wrote: +#if defined(CONFIG_SOFTMMU) +/** + * get_alignment_bits + * @memop: TCGMemOp value + * + * Extract the alignment size from the memop. + * + * Returns: 0 in case of byte access (which is always

Re: [Qemu-devel] [PATCH 06/12] monitor: remove mhandler.cmd_new

On 06/22/2016 06:08 PM, marcandre.lur...@redhat.com wrote: > From: Marc-André Lureau > > This is no longer necessary, now that middle mode has been removed. > > Signed-off-by: Marc-André Lureau > --- > docs/writing-qmp-commands.txt |

Re: [Qemu-devel] [PATCH 05/12] monitor: register the qapi generated commands

On 06/22/2016 06:08 PM, marcandre.lur...@redhat.com wrote: > From: Marc-André Lureau > > Stop using the so-called 'middle' mode. Instead, use qmp_find_command() > from generated qapi commands registry. > > Note: this commit requires a 'make clean' prior to make,

Re: [Qemu-devel] [PATCH 04/12] monitor: remove usage of generated marshal functions

On 06/22/2016 06:08 PM, marcandre.lur...@redhat.com wrote: > From: Marc-André Lureau > > Once the middle mode is removed, the generated marshal functions will no > longer be exported. > > Signed-off-by: Marc-André Lureau > --- >

Re: [Qemu-devel] Qemu and heavily increased RSS usage

> > If it's 10M nothing. If there is a 100M regression that is also caused > > by RCU, we have to give up on it for that data structure, or mmap/munmap > > the affected data structures. > > If it was only 10MB I would agree. But if I run the VM described earlier > in this thread it goes from

[Qemu-devel] [PATCH 1/2] nbd: Convert to byte-based interface

The NBD protocol doesn't have any notion of sectors, so it is a fairly easy convertion to use byte-based read and write. Signed-off-by: Eric Blake --- block/nbd-client.h | 8 include/block/nbd.h | 1 - block/nbd-client.c | 30 +-

Re: [Qemu-devel] [PATCH 03/12] monitor: register gen:false commands manually

On 06/22/2016 06:08 PM, marcandre.lur...@redhat.com wrote: > From: Marc-André Lureau > > Since a few commands are using 'gen': false, they are not registered > automatically by the generator. Register manually instead. > > This is in preparation for removal of qapi

[Qemu-devel] [PATCH 0/2] Switch raw NBD to byte-based

With these two patches, I'm finally able to run: ./qemu-nbd -f raw -x foo file ./qemu-io -f raw -t none nbd://localhost:10809/foo and get true byte-based access over the wire for operations such as 'r 1 1' or 'w 1 1', rather than RMW sector-aligned access. Depends on these series: v3 Byte-based

[Qemu-devel] [PATCH v3 5/9] tcg: Reorg TCGOp chaining

Instead of using -1 as end of chain, use 0, and link through the 0 entry as a fully circular double-linked list. Signed-off-by: Richard Henderson --- include/exec/gen-icount.h | 2 +- tcg/optimize.c| 8 ++-- tcg/tcg-op.c | 2 +- tcg/tcg.c

[Qemu-devel] [PATCH 2/2] raw_bsd: Convert to byte-based interface

Since the raw format driver is just passing things through, we can do byte-based read and write if the underlying protocol does likewise. There's one tricky part - if we probed the image format, we document that we restrict operations on the initial sector. Rather than trying to handle a

Re: [Qemu-devel] [PATCH 02/12] qapi-schema: add 'device_add'

On 06/22/2016 06:07 PM, marcandre.lur...@redhat.com wrote: > From: Marc-André Lureau > > Even though device_add is not fully qapi'fied, we may add it to the json > schema with 'gen': false, so registration and documentation can be > generated. > > Signed-off-by:

Re: [Qemu-devel] [PULL 5/8] target-sparc: Use global registers for the register window

On 06/16/2016 02:53 PM, Mark Cave-Ayland wrote: On 16/06/16 21:26, Richard Henderson wrote: On 06/14/2016 02:52 PM, Mark Cave-Ayland wrote: Following up the bug report at https://bugs.launchpad.net/qemu/+bug/1588328, I bisected the regression down to this particular commit. I can't see

[Qemu-devel] [PATCH v3 9/9] tcg: Lower indirect registers in a separate pass

Rather than rely on recursion during the middle of register allocation, lower indirect registers to loads and stores off the indirect base into plain temps. For an x86_64 host, with sufficient registers, this results in identical code, modulo the actual register assignments. For an i686 host,

Re: [Qemu-devel] [PATCH 1/3] qapi: Report support for -device cpu hotplug in query-machines

On 06/23/2016 08:56 PM, David Gibson wrote: > On Thu, 23 Jun 2016 22:23:23 +0200 > Peter Krempa wrote: > >> For management apps it's very useful to know whether the selected >> machine type supports cpu hotplug via the new -device approach. Using >> the presence of

[Qemu-devel] [PATCH v3 6/9] tcg: Fold life data into TCGOp

Reduce the size of other bitfields to make room. This reduces the cache footprint of compilation. Signed-off-by: Richard Henderson --- tcg/tcg.c | 9 +++-- tcg/tcg.h | 26 ++ 2 files changed, 17 insertions(+), 18 deletions(-) diff --git

[Qemu-devel] [PATCH v3 4/9] tcg: Compress liveness data to 16 bits

This reduces both memory usage and per-insn cacheline usage during code generation. Signed-off-by: Richard Henderson --- tcg/tcg.c | 58 ++ tcg/tcg.h | 16 ++-- 2 files changed, 32 insertions(+), 42

[Qemu-devel] [PATCH v3 2/9] tcg: Optimize spills of constants

While we can store constants via constrants on INDEX_op_st_i32 et al, we weren't able to spill constants to backing store. Add a new backend interface, tcg_out_sti, which may store the constant (and is allowed to fail). Rearrange the temp_* helpers so that we only attempt to directly store a

[Qemu-devel] [PATCH v3 3/9] tcg: Require liveness analysis

Signed-off-by: Richard Henderson --- tcg/tcg.c | 20 1 file changed, 20 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index 44de991..64060c6 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -23,7 +23,6 @@ */ /* define it to use liveness analysis (better

[Qemu-devel] [PATCH v3 0/9] Third try at fixing sparc register allocation

I was unhappy about the complexity of the second try. Better to convert to normal temps, allowing in rare occasions, spilling the "globals" to the stack in order to satisfy register allocation. I can no longer provoke an allocation failure on i686. Hopefully this fixes the OpenBSD case that Mark

[Qemu-devel] [PATCH v3 1/9] tcg: Fix name for high-half register

Reviewed-by: David Gibson Signed-off-by: Richard Henderson --- tcg/tcg.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index 254427b..154ffe8 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -557,7 +557,7 @@ int

[Qemu-devel] [PATCH v3 7/9] tcg: Compress dead_temps and mem_temps into a single array

We only need two bits per temporary. Fold the two bytes into one, and reduce the memory and cachelines required during compilation. Signed-off-by: Richard Henderson --- tcg/tcg.c | 118 +++--- 1 file changed, 59

[Qemu-devel] [PATCH v3 8/9] tcg: Include liveness info in the dumps

Signed-off-by: Richard Henderson --- tcg/tcg.c | 26 ++ 1 file changed, 26 insertions(+) diff --git a/tcg/tcg.c b/tcg/tcg.c index fd92b06..3e4bc99 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -1009,6 +1009,7 @@ void tcg_dump_ops(TCGContext *s)

Re: [Qemu-devel] [Qemu-ppc] [PATCH] target-ppc: Correct ppc3500_spin initial TLB size

On 06/23/2016 04:01 PM, alar...@ddci.com wrote: > On 17 Jun 2016 22:55:47 Scott Wood wrote: > On 06/17/2016 05:13 PM, Aaron Larson wrote: > > AL> The root cause is that the function computing the size of the TLB > AL> entry, namely booke206_page_size_to_tlb ... [is wrong] > AL> ---

Re: [Qemu-devel] [PATCH v2 0/2] qapi: Fix up cpu hotplug property names and add witness for cpu hotplug support

On Thu, 23 Jun 2016 23:23:32 +0200 Peter Krempa wrote: > Version 2: > - fix typos/incompetence/drowsiness based language errors in commit message > - select version 1 as prefered way > - add -id suffix to all members of CpuInstanceProperties > - note in qapi-schema the need

Re: [Qemu-devel] [PATCH 1/3] qapi: Report support for -device cpu hotplug in query-machines

On Thu, 23 Jun 2016 22:23:23 +0200 Peter Krempa wrote: > For management apps it's very useful to know whether the selected > machine type supports cpu hotplug via the new -device approach. Using > the presence of 'query-hotpluggable-cpus' is enough for a withess. > > Add a

Re: [Qemu-devel] [PATCH 2/3] [VARIANT 1] qapi: Change 'core' to 'core-id' in 'CpuInstanceProperties'

On Thu, 23 Jun 2016 22:54:18 +0200 Igor Mammedov wrote: > On Thu, 23 Jun 2016 22:23:24 +0200 > Peter Krempa wrote: > > > struct CPUCore uses 'core-id' as the property name. As docs for > > query-hotpluggable-cpus state that the cpu core properties

[Qemu-devel] [PATCH] hw/misc: Add simple measurement hardware

Trusted Boot is based around having a trusted store of measurement data and a secure communications channel between that store and an attestation target. In actual hardware, that's a TPM. Since the TPM can only be accessed via the host system, this in turn requires that the TPM be able to perform

Re: [Qemu-devel] [PATCH] target-ppc: ppce500_spin.c uses SPR_PIR, should use SPR_BOOKE_PIR

On Thu, Jun 23, 2016 at 03:35:17PM -0700, Aaron Larson wrote: > > ppce500_spin.c uses SPR_PIR to initialize the spin table, however on > Book E processors the correct SPR is SPR_BOOKE_PIR. > > Signed-off-by: Aaron Larson Applied to ppc-for-2.7, thanks. IIRC this leaves a

Re: [Qemu-devel] [RFC PATCH v0 1/1] spapr: Support setting of compat CPU type for CPU cores

On Fri, Jun 24, 2016 at 07:10:06AM +0530, Bharata B Rao wrote: > On Thu, Jun 23, 2016 at 12:55:36PM -0300, Eduardo Habkost wrote: > > On Wed, Jun 22, 2016 at 09:09:46AM +0200, Igor Mammedov wrote: > > > On Wed, 22 Jun 2016 08:00:28 +0530 > > > Bharata B Rao wrote: > >

Re: [Qemu-devel] [PATCH v2 3/3] palmetto-bmc: Configure the SCU's hardware strapping register

On Thu, 2016-06-23 at 18:39 +0100, Peter Maydell wrote: > On 23 June 2016 at 03:15, Andrew Jeffery wrote: > > > > The magic constant configures the following options: > > > > * 28:27: Configure DRAM size as 256MB > > * 26:24: DDR3 SDRAM with CL = 6, CWL = 5 > > * 23: Configure

Re: [Qemu-devel] [PATCH v2 1/3] hw/misc: Add a model for the ASPEED System Control Unit

On Thu, 2016-06-23 at 18:42 +0100, Peter Maydell wrote: > On 23 June 2016 at 03:15, Andrew Jeffery wrote: > > > > The SCU is a collection of chip-level control registers that manage the > > various functions supported by ASPEED SoCs. Typically the bits control > > interactions

Re: [Qemu-devel] [PATCH v2 1/3] hw/misc: Add a model for the ASPEED System Control Unit

On Thu, 2016-06-23 at 18:37 +0100, Peter Maydell wrote: > On 23 June 2016 at 03:15, Andrew Jeffery wrote: > > > > The SCU is a collection of chip-level control registers that manage the > > various functions supported by ASPEED SoCs. Typically the bits control > > interactions

Re: [Qemu-devel] [RFC PATCH v0 1/1] spapr: Support setting of compat CPU type for CPU cores

On Thu, Jun 23, 2016 at 12:55:36PM -0300, Eduardo Habkost wrote: > On Wed, Jun 22, 2016 at 09:09:46AM +0200, Igor Mammedov wrote: > > On Wed, 22 Jun 2016 08:00:28 +0530 > > Bharata B Rao wrote: > > > > > On Tue, Jun 21, 2016 at 09:09:57AM +0200, Igor Mammedov wrote: >

[Qemu-devel] [Bug 1580459] Re: Windows (10?) guest freezes entire host on shutdown if using PCI passthrough

Apparently Passthrough devices work better when using a MSI Interrupt instead of a traditional interrupt. See post 32 https://bugs.launchpad.net/qemu/+bug/1580459/comments/32 item 2. 2. I enabled MSI Interrupts on the GPU using this URL as my reference.

[Qemu-devel] [PATCH] hw/misc: Add simple measurement hardware

Trusted Boot is based around having a trusted store of measurement data and a secure communications channel between that store and an attestation target. In actual hardware, that's a TPM. Since the TPM can only be accessed via the host system, this in turn requires that the TPM be able to perform

Re: [Qemu-devel] [PATCH 01/12] qapi-schema: use generated marshaller for 'qmp_capabilities'

On 06/22/2016 06:07 PM, marcandre.lur...@redhat.com wrote: > From: Marc-André Lureau > > qapi'fy the 'qmp_capabilities' command. > > Signed-off-by: Marc-André Lureau > --- > monitor.c| 4 ++-- > qapi-schema.json | 19

[Qemu-devel] [PATCH v3 16/22] block: Wording tweaks to write zeroes limits

Improve the documentation of the write zeroes limits, to mention additional constraints that drivers should observe. Worth squashing into commit cf081fca, if that hadn't been pushed already :) Signed-off-by: Eric Blake --- v3: new patch, split off from "block: Switch discard

[Qemu-devel] [PATCH v3 19/22] block: Split bdrv_merge_limits() from bdrv_refresh_limits()

During bdrv_merge_limits(), we were computing initial limits based on another BDS in two places. At first glance, the two computations are not identical (one is doing straight copying, the other is doing merging towards or away from zero) - but when you realize that the first round is starting

[Qemu-devel] [PATCH v3 20/22] block: Move request_alignment into BlockLimit

It makes more sense to have ALL block size limit constraints in the same struct. Improve the documentation while at it. Simplify a couple of conditionals, now that we have audited and documented that request_alignment is always non-zero. Signed-off-by: Eric Blake --- v3:

[Qemu-devel] [PATCH v3 14/22] block: Set default request_alignment during bdrv_refresh_limits()

We want to eventually stick request_alignment alongside other BlockLimits, but first, we must ensure it is populated at the same time as all other limits, rather than being a special case that is set only when a block is first opened. Now that all drivers have been updated to supply an override

[Qemu-devel] [PATCH v3 22/22] block: Use bool as appropriate for BDS members

Using int for values that are only used as booleans is confusing. While at it, rearrange a couple of members so that all the bools are contiguous. Signed-off-by: Eric Blake --- v3: new patch --- include/block/block.h | 8 include/block/block_int.h | 13

[Qemu-devel] [PATCH v3 18/22] block: Drop raw_refresh_limits()

The raw block driver was blindly copying all limits from bs->file, even though: 1. the main bdrv_refresh_limits() already does this for many of the limits, and 2. blindly copying from the children can weaken any stricter limits that were already inherited from the backing chain during the main

[Qemu-devel] [PATCH v3 21/22] block: Fix error message style

error_setg() is not supposed to be used for multi-sentence messages; tweak the message to append a hint instead. Signed-off-by: Eric Blake --- v3: new patch --- block/raw-posix.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/block/raw-posix.c

[Qemu-devel] [PATCH v3 11/22] qcow2: Set request_alignment during .bdrv_refresh_limits()

We want to eventually stick request_alignment alongside other BlockLimits, but first, we must ensure it is populated at the same time as all other limits, rather than being a special case that is set only when a block is first opened. Signed-off-by: Eric Blake Reviewed-by:

[Qemu-devel] [PATCH v3 15/22] block: Switch transfer length bounds to byte-based

Sector-based limits are awkward to think about; in our on-going quest to move to byte-based interfaces, convert max_transfer_length and opt_transfer_length. Rename them (dropping the _length suffix) so that the compiler will help us catch the change in semantics across any rebased code, and

[Qemu-devel] [PATCH v3 12/22] raw-win32: Set request_alignment during .bdrv_refresh_limits()

We want to eventually stick request_alignment alongside other BlockLimits, but first, we must ensure it is populated at the same time as all other limits, rather than being a special case that is set only when a block is first opened. In this case, raw_probe_alignment() already did what we

[Qemu-devel] [PATCH v3 10/22] iscsi: Set request_alignment during .bdrv_refresh_limits()

We want to eventually stick request_alignment alongside other BlockLimits, but first, we must ensure it is populated at the same time as all other limits, rather than being a special case that is set only when a block is first opened. Signed-off-by: Eric Blake Reviewed-by:

[Qemu-devel] [PATCH v3 13/22] block: Set request_alignment during .bdrv_refresh_limits()

We want to eventually stick request_alignment alongside other BlockLimits, but first, we must ensure it is populated at the same time as all other limits, rather than being a special case that is set only when a block is first opened. Add a .bdrv_refresh_limits() to all four of our legacy devices

[Qemu-devel] [PATCH v3 03/22] block: Fix harmless off-by-one in bdrv_aligned_preadv()

If the amount of data to read ends exactly on the total size of the bs, then we were wasting time creating a local qiov to read the data in preparation for what would normally be appending zeroes beyond the end, even though this corner case has nothing further to do. Signed-off-by: Eric Blake

[Qemu-devel] [PATCH v3 02/22] block: Document supported flags during bdrv_aligned_preadv()

We don't pass any flags on to drivers to handle. Tighten an assert to explain why we pass 0 to bdrv_driver_preadv(), and add some comments on things to be aware of if we want to turn on per-BDS BDRV_REQ_FUA support during reads in the future. Also, document that we may want to consider using

[Qemu-devel] [PATCH v3 07/22] scsi: Advertise limits by blocksize, not 512

s->blocksize may be larger than 512, in which case our tweaks to max_xfer_len and opt_xfer_len must be scaled appropriately. Reported-by: Fam Zheng Signed-off-by: Eric Blake CC: qemu-sta...@nongnu.org --- v3: new patch --- hw/scsi/scsi-generic.c | 3 ++- 1

[Qemu-devel] [PATCH v3 05/22] nbd: Advertise realistic limits to block layer

We were basing the advertisement of maximum discard and transfer length off of UINT32_MAX, but since the rest of the block layer has signed int limits on a transaction, nothing could ever reach that maximum, and we risk overflowing an int once things are converted to byte-based rather than

[Qemu-devel] [PATCH v3 17/22] block: Switch discard length bounds to byte-based

Sector-based limits are awkward to think about; in our on-going quest to move to byte-based interfaces, convert max_discard and discard_alignment. Rename them, using 'pdiscard' as an aid to track which remaining discard interfaces need conversion, and so that the compiler will help us catch the

[Qemu-devel] [PATCH v3 08/22] block: Give nonzero result to blk_get_max_transfer_length()

Making all callers special-case 0 as unlimited is awkward, and we DO have a hard maximum of BDRV_REQUEST_MAX_SECTORS given our current block layer API limits. In the case of scsi, this means that we now always advertise a limit to the guest, even in cases where the underlying layers previously

[Qemu-devel] [PATCH v3 06/22] iscsi: Advertise realistic limits to block layer

The function sector_limits_lun2qemu() returns a value in units of the block layer's 512-byte sector, and can be as large as 0x4000, which is much larger than the block layer's inherent limit of BDRV_REQUEST_MAX_SECTORS. The block layer already handles '0' as a synonym to the inherent limit,

[Qemu-devel] [PATCH v3 09/22] blkdebug: Set request_alignment during .bdrv_refresh_limits()

We want to eventually stick request_alignment alongside other BlockLimits, but first, we must ensure it is populated at the same time as all other limits, rather than being a special case that is set only when a block is first opened. Note that when the user does not provide "align", then we were

[Qemu-devel] [PATCH v3 01/22] block: Tighter assertions on bdrv_aligned_pwritev()

For symmetry with bdrv_aligned_preadv(), assert that the caller really has aligned things properly. This requires adding an align parameter, which is used now only in the new asserts, but will come in handy in a later patch that adds auto-fragmentation to the max transfer size, since that value

[Qemu-devel] [PATCH v3 04/22] nbd: Allow larger requests

The NBD layer was breaking up request at a limit of 2040 sectors (just under 1M) to cater to old qemu-nbd. But the server limit was raised to 32M in commit 2d8214885 to match the kernel, more than three years ago; and the upstream NBD Protocol is proposing documentation that without any explicit

[Qemu-devel] [PATCH v3 00/22] Byte-based block limits

BlockLimits is currently an ugly mix of byte limits vs. sector limits. Unify it. Fix some bugs I found in bdrv_aligned_preadv() while at it. Prequisite: none (built on Kevin's block branch, which is currently merged into master) Also available as a tag at: git fetch

[Qemu-devel] [PATCH] target-ppc: ppce500_spin.c uses SPR_PIR, should use SPR_BOOKE_PIR

ppce500_spin.c uses SPR_PIR to initialize the spin table, however on Book E processors the correct SPR is SPR_BOOKE_PIR. Signed-off-by: Aaron Larson --- hw/ppc/ppce500_spin.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/ppc/ppce500_spin.c

Re: [Qemu-devel] [PATCH v2 2/2] qapi: keep names in 'CpuInstanceProperties' in sync with struct CPUCore

On 06/23/2016 03:23 PM, Peter Krempa wrote: > struct CPUCore uses 'id' suffix in the property name. As docs for > query-hotpluggable-cpus state that the cpu core properties should be > passed back to device_add by management in case new members are added > and thus the names for the fields should

Re: [Qemu-devel] [PATCH 06/11] target-i386: add socket/core/thread properties to X86CPU

On Thu, Jun 23, 2016 at 10:46:36PM +0200, Igor Mammedov wrote: > On Thu, 23 Jun 2016 17:18:46 -0300 > Eduardo Habkost wrote: [...] > > > > > > > > > > > I suggest validating the properties, and setting them in case > > > > they are not set: > > > > > > > >

Re: [Qemu-devel] [RFC v3 04/19] docs: new design document multi-thread-tcg.txt (DRAFTING)

On 03/06/16 23:40, Alex Bennée wrote: > This is a current DRAFT of a design proposal for upgrading TCG emulation > to take advantage of modern CPUs by running a thread-per-CPU. The > document goes through the various areas of the code affected by such a > change and proposes design requirements

Re: [Qemu-devel] Qemu and heavily increased RSS usage

Am 23.06.2016 um 18:53 schrieb Paolo Bonzini: > > On 23/06/2016 18:19, Peter Lieven wrote: >> Mhh, so your idea could be right. But what to do now? The introduction >> of RCU obviously increases the short term RSS usage. But thats never >> corrected as it seems. >> >> I see this behaviour with

Re: [Qemu-devel] [RFC PATCH 0/7] BlockBackends, nodes and guest devices

On 23/06/2016 16:36, Kevin Wolf wrote: > But of course I'm aware that there probably isn't a clear right or wrong, and > that I might be missing important details, so this needs to be discussed in > advance before I go and implement the full thing instead of just small example > patches. > > So

[Qemu-devel] [PATCH v2 2/2] qapi: keep names in 'CpuInstanceProperties' in sync with struct CPUCore

struct CPUCore uses 'id' suffix in the property name. As docs for query-hotpluggable-cpus state that the cpu core properties should be passed back to device_add by management in case new members are added and thus the names for the fields should be kept in sync. Signed-off-by: Peter Krempa

[Qemu-devel] [PATCH v2 0/2] qapi: Fix up cpu hotplug property names and add witness for cpu hotplug support

Version 2: - fix typos/incompetence/drowsiness based language errors in commit message - select version 1 as prefered way - add -id suffix to all members of CpuInstanceProperties - note in qapi-schema the need to keep members in sync - fix output text field names in HMP impl Peter Krempa (2):

[Qemu-devel] [PATCH v2 1/2] qapi: Report support for -device cpu hotplug in query-machines

For management apps it's very useful to know whether the selected machine type supports cpu hotplug via the new -device approach. Using the presence of 'query-hotpluggable-cpus' alone is not enough as a witness. Add a property to 'MachineInfo' called 'hotpluggable-cpus' that will report the

  1   2   3   4   5   >