Re: [Qemu-devel] [PATCH v4 5/5] tests: add a m25p80 test

On 06/27/2016 06:43 PM, Cédric Le Goater wrote: > This test uses the palmetto platform and the AST2400 SPI controller to > test the m25p80 flash module device model. The flash model is defined > by the platform (n25q256a) and it would be nice to find way to control > it, using a property probably.

Re: [Qemu-devel] [PATCH 0/8] pnv: more fixes to the exception model

On Mon, Jun 27, 2016 at 08:55:13AM +0200, Cédric Le Goater wrote: > Hello, > > Here are a couple more patches on the exception model and LPCR which > are surrounding the pnv core patches. The first is a prereq for all > the patches to apply, and it did not seem too much of a problem adding > it.

Re: [Qemu-devel] [PATCH] hw/ppc/spapr: Add some missing hcall function set strings

On Mon, Jun 27, 2016 at 01:25:03PM +0200, Thomas Huth wrote: > Add "hcall-sprg0" (for H_SET_SPRG0), "hcall-copy" (for H_PAGE_INIT) > and "hcall-debug" (for H_LOGICAL_CI_LOAD/STORE) to the property > "ibm,hypertas-functions" to indicate that we support these hypercalls. > > Signed-off-by: Thomas

Re: [Qemu-devel] [PATCH v8 11/12] vfio: register aer resume notification handler for aer resume

Hi Alex, On 2016/6/28 11:58, Alex Williamson wrote: On Tue, 28 Jun 2016 11:26:33 +0800 Zhou Jie wrote: Hi Alex, The INTx/MSI part needs further definition for the user. Are we actually completely tearing down interrupts with the expectation that the user will

Re: [Qemu-devel] [PATCH] spapr: fix write-past-end-of-array error in cpu core device init code

On Tue, 28 Jun 2016 12:55:07 +1000 David Gibson wrote: > On Mon, Jun 27, 2016 at 06:28:15PM +0200, Greg Kurz wrote: > > This fixes a potential QEMU crash introduced by commit 3b542549661. > > > > Signed-off-by: Greg Kurz > > --- > >

Re: [Qemu-devel] [PATCH v1 09/11] ppc/xics: Split ICS into ics-base and ics class

David Gibson writes: > [ Unknown signature status ] > On Mon, Jun 27, 2016 at 03:41:06PM +0530, Nikunj A Dadhania wrote: >> Nikunj A Dadhania writes: >> >> > David Gibson writes: >> > >> >> [ Unknown

[Qemu-devel] [Bug 1131757]

-- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1131757 Title: QEMU 1.4.0 fails to boot sparc64 linux image Status in QEMU: New Bug description: Hi! I tried to boot sparc64 linux image

[Qemu-devel] [Bug 1588328] Re: Qemu 2.6 Solaris 9 Sparc Segmentation Fault

Hi all, Thanks for the patch. I just tried, it seems to be not able to find the disk when it try to start the installation. :( ... Please specify the media from which you will install the Solaris Operating Environment. Media: 1. CD/DVD 2. Network File System 3. HTTP (Flash archive only) 4.

Re: [Qemu-devel] [PATCH v8 11/12] vfio: register aer resume notification handler for aer resume

On Tue, 28 Jun 2016 11:26:33 +0800 Zhou Jie wrote: > Hi Alex, > > > The INTx/MSI part needs further definition for the user. Are we > > actually completely tearing down interrupts with the expectation that > > the user will re-enable them or are we just masking them

Re: [Qemu-devel] [PATCH v1 10/11] ppc/xics: Add "native" XICS subclass

On Mon, Jun 27, 2016 at 03:23:13PM +0530, Nikunj A Dadhania wrote: > David Gibson writes: > > > [ Unknown signature status ] > > On Thu, Jun 23, 2016 at 11:17:29PM +0530, Nikunj A Dadhania wrote: > >> From: Benjamin Herrenschmidt > >> > >>

Re: [Qemu-devel] [PATCH] target-ppc: Eliminate redundant and incorrect function booke206_page_size_to_tlb

On Mon, Jun 27, 2016 at 10:55:03AM -0500, alar...@ddci.com wrote: > David Gibson wrote on 06/27/2016 12:32:13 > AM: > > > From: David Gibson > > To: alar...@ddci.com > > Cc: ag...@suse.de, qemu-devel@nongnu.org, qemu-...@nongnu.org > >

Re: [Qemu-devel] [PATCH v1 09/11] ppc/xics: Split ICS into ics-base and ics class

On Mon, Jun 27, 2016 at 03:41:06PM +0530, Nikunj A Dadhania wrote: > Nikunj A Dadhania writes: > > > David Gibson writes: > > > >> [ Unknown signature status ] > >> On Thu, Jun 23, 2016 at 11:17:28PM +0530, Nikunj A Dadhania wrote: > >>>

[Qemu-devel] [PULL 1/5] net: fix qemu_announce_self not emitting packets

From: Peter Lieven commit fefe2a78 accidently dropped the code path for injecting raw packets. This feature is needed for sending gratuitous ARPs after an incoming migration has completed. The result is increased network downtime for vservers where the network card is not

[Qemu-devel] [PULL 3/5] Change net/socket.c to use socket_*() functions

From: Ashijeet Acharya Use socket_*() functions from include/qemu/sockets.h instead of listen()/bind()/connect()/parse_host_port(). socket_*() fucntions are QAPI based and this patch performs this api conversion since everything will be using QAPI based sockets in the

[Qemu-devel] [PULL 5/5] vmxnet3: Fix reading/writing guest memory specially when behind an IOMMU

From: KarimAllah Ahmed When a PCI device lives behind an IOMMU, it should use 'pci_dma_*' family of functions when any transfer from/to guest memory is required while 'cpu_physical_memory_*' family of functions completely bypass any MMU/IOMMU in the system. vmxnet3 in some

[Qemu-devel] [PULL 4/5] rtl8139: save/load RxMulOk counter (again)

From: David Vrabel Commit 9d29cdeaaca3a0383af764000b71492c4fc67c6e (rtl8139: port TallyCounters to vmstate) introduced in incompatibility in the v4 format as it omitted the RxOkMul counter. There are presumably no users that were impacted by the v4 to v4' breakage, so

[Qemu-devel] [PULL 0/5] Net patches

The following changes since commit 14e60aaece20a1cfc059a69f6491b0899f9257a8: hw/net/e1000: Don't use *_to_cpup() (2016-06-27 16:39:56 +0100) are available in the git repository at: https://github.com/jasowang/qemu.git tags/net-pull-request for you to fetch changes up to

[Qemu-devel] [PULL 2/5] net: mipsnet: check transmit buffer size before sending

From: Prasad J Pandit When processing MIPSnet I/O port write operation, it uses a transmit buffer tx_buffer[MAX_ETH_FRAME_SIZE=1514]. Two indices 's->tx_written' and 's->tx_count' are used to control data written to this buffer. If the two were to be equal before writing,

Re: [Qemu-devel] [PATCH v8 11/12] vfio: register aer resume notification handler for aer resume

Hi Alex, The INTx/MSI part needs further definition for the user. Are we actually completely tearing down interrupts with the expectation that the user will re-enable them or are we just masking them such that the user needs to unmask? Also note that not all devices support DisINTx. After

Re: [Qemu-devel] [PATCH v7 10/15] qapi-event: Reduce chance of collision with event data

On 06/16/2016 06:25 AM, Markus Armbruster wrote: > Markus Armbruster writes: > >> Eric Blake writes: >> >>> When an event has data that is not boxed, we are exposing all of >>> its members alongside our local variables. So far, we haven't >>> hit a

Re: [Qemu-devel] [PATCH V5 5/5] machine: remove iommu property

On Mon, Jun 27, 2016 at 06:38:35PM +0300, Marcel Apfelbaum wrote: > Since iommu devices can be created with '-device' there is > no need to keep iommu as machine and mch property. Doesn't this break backwards compatibility? > > Signed-off-by: Marcel Apfelbaum > --- >

Re: [Qemu-devel] [PATCH V5 1/5] hw/ppc: realize the PCI root bus as part of mac99 init

On Mon, Jun 27, 2016 at 06:38:31PM +0300, Marcel Apfelbaum wrote: > Mac99's PCI root bus is not part of a host bridge, > realize it manually. Um.. how did this ever work? > > Signed-off-by: Marcel Apfelbaum > --- > hw/ppc/mac_newworld.c | 1 + > 1 file changed, 1

Re: [Qemu-devel] [PATCH] spapr: fix write-past-end-of-array error in cpu core device init code

On Mon, Jun 27, 2016 at 06:28:15PM +0200, Greg Kurz wrote: > This fixes a potential QEMU crash introduced by commit 3b542549661. > > Signed-off-by: Greg Kurz > --- > hw/ppc/spapr_cpu_core.c |3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) Ugh. The existing code is

Re: [Qemu-devel] [PATCH v7 03/15] qapi: Require all branches of flat union enum to be covered

On 06/14/2016 07:46 AM, Eric Blake wrote: > On 06/14/2016 07:24 AM, Markus Armbruster wrote: >> Eric Blake writes: >> >>> We were previously enforcing that all flat union branches were >>> found in the corresponding enum, but not that all enum values >>> were covered by

[Qemu-devel] [PATCH] quorum: Only compile when supported

This was the only exceptional module init function that does something else than a simple list of bdrv_register() calls, in all the block drivers. The qcrypto_hash_supports is actually a static check, determined at compile time. Follow the block-job-$(CONFIG_FOO) convention for consistency.

Re: [Qemu-devel] [PATCH v4 1/3] block: ignore flush requests when storage is clean

On Mon, 06/27 17:47, Denis V. Lunev wrote: > From: Evgeny Yakovlev > > Some guests (win2008 server for example) do a lot of unnecessary > flushing when underlying media has not changed. This adds additional > overhead on host when calling fsync/fdatasync. > > This

Re: [Qemu-devel] [PATCH] i2c: Fix SMBus read transactions to avoid double events

On Mon, Jun 27, 2016 at 3:04 PM, wrote: > From: Corey Minyard > > Change 2293c27faddf (i2c: implement broadcast write) added broadcast > capability to the I2C bus, but it broke SMBus read transactions. > An SMBus read transaction does two

[Qemu-devel] [PATCH v4 23/24] target-sparc: Use cpu_loop_exit_restore from helper_check_ieee_exceptions

This avoids needing to save state before every FP operation. Reviewed-By: Artyom Tarasenko Signed-off-by: Richard Henderson --- target-sparc/fop_helper.c | 17 + target-sparc/translate.c | 6 +- 2 files changed, 14 insertions(+), 9

[Qemu-devel] [PATCH v4 24/24] target-sparc: Elide duplicate updates to fprs

Reviewed-By: Artyom Tarasenko Signed-off-by: Richard Henderson --- target-sparc/translate.c | 45 +++-- 1 file changed, 27 insertions(+), 18 deletions(-) diff --git a/target-sparc/translate.c

[Qemu-devel] [PATCH v4 19/24] target-sparc: Directly implement block and short ldf/stf asis

Reviewed-By: Artyom Tarasenko Signed-off-by: Richard Henderson --- target-sparc/translate.c | 122 +++ 1 file changed, 122 insertions(+) diff --git a/target-sparc/translate.c b/target-sparc/translate.c index

[Qemu-devel] [PATCH v4 22/24] target-sparc: Use cpu_fsr in stfsr

Reviewed-By: Artyom Tarasenko Signed-off-by: Richard Henderson --- target-sparc/translate.c | 7 ++- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/target-sparc/translate.c b/target-sparc/translate.c index ed0853a..dea1b5f 100644 ---

[Qemu-devel] [PATCH v4 17/24] target-sparc: Pass TCGMemOp constants to helper_ld/st_asi

Reduces the argument count for helper_ld_asi; do helper_st_asi for consistency. Reviewed-By: Artyom Tarasenko Signed-off-by: Richard Henderson --- target-sparc/helper.h | 4 +-- target-sparc/ldst_helper.c | 73

[Qemu-devel] [PATCH v4 21/24] target-sparc: Use explicit writes to cpu_fsr

By arranging for explicit writes to cpu_fsr after floating point operations, we are able to mark the helpers as not writing to tcg globals, which means that we don't need to invalidate the integer register set across said calls. Reviewed-By: Artyom Tarasenko Signed-off-by:

[Qemu-devel] [PATCH v4 13/24] target-sparc: Use QT0 to return results from ldda

Also implement a few more twinx asis. Reviewed-By: Artyom Tarasenko Signed-off-by: Richard Henderson --- target-sparc/helper.h | 2 +- target-sparc/ldst_helper.c | 156 - target-sparc/translate.c | 12

[Qemu-devel] [PATCH v4 20/24] target-sparc: Remove helper_ldf_asi, helper_stf_asi

We've now implemented all fp asis inline, except for the no-fault memory reads. The latter can be passed directly to helper_ld_asi. Reviewed-By: Artyom Tarasenko Signed-off-by: Richard Henderson --- target-sparc/helper.h | 2 -

[Qemu-devel] [PATCH v4 11/24] target-sparc: Use defines from asi.h

Reviewed-By: Artyom Tarasenko Signed-off-by: Richard Henderson --- target-sparc/ldst_helper.c | 459 +++-- target-sparc/translate.c | 6 +- 2 files changed, 235 insertions(+), 230 deletions(-) diff --git

[Qemu-devel] [PATCH v4 16/24] target-sparc: Fix obvious error in ASI_M_BFILL

Reviewed-By: Artyom Tarasenko Signed-off-by: Richard Henderson --- target-sparc/ldst_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-sparc/ldst_helper.c b/target-sparc/ldst_helper.c index 23840db..3700ca1 100644 ---

[Qemu-devel] [PATCH v4 05/24] target-sparc: Unify asi handling between 32 and 64-bit

We now have a single copy of gen_ld_asi, gen_st_asi, gen_swap_asi, and everything uses gen_get_asi. Reviewed-By: Artyom Tarasenko Signed-off-by: Richard Henderson --- target-sparc/translate.c | 285 ++- 1 file

[Qemu-devel] [PATCH v4 18/24] target-sparc: Directly implement easy ldf/stf asis

Reviewed-By: Artyom Tarasenko Signed-off-by: Richard Henderson --- target-sparc/translate.c | 45 + 1 file changed, 45 insertions(+) diff --git a/target-sparc/translate.c b/target-sparc/translate.c index

[Qemu-devel] [PATCH v4 14/24] target-sparc: Introduce gen_check_align

Reviewed-By: Artyom Tarasenko Signed-off-by: Richard Henderson --- target-sparc/translate.c | 48 +--- 1 file changed, 13 insertions(+), 35 deletions(-) diff --git a/target-sparc/translate.c

[Qemu-devel] [PATCH v4 15/24] target-sparc: Directly implement easy ldd/std asis

Reviewed-By: Artyom Tarasenko Signed-off-by: Richard Henderson --- target-sparc/translate.c | 115 ++- 1 file changed, 103 insertions(+), 12 deletions(-) diff --git a/target-sparc/translate.c

[Qemu-devel] [PATCH v4 09/24] target-sparc: Import linux/arch/sparc/include/uapi/asm/asi.h

Copied from tag v4.2, 64291f7db5bd8150a74ad2036f1037e6a0428df2. Reviewed-By: Artyom Tarasenko Signed-off-by: Richard Henderson --- target-sparc/asi.h | 297 + 1 file changed, 297 insertions(+) create

[Qemu-devel] [PATCH v4 12/24] target-sparc: Directly implement easy ld/st asis

Reviewed-By: Artyom Tarasenko Signed-off-by: Richard Henderson --- target-sparc/translate.c | 104 --- 1 file changed, 90 insertions(+), 14 deletions(-) diff --git a/target-sparc/translate.c

[Qemu-devel] [PATCH v4 06/24] target-sparc: Store %asi in TB flags

Knowing the value of %asi at translation time means that we can handle the common settings without a function call. The steady state appears to be %asi == ASI_P, so that sparcv9 code can use offset forms of lda/sta. The %asi register gets pushed and popped on entry to certain functions, but it

[Qemu-devel] [PATCH v4 07/24] target-sparc: Introduce get_asi

Replace gen_get_asi, and use it for both 32-bit and 64-bit. For v8, do supervisor and immediate checks here. Also, move save_state and TB ending into the respective subroutines, out of disas_sparc_insn. Reviewed-By: Artyom Tarasenko Signed-off-by: Richard Henderson

[Qemu-devel] [PATCH v4 03/24] target-sparc: Store mmu index in TB flags

Doing this instead of saving the raw PS_PRIV and TL. This means that all nucleus mode TBs (TL > 0) can be shared. This fixes a bug in that we didn't include HS_PRIV in the TB flags, and so could produce incorrect TB matches for hypervisor state. The LSU and DMMU states were unused by the

[Qemu-devel] [PATCH v4 10/24] target-sparc: Add UA2005 defines to asi.h

Reviewed-By: Artyom Tarasenko Signed-off-by: Richard Henderson --- target-sparc/asi.h | 22 ++ 1 file changed, 18 insertions(+), 4 deletions(-) diff --git a/target-sparc/asi.h b/target-sparc/asi.h index aace6f3..c9a1849 100644 ---

[Qemu-devel] [PATCH v4 00/24] target-sparc improvements

The primary focus of this patch set is to reduce the number of helpers that modify TCG globals, and thus increase the lifetime of those globals within each TB, and thus decrease the number of times that tcg must spill and fill them from backing store. As a byproduct, I also implement the bulk of

[Qemu-devel] [PATCH v4 08/24] target-sparc: Pass TCGMemOp to gen_ld/st_asi

Reviewed-By: Artyom Tarasenko Signed-off-by: Richard Henderson --- target-sparc/translate.c | 32 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/target-sparc/translate.c b/target-sparc/translate.c index

[Qemu-devel] [PATCH v4 02/24] target-sparc: Remove softint as a TCG global

The global is only ever read for one insn; we can just as well use a load from env instead and generate the same code. This also allows us to indicate the the associated helpers do not touch TCG globals. Reviewed-By: Artyom Tarasenko Signed-off-by: Richard Henderson

[Qemu-devel] [PATCH v4 01/24] target-sparc: Mark more flags for helpers

Quite a few helpers do not modify tcg globals but did not so indicate. Reviewed-By: Artyom Tarasenko Signed-off-by: Richard Henderson --- target-sparc/helper.h | 48 1 file changed, 24 insertions(+), 24

[Qemu-devel] [PATCH v4 04/24] target-sparc: Create gen_exception

This unifies quite a few duplicate code fragments. Reviewed-By: Artyom Tarasenko Signed-off-by: Richard Henderson --- target-sparc/translate.c | 75 +--- 1 file changed, 20 insertions(+), 55 deletions(-) diff

Re: [Qemu-devel] [PATCH v4 3/3] tests: in IDE and AHCI tests perform DMA write before flushing

On 06/27/2016 10:47 AM, Denis V. Lunev wrote: > From: Evgeny Yakovlev > > Due to changes in flush behaviour clean disks stopped generating > flush_to_disk events and IDE and AHCI tests that test flush commands > started to fail. > > This change adds additional DMA

Re: [Qemu-devel] [PATCH] misc/aspeed_scu: Fix build error caused by missing header

On Mon, 2016-06-27 at 17:53 -0400, Pranith Kumar wrote: > Tracing configurations error out currently as follows: > > /home/travis/build/pranith/qemu/hw/misc/aspeed_scu.c: In function > ‘aspeed_scu_read’: > /home/travis/build/pranith/qemu/hw/misc/aspeed_scu.c:130:9: error: implicit > declaration

Re: [Qemu-devel] [PATCH] virtio: Tell the user what went wrong when event_notifier_init failed

On 06/27/2016 04:12 PM, Thomas Huth wrote: > event_notifier_init() can fail in real life, for example when there > are not enough open file handles available (EMFILE) when using a lot > of devices. So instead of leaving the average user with a cryptic > error number only, print out a proper error

[Qemu-devel] [PATCH] virtio: Tell the user what went wrong when event_notifier_init failed

event_notifier_init() can fail in real life, for example when there are not enough open file handles available (EMFILE) when using a lot of devices. So instead of leaving the average user with a cryptic error number only, print out a proper error message with strerror() instead, so that the user

[Qemu-devel] [PATCH] i2c: Fix SMBus read transactions to avoid double events

From: Corey Minyard Change 2293c27faddf (i2c: implement broadcast write) added broadcast capability to the I2C bus, but it broke SMBus read transactions. An SMBus read transaction does two i2c_start_transaction() calls without an intervening i2c_end_transfer() call. This

Re: [Qemu-devel] [RFC 01/30] softmmu: add cmpxchg helpers

On 06/27/2016 02:48 PM, Peter Maydell wrote: On 27 June 2016 at 22:43, Richard Henderson wrote: All you need to do is byte-reverse the data. bswap(a + b) == bswap(a) + bswap(b). ? 0xFF + 0xFF == 0x1FE, bswap(0x1FE) == 0xFE01 bswap(0xFF) + bswap(0xFF) == 0xFF00 +

[Qemu-devel] [PATCH] misc/aspeed_scu: Fix build error caused by missing header

Tracing configurations error out currently as follows: /home/travis/build/pranith/qemu/hw/misc/aspeed_scu.c: In function ‘aspeed_scu_read’: /home/travis/build/pranith/qemu/hw/misc/aspeed_scu.c:130:9: error: implicit declaration of function ‘qemu_log_mask’ [-Werror=implicit-function-declaration]

[Qemu-devel] Executed Host Instructions

Hi All, I want to count number of host instructions (only for guest code) executed when qemu emulates an application. I wonder if helper functions are supported with tcg back end as well, which can be a possible solution for the mentioned problem ? If not, is there any other solution in someone's

Re: [Qemu-devel] [RFC 01/30] softmmu: add cmpxchg helpers

On 27 June 2016 at 22:43, Richard Henderson wrote: > All you need to do is byte-reverse the data. > > bswap(a + b) == bswap(a) + bswap(b). ? 0xFF + 0xFF == 0x1FE, bswap(0x1FE) == 0xFE01 bswap(0xFF) + bswap(0xFF) == 0xFF00 + 0xFF00 == 0x1FE00 (or 0xFE00

Re: [Qemu-devel] [RFC 01/30] softmmu: add cmpxchg helpers

On 06/27/2016 02:19 PM, Emilio G. Cota wrote: Host endian operation? I forgot to add byte ordering in the cover letter under "why this is an RFC" -- I admit I'm confused by all the macro trickery done for regular loads and stores. We store data in memory as per the guests' byte ordering,

[Qemu-devel] [Bug 1596579] Re: segfault upon reboot

By all means, feel free to provide me instructions on how to debug this myself, so I can help others in the future, although I understand that can be more time consuming. If anyone would rather prefer talking on IRC, just let me know the network and channel. Thanks -- You received this bug

Re: [Qemu-devel] [RFC 11/30] target-i386: add atomic helpers

On Mon, Jun 27, 2016 at 13:27:35 -0700, Richard Henderson wrote: > On 06/27/2016 12:01 PM, Emilio G. Cota wrote: > >This patch only adds the helpers. Functions to invoke the helpers > >from translated code are generated in subsequent patches. > > > >Signed-off-by: Emilio G. Cota >

[Qemu-devel] [Bug 1252270] Re: installing NT4 on MIPS Magnum/Jazz asserts

** Changed in: qemu Status: Fix Committed => Fix Released -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1252270 Title: installing NT4 on MIPS Magnum/Jazz asserts Status in QEMU: Fix

[Qemu-devel] [Bug 1263747] Re: Arm64 fails to run a binary which runs OK on real hardware

** Changed in: qemu Status: Fix Committed => Fix Released -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1263747 Title: Arm64 fails to run a binary which runs OK on real hardware Status in

[Qemu-devel] [Bug 1288385] Re: VFIO passthrough causes assertation failure

** Changed in: qemu Status: Fix Committed => Fix Released -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1288385 Title: VFIO passthrough causes assertation failure Status in QEMU: Fix

[Qemu-devel] [Bug 1328996] Re: [AArch64] - blr x30 is handled incorrectly

** Changed in: qemu Status: Fix Committed => Fix Released -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1328996 Title: [AArch64] - blr x30 is handled incorrectly Status in QEMU: Fix

Re: [Qemu-devel] [RFC v3 12/19] tcg: add kick timer for single-threaded vCPU emulation

On 03/06/16 23:40, Alex Bennée wrote: > diff --git a/cpus.c b/cpus.c > index 1694ce9..12e04c9 100644 > --- a/cpus.c > +++ b/cpus.c > @@ -1208,9 +1208,29 @@ static int tcg_cpu_exec(CPUState *cpu) > return ret; > } > > +/* Single-threaded TCG > + * > + * In the single-threaded case each vCPU

Re: [Qemu-devel] [RFC 01/30] softmmu: add cmpxchg helpers

On Mon, Jun 27, 2016 at 13:11:28 -0700, Richard Henderson wrote: > On 06/27/2016 12:01 PM, Emilio G. Cota wrote: > >Signed-off-by: Emilio G. Cota > >--- > > softmmu_template.h | 58 > > ++ > > tcg/tcg.h | 16

Re: [Qemu-devel] [RFC v3 11/19] tcg: add options for enabling MTTCG

On 03/06/16 23:40, Alex Bennée wrote: > diff --git a/cpus.c b/cpus.c > index 4cc2ce6..1694ce9 100644 > --- a/cpus.c > +++ b/cpus.c > @@ -25,6 +25,7 @@ > /* Needed early for CONFIG_BSD etc. */ > #include "qemu/osdep.h" > #include "qemu-common.h" > +#include "qemu/config-file.h" > #include

Re: [Qemu-devel] [RFC 02/30] tcg: add tcg_cmpxchg_lock

On 06/27/2016 01:41 PM, Emilio G. Cota wrote: Supporting 64-bit hosts on 32-bit guests has the problem of non-atomicity of 64-bit accesses, however. It does. It would be possible to do something with armv7 and i686 hosts, as 64-bit atomic ops exist, but it's probably not worth the effort.

[Qemu-devel] [Bug 1307656] Re: qemu segfault when starting virt-manager

** Changed in: qemu Status: Fix Committed => Fix Released -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1307656 Title: qemu segfault when starting virt-manager Status in QEMU: Fix

[Qemu-devel] [Bug 788701] Re: qemu-user fails to run rpcgen (i386, x86_64)

** Changed in: qemu Status: Fix Committed => Fix Released -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/788701 Title: qemu-user fails to run rpcgen (i386, x86_64) Status in QEMU: Fix

[Qemu-devel] [Bug 1091115] Re: windowsXP install in qemu-system-i386 1.3.0 ends with a BSOD 0x7E in acpi.sys

Changing status to "Fix Released" since this should have been included since a couple of releases now. ** Changed in: qemu Status: Fix Committed => Fix Released -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU.

[Qemu-devel] [Bug 1210212] Re: qemu core dumps with -serial mon:vc

** Changed in: qemu Status: Fix Committed => Fix Released -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1210212 Title: qemu core dumps with -serial mon:vc Status in QEMU: Fix Released

[Qemu-devel] [Bug 648128] Re: VirtFS: Cannot mount 9p during boot

If I've got the previous comments right, this was not a QEMU bug, but a bug in "mount" and the guest kernel ... so closing this QEMU ticket here now. ** Changed in: qemu Status: Fix Committed => Fix Released -- You received this bug notification because you are a member of qemu-

Re: [Qemu-devel] [RFC 02/30] tcg: add tcg_cmpxchg_lock

On Mon, Jun 27, 2016 at 13:07:42 -0700, Richard Henderson wrote: > On 06/27/2016 12:01 PM, Emilio G. Cota wrote: > >This set of locks will allow us to correctly emulate cmpxchg16 > >in a parallel TCG. The key observation is that no architecture > >supports 16-byte regular atomic load/stores; only

Re: [Qemu-devel] [PATCH RFC v2 0/5] Baby steps towards saner headers

Dear Paolo, Paolo Bonzini writes: >> After applying your series on top of f12103af and running "./configure" >> in a clean working directory, I get the following errors for "make >> check-source": >> >> $ make check-source >> egrep: config-host.h: No such file or directory

Re: [Qemu-devel] [PATCH] slirp: Add support for stateless DHCPv6

Hello, Thomas Huth, on Sun 26 Jun 2016 10:04:02 +0200, wrote: > Provide basic support for stateless DHCPv6 (see RFC 3736) so > that guests can also automatically boot via IPv6 with SLIRP > (for IPv6 network booting, see RFC 5970 for details). Cool :) I'm here commenting in my reading order, not

Re: [Qemu-devel] [RFC 11/30] target-i386: add atomic helpers

On 06/27/2016 12:01 PM, Emilio G. Cota wrote: This patch only adds the helpers. Functions to invoke the helpers from translated code are generated in subsequent patches. Signed-off-by: Emilio G. Cota --- target-i386/helper.h | 34 ++

[Qemu-devel] [Bug 1546680] Re: Incorrect display colors when running big endian guest on POWER8 little endian host

Which version of QEMU are you using? How did you start QEMU (i.e. which kind of graphics card did you specify)? And which version of CentOS are you using for the guest? -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU.

Re: [Qemu-devel] [RFC 01/30] softmmu: add cmpxchg helpers

On 06/27/2016 12:01 PM, Emilio G. Cota wrote: Signed-off-by: Emilio G. Cota --- softmmu_template.h | 58 ++ tcg/tcg.h | 16 +++ 2 files changed, 74 insertions(+) diff --git a/softmmu_template.h

Re: [Qemu-devel] [RFC 02/30] tcg: add tcg_cmpxchg_lock

On 06/27/2016 12:01 PM, Emilio G. Cota wrote: This set of locks will allow us to correctly emulate cmpxchg16 in a parallel TCG. The key observation is that no architecture supports 16-byte regular atomic load/stores; only "locked" accesses (e.g. via cmpxchg16b on x86) are allowed, and therefore

[Qemu-devel] [Bug 1596579] Re: segfault upon reboot

** Attachment added: "cmdline" https://bugs.launchpad.net/qemu/+bug/1596579/+attachment/4691252/+files/cmdline -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1596579 Title: segfault upon reboot

[Qemu-devel] [PULL 1/1] macio: Use blk_drain instead of blk_drain_all

From: Fam Zheng We only care about the associated backend, so blk_drain is more appropriate here. Signed-off-by: Fam Zheng Reviewed-by: Kevin Wolf Reviewed-by: John Snow Message-id: 20160612065603.21911-1-f...@redhat.com

Re: [Qemu-devel] [PATCH] slirp: Remove superfluous memset() calls from the TFTP code

Thomas Huth, on Mon 27 Jun 2016 12:41:36 +0200, wrote: > Commit fad7fb9ccd8013ea03 ("Add IPv6 support to the TFTP code") > refactored some common code for preparing the mbuf into a new > function called tftp_prep_mbuf_data(). One part of this common > code is to do a "memset(m->m_data, 0,

[Qemu-devel] [Bug 1596579] Re: segfault upon reboot

** Attachment added: "core backtrace" https://bugs.launchpad.net/qemu/+bug/1596579/+attachment/4691251/+files/core_backtrace -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1596579 Title:

[Qemu-devel] [Bug 636095] Re: tap downscript is not executed when exiting qemu through "quit" monitor command

** Changed in: qemu Status: Fix Committed => Fix Released -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/636095 Title: tap downscript is not executed when exiting qemu through "quit"

[Qemu-devel] [RFC 20/30] target-i386: remove helper_lock()

It's been superseded by the atomic helpers. The use of the atomic helpers provides a significant performance and scalability improvement. Below is the result of running the atomic_add-test microbenchmark with: $ x86_64-linux-user/qemu-x86_64 tests/atomic_add-bench -o 500 -r $r -n $n , where

[Qemu-devel] [RFC 19/30] tests: add atomic_add-bench

With this microbenchmark we can measure the overhead of emulating atomic instructions with a configurable degree of contention. The benchmark spawns $n threads, each performing $o atomic ops (additions) in a loop. Each atomic operation is performed on a different cache line (assuming lines are

[Qemu-devel] [RFC 29/30] linux-user: remove handling of aarch64's EXCP_STREX

The exception is not emitted anymore. Signed-off-by: Emilio G. Cota --- linux-user/main.c | 125 -- 1 file changed, 125 deletions(-) diff --git a/linux-user/main.c b/linux-user/main.c index c6c92a6..1c3db37 100644 ---

[Qemu-devel] [Bug 1357445] Re: qemu-img: 'amend -o compat=0.10' command failed with segfault on the fuzzed image

** Changed in: qemu Status: Fix Committed => Fix Released -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1357445 Title: qemu-img: 'amend -o compat=0.10' command failed with segfault on the

[Qemu-devel] [RFC 27/30] target-arm: emulate aarch64's LL/SC using cmpxchg helpers

Emulating LL/SC with cmpxchg is not correct, since it can suffer from the ABA problem. Portable parallel code, however, is written assuming only cmpxchg--and not LL/SC--is available. This means that in practice emulating LL/SC with cmpxchg is a viable alternative. The appended emulates LL/SC

[Qemu-devel] [RFC 16/30] target-i386: emulate LOCK'ed XADD using atomic helper

Signed-off-by: Emilio G. Cota --- target-i386/translate.c | 15 +++ 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index a5a633b..7df744e 100644 --- a/target-i386/translate.c +++

[Qemu-devel] [Bug 1477683] Re: FPU in qemu-system-i386 works incorrectly

If I've got that right, the fix had been included here: http://git.qemu.org/?p=qemu.git;a=commitdiff;h=178846bdd93994c1acaf ... so closing this ticket now. ** Changed in: qemu Status: Fix Committed => Fix Released -- You received this bug notification because you are a member of qemu-

[Qemu-devel] [RFC 23/30] target-arm: add atomic_xchg helper

Signed-off-by: Emilio G. Cota --- target-arm/helper.c | 10 ++ target-arm/helper.h | 3 +++ 2 files changed, 13 insertions(+) diff --git a/target-arm/helper.c b/target-arm/helper.c index b38bfbd..adab296 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@

[Qemu-devel] [RFC 15/30] target-i386: emulate LOCK'ed NEG using cmpxchg helper

Signed-off-by: Emilio G. Cota --- target-i386/translate.c | 34 ++ 1 file changed, 30 insertions(+), 4 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index fcccb1a..a5a633b 100644 --- a/target-i386/translate.c +++

[Qemu-devel] [PULL 0/1] Ide patches

The following changes since commit 14e60aaece20a1cfc059a69f6491b0899f9257a8: hw/net/e1000: Don't use *_to_cpup() (2016-06-27 16:39:56 +0100) are available in the git repository at: https://github.com/jnsnow/qemu.git tags/ide-pull-request for you to fetch changes up to

[Qemu-devel] [RFC 25/30] helper: add DEF_HELPER_6

Signed-off-by: Emilio G. Cota --- include/exec/helper-gen.h | 11 +++ include/exec/helper-head.h | 2 ++ include/exec/helper-proto.h | 5 + include/exec/helper-tcg.h | 7 +++ 4 files changed, 25 insertions(+) diff --git a/include/exec/helper-gen.h

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