[Qemu-devel] [Bug 1297218] Re: guest hangs after live migration due to tsc jump

I can reasonably assume that this solved my problem. I've live migrated 41 VM's 5 times between 2 hypervisors without the 100% cpu problem appearing. My production servers run 2.0.0+dfsg-2ubuntu1.22, and still observe the same problem. Attached is the patch that I created with quilt in

[Qemu-devel] [Bug 1594239] Re: After adding more scsi disks for Aarch64 virtual machine, start the VM and got Qemu Error

Hi Tom, Yeh it's just vmstate_register_with_alias_id printing vmsd->name at entry, and then after the char *id = printing that as well (that's what I labelled as the dev/id case). Then just before the assert I was printing the se->compat and se->instance_id values. I noticed this bug

Re: [Qemu-devel] [PULL 0/6] ipxe: update submodule from 4e03af8ec to 041863191

On Do, 2016-06-30 at 17:37 +0100, Peter Maydell wrote: > On 30 June 2016 at 17:21, Gerd Hoffmann wrote: > > Hi, > > > >> Hi. I'm afraid this fails 'make check': > >> TEST: tests/vmxnet3-test... (pid=19181) > >> qemu-system-i386: -device vmxnet3: failed to find romfile

Re: [Qemu-devel] [PATCH 1/2] hw/misc: fix Aspeed SCU hw-strap2 property

On 07/01/2016 10:02 AM, Peter Maydell wrote: > On 1 July 2016 at 07:11, Cédric Le Goater wrote: >> On 06/30/2016 08:24 PM, Peter Maydell wrote: >>> On 30 June 2016 at 16:50, Cédric Le Goater wrote: These strap registers are complex enough, let's not mix them.

Re: [Qemu-devel] [PATCH 3/4] acpi: provide _PXM method for CPU devices if QEMU is started numa enabled

On Thu, 30 Jun 2016 20:47:33 +0300 "Michael S. Tsirkin" wrote: Thanks for review, I'll fix up patch according to your comments and post v3 shortly > On Thu, Jun 30, 2016 at 02:23:06PM +0200, Igor Mammedov wrote: > > fixes long standing issue where Linux kernel would assing >

Re: [Qemu-devel] [PATCH v2] spec/qcow2: bitmaps: zero bitmap table offset

Am 30.06.2016 um 19:23 hat Denis V. Lunev geschrieben: > On 06/30/2016 07:40 PM, John Snow wrote: > > > >On 06/30/2016 05:12 AM, Denis V. Lunev wrote: > >>On 06/30/2016 10:34 AM, Vladimir Sementsov-Ogievskiy wrote: > >>>After loading bitmap from image and setting IN_USE flag in it's header, >

Re: [Qemu-devel] [PATCH 1/2] hw/misc: fix Aspeed SCU hw-strap2 property

On 1 July 2016 at 07:11, Cédric Le Goater wrote: > On 06/30/2016 08:24 PM, Peter Maydell wrote: >> On 30 June 2016 at 16:50, Cédric Le Goater wrote: >>> These strap registers are complex enough, let's not mix them. >>> >>> Signed-off-by: Cédric Le Goater

[Qemu-devel] [PATCH 4/4] ppc: fix VRMA support

commit 08109fd4360d ('ppc: Add proper real mode translation support') introduced VRMA support for which SLB entries need to be created. But it did not take into account the changes in ppc_slb_t and missed the setting of the segment page size attribute. However, gcc spotted it :

[Qemu-devel] [PATCH 3/4] ppc: simplify ppc_hash64_pteg_search()

The page shift parameter is never used. Let's remove it. Signed-off-by: Cédric Le Goater --- target-ppc/mmu-hash64.c | 10 -- 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c index fdaff9e874ba..7ef45ee53bf5

[Qemu-devel] [PATCH 0/4] ppc: fixes for large page and VRMA support

Here is a little serie with API cleanups and fixes for large page and VRMA. Previous patches which added the support did not take into account the segment page size attribute. Cédric Le Goater (4): ppc: simplify ppc_hash64_hpte_page_shift_noslb() ppc: fix large page support ppc: simplify

[Qemu-devel] [PATCH 2/4] ppc: fix large page support

A regression was introduced by commit 53df75a59bcf ('ppc: Fix 64K pages support in full emulation'). ppc_hash64_hpte_page_shift_noslb() should be used to compute the page size. Signed-off-by: Cédric Le Goater --- target-ppc/mmu-hash64.c | 24 +--- 1 file

[Qemu-devel] [PULL 17/23] ppc/xics: Replace "icp" with "xics" in most places

From: Benjamin Herrenschmidt The "ICP" is a different object than the "XICS". For historical reasons, we have a number of places where we name a variable "icp" while it contains a XICSState pointer. There *is* an ICPState structure too so this makes the code really

[Qemu-devel] [PATCH 1/4] ppc: simplify ppc_hash64_hpte_page_shift_noslb()

The segment page shift parameter is never used. Let's remove it. Signed-off-by: Cédric Le Goater --- hw/ppc/spapr_hcall.c| 4 ++-- target-ppc/mmu-hash64.c | 6 +- target-ppc/mmu-hash64.h | 3 +-- 3 files changed, 4 insertions(+), 9 deletions(-) diff --git

[Qemu-devel] [PULL 15/23] ppc/xics: Move SPAPR specific code to a separate file

From: Benjamin Herrenschmidt Leave the core ICP/ICS logic in xics.c and move the top level class wrapper, hypercall and RTAS handlers to xics_spapr.c Signed-off-by: Benjamin Herrenschmidt [add cpu.h in xics_spapr.c, move set_nr_irqs and

[Qemu-devel] [PULL 13/23] ppc: Fix 64K pages support in full emulation

From: Benjamin Herrenschmidt We were always advertising only 4K & 16M. Additionally the code wasn't properly matching the page size with the PTE content, which meant we could potentially hit an incorrect PTE if the guest used multiple sizes. Finally, honor the CPU

[Qemu-devel] [PULL 01/23] ppc: Add a bunch of hypervisor SPRs to Book3s

From: Benjamin Herrenschmidt We don't give them a KVM reg number yet as no current KVM version supports HV mode. Signed-off-by: Benjamin Herrenschmidt [clg: SPRs AMOR,DAWR,DARWX were already included in commit f401dd32cb8e9] Signed-off-by:

[Qemu-devel] [PULL 14/23] ppc/xics: Rename existing xics to xics_spapr

From: Benjamin Herrenschmidt The common class doesn't change, the KVM one is sPAPR specific. Rename variables and functions to xics_spapr. Retain the type name as "xics" to preserve migration for existing sPAPR guests. Signed-off-by: Benjamin Herrenschmidt

Re: [Qemu-devel] [PATCH 1/2] hw/misc: fix Aspeed SCU hw-strap2 property

On 07/01/2016 08:11 AM, Cédric Le Goater wrote: > On 06/30/2016 08:24 PM, Peter Maydell wrote: >> On 30 June 2016 at 16:50, Cédric Le Goater wrote: >>> These strap registers are complex enough, let's not mix them. >>> >>> Signed-off-by: Cédric Le Goater >> >> Was

[Qemu-devel] [PULL 06/23] ppc: Initial HDEC support

From: Benjamin Herrenschmidt The current behaviour isn't completely right, as for the DEC, we don't properly re-arm when wrapping around, but I will fix this in a separate patch. Signed-off-by: Benjamin Herrenschmidt [clg: fixed checkpatch.pl

[Qemu-devel] [PULL 18/23] target-ppc: gen_pause for instructions: yield, mdoio, mdoom, miso

From: Aaron Larson Call gen_pause for all "or rx,rx,rx" encodings other nop. This provides a reasonable implementation for yield, and a better approximation for mdoio, mdoom, and miso. The choice to pause for all encodings !=0 leverages the PowerISA admonition that the

[Qemu-devel] [PULL 16/23] ppc/xics: Implement H_IPOLL using an accessor

From: Benjamin Herrenschmidt None of the other presenter functions directly mucks with the internal state, so don't do it there either. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Nikunj A Dadhania

[Qemu-devel] [PULL 19/23] spapr: Restore support for 970MP and POWER8NVL CPU cores

From: Bharata B Rao Introduction of core based CPU hotplug for PowerPC sPAPR didn't add support for 970MP and POWER8NVL based core types. Add support for the same. While we are here, add support for explicit specification of POWER5+_v2.1 core type. Signed-off-by:

[Qemu-devel] [PULL 12/23] target-ppc: Eliminate redundant and incorrect function booke206_page_size_to_tlb

From: Aaron Larson Eliminate redundant and incorrect booke206_page_size_to_tlb function from ppce500_spin.c in preference to previously existing but newly exported definition from e500.c Defect analysis: The booke206_page_size_to_tlb function in e500.c was updated in commit

[Qemu-devel] [PULL 20/23] spapr: drop reference on child object during core realization

From: Greg Kurz When a core is being realized, we create a child object for each thread of the core. The child is first initialized with object_initialize() which sets its ref count to 1, and then added to the core with object_property_add_child() which bumps the ref count to 2.

[Qemu-devel] [PULL 03/23] ppc: Use a helper to filter writes to LPCR

From: Benjamin Herrenschmidt This handles filtering bits based on what is implemented by a given architecture version. We also use it to copy to LPCR some of the relevant 970 HID4 bits. Signed-off-by: Benjamin Herrenschmidt [clg: fixed

[Qemu-devel] [PULL 08/23] ppc: Print HSRR0/HSRR1 in "info registers"

From: Benjamin Herrenschmidt They are generally useful when debugging HV mode stuff Signed-off-by: Benjamin Herrenschmidt [clg: fixed checkpatch.pl errors ] Signed-off-by: Cédric Le Goater Signed-off-by: David Gibson

[Qemu-devel] [PULL 04/23] ppc: Fix conditions for delivering external interrupts to a guest

From: Benjamin Herrenschmidt External interrupts can bypass the MSR_EE test if they occur in guest mode and LPES0 is clear. In that case they are directed to the hypervisor Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Cédric Le Goater

[Qemu-devel] [PULL 23/23] qmp: fix spapr example of query-hotpluggable-cpus

From: Igor Mammedov 27393c33 qapi: keep names in 'CpuInstanceProperties' in sync with struct CPUCore added -id suffix to property names but forgot to fix example in qmp-commands.hx Fix example to have 'core-id' instead of 'core' to match current code Signed-off-by: Igor

[Qemu-devel] [PULL 00/23] ppc-for-2.7 queue 20160701

The following changes since commit 8a0b4de048e20215415b24c7b42514c27b9d6ef3: pcspk: fix KVM (2016-06-30 19:00:02 +0100) are available in the git repository at: git://github.com/dgibson/qemu.git tags/ppc-for-2.7-20160701 for you to fetch changes up

[Qemu-devel] [PULL 05/23] ppc: Enforce setting MSR:EE, IR and DR when MSR:PR is set

From: Benjamin Herrenschmidt The architecture specifies that any instruction that sets MSR:PR will also set MSR:EE, IR and DR. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Cédric Le Goater Signed-off-by: David Gibson

[Qemu-devel] [PULL 22/23] spapr: drop duplicate variable in spapr_core_release()

From: Greg Kurz Signed-off-by: Greg Kurz Reviewed-by: Bharata B Rao Signed-off-by: David Gibson --- hw/ppc/spapr_cpu_core.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git

[Qemu-devel] [PULL 09/23] hw/ppc/spapr: Add some missing hcall function set strings

From: Thomas Huth Add "hcall-sprg0" (for H_SET_SPRG0), "hcall-copy" (for H_PAGE_INIT) and "hcall-debug" (for H_LOGICAL_CI_LOAD/STORE) to the property "ibm,hypertas-functions" to indicate that we support these hypercalls. Signed-off-by: Thomas Huth

[Qemu-devel] [PULL 21/23] spapr: do proper error propagation in spapr_cpu_core_realize_child()

From: Greg Kurz This patch changes spapr_cpu_core_realize_child() to have a local error pointer and use error_propagate() as it is supposed to be done. Signed-off-by: Greg Kurz Reviewed-by: Bharata B Rao Signed-off-by: David Gibson

[Qemu-devel] [PULL 02/23] ppc: Update LPCR definitions

From: Benjamin Herrenschmidt Includes all the bits up to ISA 2.07 Signed-off-by: Benjamin Herrenschmidt [clg: fixed checkpatch.pl errors ] Signed-off-by: Cédric Le Goater Signed-off-by: David Gibson

[Qemu-devel] [PULL 11/23] spapr: Restore support for older PowerPC CPU cores

From: Bharata B Rao Introduction of core based CPU hotplug for PowerPC sPAPR didn't add support for 970 and POWER5+ based core types. Add support for the same. Signed-off-by: Bharata B Rao Signed-off-by: David Gibson

[Qemu-devel] [PULL 07/23] ppc: LPCR is a HV resource

From: Benjamin Herrenschmidt Don't allow access in guest mode Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Cédric Le Goater Signed-off-by: David Gibson --- target-ppc/translate_init.c | 9

[Qemu-devel] [PULL 10/23] spapr: fix write-past-end-of-array error in cpu core device init code

From: Greg Kurz This fixes a potential QEMU crash introduced by commit 3b542549661. Signed-off-by: Greg Kurz Signed-off-by: David Gibson --- hw/ppc/spapr_cpu_core.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff

Re: [Qemu-devel] [PATCH 1/2] hw/misc: fix Aspeed SCU hw-strap2 property

On 06/30/2016 08:24 PM, Peter Maydell wrote: > On 30 June 2016 at 16:50, Cédric Le Goater wrote: >> These strap registers are complex enough, let's not mix them. >> >> Signed-off-by: Cédric Le Goater > > Was there a cover letter for this patchset? I can't find > it

Re: [Qemu-devel] [PATCH 2/2] ppc: Fix 64K pages support in full emulation

On 07/01/2016 12:13 AM, Benjamin Herrenschmidt wrote: > On Thu, 2016-06-30 at 18:01 +0200, Cédric Le Goater wrote: >> +static uint32_t ppc_hash64_pte_size_decode(PowerPCCPU *cpu, uint64_t >> pte0, >> + uint64_t pte1, uint32_t >> slb_pshift) >> { >> -

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