Re: [Qemu-devel] [RFC PATCH v2 4/5] xics: Use stable_cpu_id instead of cpu_index in XICS code

2016-07-07 Thread David Gibson
On Thu, Jul 07, 2016 at 08:20:24PM +0530, Bharata B Rao wrote: > xics maintains an array of ICPState structures which is indexed > by cpu_index. Optionally change this to index the ICPState array by > stable_cpu_id. When the use of stable_cpu_id is enabled from pseries-2.7 > onwards, this allows

Re: [Qemu-devel] [RFC PATCH v2 0/5] sPAPR: Fix migration when CPUs are removed in random order

2016-07-07 Thread David Gibson
On Thu, Jul 07, 2016 at 06:04:10PM +0200, Greg Kurz wrote: > On Thu, 7 Jul 2016 20:20:20 +0530 > Bharata B Rao wrote: > > > device_add/del based CPU hotplug and unplug support is upstream for > > sPAPR PowerPC and is under development for x86. Both of these will > >

Re: [Qemu-devel] [RFC PATCH v2 3/5] spapr: Set stable_cpu_id for threads of CPU cores

2016-07-07 Thread David Gibson
On Thu, Jul 07, 2016 at 08:20:23PM +0530, Bharata B Rao wrote: > Conditonally set stable_cpu_id for CPU threads that are created as part > of spapr CPU cores. The use of stable_cpu_id is enabled for pseries-2.7 > onwards. > > Signed-off-by: Bharata B Rao > --- >

Re: [Qemu-devel] [RFC PATCH v2 2/5] cpu: Introduce CPUState::stable_cpu_id

2016-07-07 Thread David Gibson
On Thu, Jul 07, 2016 at 08:20:22PM +0530, Bharata B Rao wrote: > Add CPUState::stable_cpu_id and use that as instance_id in > vmstate_register() call. > > Introduce has-stable_cpu_id property that allows target machines to > optionally switch to using stable_cpu_id instead of cpu_index. > This

Re: [Qemu-devel] [RFC PATCH v2 3/5] spapr: Set stable_cpu_id for threads of CPU cores

2016-07-07 Thread David Gibson
On Thu, Jul 07, 2016 at 06:11:31PM +0200, Greg Kurz wrote: > On Thu, 7 Jul 2016 20:20:23 +0530 > Bharata B Rao wrote: > > > Conditonally set stable_cpu_id for CPU threads that are created as part > > of spapr CPU cores. The use of stable_cpu_id is enabled for

Re: [Qemu-devel] [RFC PATCH v2 2/5] cpu: Introduce CPUState::stable_cpu_id

2016-07-07 Thread David Gibson
On Thu, Jul 07, 2016 at 07:52:32PM +0200, Greg Kurz wrote: > On Thu, 7 Jul 2016 20:20:22 +0530 > Bharata B Rao wrote: > > > Add CPUState::stable_cpu_id and use that as instance_id in > > vmstate_register() call. > > > > Introduce has-stable_cpu_id property that

Re: [Qemu-devel] [PATCH v2 10/27] tcg: Add atomic128 helpers

2016-07-07 Thread Richard Henderson
On 07/07/2016 08:00 PM, Emilio G. Cota wrote: On Fri, Jul 01, 2016 at 10:04:36 -0700, Richard Henderson wrote: Force the use of cmpxchg16b on x86_64. Wikipedia suggests that only very old AMD64 (circa 2004) did not have this instruction. Further, it's required by Windows 8 so no new cpus will

Re: [Qemu-devel] [PATCH v3 1/4] ppc/xics: Make the ICSState a list

2016-07-07 Thread David Gibson
On Fri, Jul 08, 2016 at 10:20:32AM +0530, Nikunj A Dadhania wrote: > David Gibson writes: > > > [ Unknown signature status ] > > On Thu, Jul 07, 2016 at 11:24:15PM +0530, Nikunj A Dadhania wrote: > >> From: Benjamin Herrenschmidt > >> > >>

[Qemu-devel] [PATCH 1/2] linux-user: Fix i386 safe-syscall.S

2016-07-07 Thread Richard Henderson
Clang insists that "cmp" is ambiguous with a memory destination, requiring an explicit size suffix. There was a true error in the use of .cfi_def_cfa_offset in the epilogue, but changing to use the proper .cfi_adjust_cfa_offset runs afoul of a clang bug wrt .cfi_restore_state. Better to fold the

[Qemu-devel] [PATCH 2/2] build: Use $(AS) for optionrom explicitly

2016-07-07 Thread Richard Henderson
For clang before 3.5, -fno-integrated-as does not exist, so the workaround in 5f6f0e27fb24 fails to build. Use clang's default assembler for linux-user/safe-syscall.S, and explicitly change to use the system assembler for the option roms. Signed-off-by: Richard Henderson ---

[Qemu-devel] [PATCH 0/2] build fix for clang 3.4

2016-07-07 Thread Richard Henderson
Alex pointed out that my last attempt to get things all working falls afoul of old clang, in use by our Travis CI. This is tested with clang 3.7, but with examination of the build logs to see that the system assembler is used for the optionroms. r~ Richard Henderson (2): linux-user: Fix

Re: [Qemu-devel] [PATCH v3 4/4] ppc/xics: Split ICS into ics-base and ics class

2016-07-07 Thread David Gibson
On Thu, Jul 07, 2016 at 11:24:18PM +0530, Nikunj A Dadhania wrote: > From: Benjamin Herrenschmidt > > The existing implementation remains same and ics-base is introduced. The > type name "ics" is retained, and all the related functions renamed as > ics_simple_* > >

Re: [Qemu-devel] [PATCH v3 2/4] ppc/xics: An ICS with offset 0 is assumed to be uninitialized

2016-07-07 Thread David Gibson
On Thu, Jul 07, 2016 at 11:24:16PM +0530, Nikunj A Dadhania wrote: > From: Benjamin Herrenschmidt > > This will make life easier for dealing with dynamically configured > ICSes such as PHB3 > > Signed-off-by: Benjamin Herrenschmidt >

Re: [Qemu-devel] [PATCH v3 1/4] ppc/xics: Make the ICSState a list

2016-07-07 Thread Nikunj A Dadhania
David Gibson writes: > [ Unknown signature status ] > On Thu, Jul 07, 2016 at 11:24:15PM +0530, Nikunj A Dadhania wrote: >> From: Benjamin Herrenschmidt >> >> Instead of an array of fixed sized blocks, use a list, as we will need >> to

Re: [Qemu-devel] [RFC PATCH V5 3/4] colo-compare: introduce packet comparison thread

2016-07-07 Thread Jason Wang
On 2016年06月23日 19:34, Zhang Chen wrote: if packets are same, we send primary packet and drop secondary packet, otherwise notify COLO do checkpoint. More verbose please, e.g how to handle each case of exception (or maybe comment in the code). Signed-off-by: Zhang Chen

Re: [Qemu-devel] [PATCH v3 1/4] ppc/xics: Make the ICSState a list

2016-07-07 Thread David Gibson
On Thu, Jul 07, 2016 at 11:24:15PM +0530, Nikunj A Dadhania wrote: > From: Benjamin Herrenschmidt > > Instead of an array of fixed sized blocks, use a list, as we will need > to have sources with variable number of interrupts. SPAPR only uses > a single entry. Native

Re: [Qemu-devel] [RFC PATCH V5 2/4] colo-compare: track connection and enqueue packet

2016-07-07 Thread Jason Wang
On 2016年06月23日 19:34, Zhang Chen wrote: In this patch we use kernel jhash table to track connection, and then enqueue net packet like this: + CompareState ++ | | +---+ +---+ +---+ |conn list +--->conn +->conn

Re: [Qemu-devel] [PATCH 8/9] gdbstub: Convert target_memory_rw_debug to use MMUAccessType

2016-07-07 Thread David Gibson
On Thu, Jul 07, 2016 at 04:33:42PM -0700, Andrey Smirnov wrote: > Convert target_memory_rw_debug to use MMUAccessType as to follow similar > conversion of cpu_memory_rw_debug. Apart from previously mentioned concerns with the confusingly named MMU_* tokens, Reviewed-by: David Gibson

Re: [Qemu-devel] [PATCH 7/9] Convert address_space_rw to use MMUAccessType

2016-07-07 Thread David Gibson
On Thu, Jul 07, 2016 at 04:33:41PM -0700, Andrey Smirnov wrote: > Convert address_space_rw() to use MMUAccessType following the conversion > of cpu_memory_rw_debug(). Same concerns as the previous patch. These paths don't actually have anything to do with the MMU, which makes the constants oddly

Re: [Qemu-devel] [PATCH 5/9] Change signature of cpu_memory_rw_debug() to avoid casting

2016-07-07 Thread David Gibson
On Thu, Jul 07, 2016 at 04:33:39PM -0700, Andrey Smirnov wrote: > Change signature of cpu_memory_rw_debug() to expectet void * as a buffer > instead of uint8_t * to avoid forcing the caller of the function to do a > type cast. > > Signed-off-by: Andrey Smirnov Seems

Re: [Qemu-devel] [RFC PATCH V5 1/4] colo-compare: introduce colo compare initialization

2016-07-07 Thread Jason Wang
On 2016年06月23日 19:34, Zhang Chen wrote: Packets coming from the primary char indev will be sent to outdev Packets coming from the secondary char dev will be dropped usage: primary: -netdev tap,id=hn0,vhost=off,script=/etc/qemu-ifup,downscript=/etc/qemu-ifdown -device

Re: [Qemu-devel] [PATCH 6/9] Convert cpu_memory_rw_debug to use MMUAccessType

2016-07-07 Thread David Gibson
On Thu, Jul 07, 2016 at 04:33:40PM -0700, Andrey Smirnov wrote: > Convert cpu_memory_rw_debug() to use MMUAccessType as a way of > specifying memory reads/writes. This makes caller code be more obvious > in what it does (previously one had to interpret 0 or 1 and remember the > semantics of the

Re: [Qemu-devel] [PATCH 1/9] Avoid needless calls to address_space_rw()

2016-07-07 Thread David Gibson
On Thu, Jul 07, 2016 at 04:33:35PM -0700, Andrey Smirnov wrote: > Avoid calling address_space_rw() when direction of the transfer is > constant and known at compile time and replace them with explicit calls > to address_space_read()/address_space_write(). > > Signed-off-by: Andrey Smirnov

[Qemu-devel] [PATCH] vnc: fix incorrect checking condition when updating client

2016-07-07 Thread Gonglei
vs->disconnecting is set to TRUE and vs->ioc is closed, but vs->ioc isn't set to NULL, so that the vnc_disconnect_finish() isn't invoked when you update client in vnc_update_client() after vnc_disconnect_start invoked. Let's using change the checking condition to avoid resource leak.

Re: [Qemu-devel] [PATCH 2/9] Change signature of address_space_read() to avoid casting

2016-07-07 Thread David Gibson
On Thu, Jul 07, 2016 at 04:33:36PM -0700, Andrey Smirnov wrote: > Change signature of address_space_read() to expectet void * as a buffer > instead of uint8_t * to avoid forcing the caller of the function to do a > type cast. > > Signed-off-by: Andrey Smirnov Seems

Re: [Qemu-devel] [PATCH 4/9] address_space_write_continue: Distill common code

2016-07-07 Thread David Gibson
On Thu, Jul 07, 2016 at 04:33:38PM -0700, Andrey Smirnov wrote: > Move call to memory_region_dispatch_write() outside of swtich statement > since the only thing that is different about all of those call is > "length" argument and that matches value in "l". Also collapse switch > statement to

Re: [Qemu-devel] [PATCH 3/9] Change signature of address_space_write() to avoid casting

2016-07-07 Thread David Gibson
On Thu, Jul 07, 2016 at 04:33:37PM -0700, Andrey Smirnov wrote: > Change signature of address_space_write() to expectet void * as a buffer > instead of uint8_t * to avoid forcing the caller of the function to do a > type cast. > > Signed-off-by: Andrey Smirnov

Re: [Qemu-devel] [PATCH v2 24/27] target-arm: emulate aarch64's LL/SC using cmpxchg helpers

2016-07-07 Thread Emilio G. Cota
On Fri, Jul 01, 2016 at 10:04:50 -0700, Richard Henderson wrote: (snip) > [rth: Rearrange 128-bit cmpxchg helper. Enforce alignment on LL.] > > Signed-off-by: Emilio G. Cota > Message-Id: <1467054136-10430-28-git-send-email-c...@braap.org> > Signed-off-by: Richard Henderson

Re: [Qemu-devel] [PATCH] fixup! cpu: report hyperv feature words through qom

2016-07-07 Thread Denis V. Lunev
On 07/07/2016 07:49 PM, Eduardo Habkost wrote: On Thu, Jul 07, 2016 at 01:44:48PM -0300, Eduardo Habkost wrote: Hi, Sorry for taking so long to review it. The patch in general looks good, except for: On Fri, Jun 24, 2016 at 01:49:36PM +0300, Denis V. Lunev wrote: [...] +if

Re: [Qemu-devel] [PATCH v2 11/27] target-i386: emulate LOCK'ed cmpxchg using cmpxchg helpers

2016-07-07 Thread Emilio G. Cota
On Thu, Jul 07, 2016 at 23:08:17 -0400, Emilio G. Cota wrote: > On Fri, Jul 01, 2016 at 10:04:37 -0700, Richard Henderson wrote: > > From: "Emilio G. Cota" > > > > The diff here is uglier than necessary. All this does is to turn > > > > FOO > > > > into: > > > > if (s->prefix

Re: [Qemu-devel] [PATCH v2 11/27] target-i386: emulate LOCK'ed cmpxchg using cmpxchg helpers

2016-07-07 Thread Emilio G. Cota
On Fri, Jul 01, 2016 at 10:04:37 -0700, Richard Henderson wrote: > From: "Emilio G. Cota" > > The diff here is uglier than necessary. All this does is to turn > > FOO > > into: > > if (s->prefix & PREFIX_LOCK) { > BAR > } else { > FOO > } > > where FOO is the original

Re: [Qemu-devel] [PATCH v2 10/27] tcg: Add atomic128 helpers

2016-07-07 Thread Emilio G. Cota
On Fri, Jul 01, 2016 at 10:04:36 -0700, Richard Henderson wrote: > Force the use of cmpxchg16b on x86_64. > > Wikipedia suggests that only very old AMD64 (circa 2004) did not have > this instruction. Further, it's required by Windows 8 so no new cpus > will ever omit it. > > If we truely care

Re: [Qemu-devel] [Qemu-block] [PATCH v6 03/22] blockdev: Add and parse "lock-mode" option for image locking

2016-07-07 Thread Fam Zheng
On Tue, 07/05 15:37, Kevin Wolf wrote: > Am 17.06.2016 um 11:23 hat Kevin Wolf geschrieben: > > Am 03.06.2016 um 10:48 hat Fam Zheng geschrieben: > > > Respect the locking mode from CLI or QMP, and set the open flags > > > accordingly. > > > > > > Signed-off-by: Fam Zheng > > >

Re: [Qemu-devel] [PATCH v2 00/27] cmpxchg-based emulation of atomics

2016-07-07 Thread Emilio G. Cota
On Fri, Jul 01, 2016 at 10:04:26 -0700, Richard Henderson wrote: > I spent a couple evenings this week tweaking Emilio's patch set. > > The first major change is to "qemu/int128.h", so that we can use > that type in the context of a 16-byte cmpxchg. I have yet to teach > TCG code generation

Re: [Qemu-devel] [PATCH v5 4/4] target-i386: abort migration if LMCE config mismatch

2016-07-07 Thread Haozhong Zhang
On 07/07/16 14:10, Eduardo Habkost wrote: > On Wed, Jun 22, 2016 at 02:56:24PM +0800, Haozhong Zhang wrote: > > ... to avoid guest errors due to LMCE configurations changes when > > migrating from LMCE-enabled QEMU to LMCE-disabled QEMU. > > > > Signed-off-by: Haozhong Zhang

Re: [Qemu-devel] [PULL v2 1/4] build: Use $(CCAS) for compiling .S files

2016-07-07 Thread Richard Henderson
On 07/07/2016 09:16 AM, Alex Bennée wrote: +if echo | $ccas -dM -E - | grep __clang__ > /dev/null 2>&1 ; then + ccas="$ccas -fno-integrated-as" +fi Hi Richard, This looks like it breaks the Travis clang: https://travis-ci.org/qemu/qemu/builds/142825178 We get the error: AS

Re: [Qemu-devel] [RFC PATCH 2/2] numa: Add node_id data in query-hotpluggable-cpus

2016-07-07 Thread David Gibson
On Thu, 7 Jul 2016 17:17:14 +0200 Peter Krempa wrote: > Add a helper that looks up the NUMA node for a given CPU and use it to > fill the node_id in the PPC and X86 impls of query-hotpluggable-cpus. IIUC how the query thing works this means that the node id issued by

Re: [Qemu-devel] [RFC PATCH 1/2] qapi: Add vcpu id to query-hotpluggable-cpus output

2016-07-07 Thread David Gibson
On Thu, 7 Jul 2016 17:17:13 +0200 Peter Krempa wrote: > Add 'vcpu index' to the output of query hotpluggable cpus. This output > is identical to the linear cpu index taken by the 'cpus' attribute > passed to -numa. The problem is, the vcpu index of what? Each entry in the

Re: [Qemu-devel] [RFC PATCH V2] qemu-char: Fix context for g_source_attach()

2016-07-07 Thread Zhang Chen
On 07/08/2016 09:48 AM, Fam Zheng wrote: On Wed, 06/22 18:49, Zhang Chen wrote: We want to poll and handle chardev in another thread other than main loop. But qemu_chr_add_handlers() can only work for global default context other than thread default context. So we use g_source_attach(xx,

Re: [Qemu-devel] [PATCH v3 5/7] ppc: each machine type to provide vcpu_dt_id

2016-07-07 Thread David Gibson
On Thu, Jul 07, 2016 at 10:55:02AM +0200, Greg Kurz wrote: > On Thu, 7 Jul 2016 12:01:51 +1000 > David Gibson wrote: > > > On Wed, Jul 06, 2016 at 02:14:36PM +0200, Greg Kurz wrote: > > > This patch switches machine types to provide device-tree cpu ids. > > > > > >

Re: [Qemu-devel] [RFC PATCH V2] qemu-char: Fix context for g_source_attach()

2016-07-07 Thread Fam Zheng
On Wed, 06/22 18:49, Zhang Chen wrote: > We want to poll and handle chardev in another thread > other than main loop. But qemu_chr_add_handlers() can only > work for global default context other than thread default context. > So we use g_source_attach(xx, g_main_context_get_thread_default()) >

Re: [Qemu-devel] [PATCH v8 11/12] vfio: register aer resume notification handler for aer resume

2016-07-07 Thread Zhou Jie
Hi Alex, The following code will be modified. 1. vfio_pci_ioctl add a flag in vfio_device_info for workable_state support return workable_state in "struct vfio_pci_device" when user get info Seems like two flags are required, one to indicate the presence of this feature and another to

Re: [Qemu-devel] [RFC PATCH V2] qemu-char: Fix context for g_source_attach()

2016-07-07 Thread Zhang Chen
On 06/29/2016 02:46 PM, Zhang Chen wrote: On 06/22/2016 06:49 PM, Zhang Chen wrote: Hi~ Paolo~ Just a ping...no news for a week~ Ping...again... CC Fam This patch about main loop. Thanks Zhang Chen We want to poll and handle chardev in another thread other than main loop. But

Re: [Qemu-devel] [PATCH] linux-user: fix TARGET_NR_select

2016-07-07 Thread Wirth, Allan
Laurent, Seems to work well for my specific case – select no longer returns EFAULT on x86_64 linux user mode, and the arguments are passed correctly. Thank you! Cheers, Allan On 7/7/16, 7:17 PM, "Laurent Vivier" wrote: >TARGET_NR_select can have three different

[Qemu-devel] [PATCH] linux-user: fix TARGET_NR_select

2016-07-07 Thread Laurent Vivier
TARGET_NR_select can have three different implementations: 1- to always return -ENOSYS microblaze, ppc, ppc64 -> TARGET_WANT_NI_OLD_SELECT 2- to take parameters from a structure pointed by arg1 (kernel sys_old_select) i386, arm, m68k -> TARGET_WANT_OLD_SYS_SELECT

Re: [Qemu-devel] [PATCH v5 4/4] block: ignore flush requests when storage is clean

2016-07-07 Thread Eric Blake
On 07/04/2016 08:38 AM, Denis V. Lunev wrote: > From: Evgeny Yakovlev > > Some guests (win2008 server for example) do a lot of unnecessary > flushing when underlying media has not changed. This adds additional > overhead on host when calling fsync/fdatasync. > > This

Re: [Qemu-devel] [PATCH v3 02/11] block: Accept node-name for block-commit

2016-07-07 Thread Eric Blake
On 07/07/2016 06:11 AM, Kevin Wolf wrote: > In order to remove the necessity to use BlockBackend names in the > external API, we want to allow node-names everywhere. This converts > block-commit to accept a node-name without lifting the restriction that > we're operating at a root node. > > As

Re: [Qemu-devel] [PATCH v3 01/11] block: Accept node-name for block-stream

2016-07-07 Thread Eric Blake
On 07/07/2016 06:11 AM, Kevin Wolf wrote: > In order to remove the necessity to use BlockBackend names in the > external API, we want to allow node-names everywhere. This converts > block-stream to accept a node-name without lifting the restriction that > we're operating at a root node. > > In

Re: [Qemu-devel] [PATCH v5 0/4] block: ignore flush requests when storage is clean

2016-07-07 Thread John Snow
On 07/04/2016 10:53 AM, Paolo Bonzini wrote: > On 04/07/2016 16:38, Denis V. Lunev wrote: >> Changes from v4: >> - Moved to write generation scheme instead of dirty flag >> - Added retry setup to IDE PIO and FLUSH requests >> >> Changes from v3: >> - Fixed a typo in commit message >> - Rebased

[Qemu-devel] [Bug 1580459] Re: Windows (10?) guest freezes entire host on shutdown if using PCI passthrough

2016-07-07 Thread Jimi
Oh, that is interesting. Using lscpi -v on my computer reveals that Linux tends to default to enabling MSI on my PCIe devices that support it (since the common opinion is that it's better for PCIe), including all my graphics cards, so the fact that vfio-pci and Windows 10 both default to disabling

[Qemu-devel] [Bug 1580459] Re: Windows (10?) guest freezes entire host on shutdown if using PCI passthrough

2016-07-07 Thread Jimi
(Forgot to clarify: yes, vfio-pci devices disable MSI by default for me just like for Clif Houck, but all other PCIe devices have it enabled.) -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1580459

Re: [Qemu-devel] [PATCH 3/3] tcg: Avoid bouncing tb_lock between tb_gen_code() and tb_add_jump()

2016-07-07 Thread Alex Bennée
Sergey Fedorov writes: > On 07/07/16 22:46, Sergey Fedorov wrote: >> On 07/07/16 22:36, Alex Bennée wrote: >>> Sergey Fedorov writes: >>> From: Sergey Fedorov Signed-off-by: Sergey Fedorov

Re: [Qemu-devel] [RFC PATCH 1/1] OpenBIOS: Switch over to official OpenBIOS git repo

2016-07-07 Thread Jeff Cody
On Thu, Jul 07, 2016 at 04:53:44PM -0400, Jeff Cody wrote: > On Thu, Jul 07, 2016 at 06:22:37PM +0100, Mark Cave-Ayland wrote: > > On 07/07/16 04:12, Jeff Cody wrote: > > > > > Alright, here is what I think will work to switch over relatively > > > painlessly, and move master over to the github

[Qemu-devel] [PATCH 1/1] OpenBIOS: Switch over to official OpenBIOS git repo

2016-07-07 Thread Jeff Cody
This update should preserve git history, and switches over to the official openbios git repo, rather than pulling from the svn mirror. All prior history from the svn repository should still be preserved (i.e., commit hashes are the same for historical commits). The origin/master tag now follows

Re: [Qemu-devel] [Qemu-block] [PATCH v2 0/2] block: Add qemu_dup in osdep.c and use it

2016-07-07 Thread John Snow
On 06/22/2016 08:53 AM, Fam Zheng wrote: > v2: Fix patch 1 #else branch, and "r" => "ret". [Kevin] > Add Kevin's r-b line in patch 2. > > This is an independent tiny change extracted from the image locking series, > which can be processed separately. > > Improved according to Kevin's

Re: [Qemu-devel] [Bug 1580459] Re: Windows (10?) guest freezes entire host on shutdown if using PCI passthrough

2016-07-07 Thread Alex Williamson
On Thu, 07 Jul 2016 20:34:15 - Clif Houck wrote: > I was also experiencing the host hard locking when shutting down a > Windows 10 guest with a Nvidia GPU passed-through, but the issue appears > to be completely solved after switching the card to MSI mode in the > Windows

Re: [Qemu-devel] [RFC PATCH 1/1] OpenBIOS: Switch over to official OpenBIOS git repo

2016-07-07 Thread Jeff Cody
On Thu, Jul 07, 2016 at 06:22:37PM +0100, Mark Cave-Ayland wrote: > On 07/07/16 04:12, Jeff Cody wrote: > > > Alright, here is what I think will work to switch over relatively > > painlessly, and move master over to the github hashes for the submodule. > > > > I haven't done it yet on the

[Qemu-devel] [Bug 1580459] Re: Windows (10?) guest freezes entire host on shutdown if using PCI passthrough

2016-07-07 Thread Clif Houck
I was also experiencing the host hard locking when shutting down a Windows 10 guest with a Nvidia GPU passed-through, but the issue appears to be completely solved after switching the card to MSI mode in the Windows guest. However, I would be interested in understanding *why* using the card in

Re: [Qemu-devel] [PATCH 3/3] tcg: Avoid bouncing tb_lock between tb_gen_code() and tb_add_jump()

2016-07-07 Thread Sergey Fedorov
On 07/07/16 22:46, Sergey Fedorov wrote: > On 07/07/16 22:36, Alex Bennée wrote: >> Sergey Fedorov writes: >> >>> From: Sergey Fedorov >>> >>> Signed-off-by: Sergey Fedorov >>> Signed-off-by: Sergey Fedorov

Re: [Qemu-devel] [Qemu-block] [PATCH v3 04/32] blockdev: Move bochs probe into separate file

2016-07-07 Thread Colin Lord
On 07/06/2016 04:24 AM, Kevin Wolf wrote: > Am 05.07.2016 um 22:50 hat John Snow geschrieben: >> >> >> On 07/05/2016 11:49 AM, Daniel P. Berrange wrote: >>> On Tue, Jul 05, 2016 at 11:24:04AM -0400, Colin Lord wrote: This puts the bochs probe function into its own separate file as part of

Re: [Qemu-devel] [Qemu-block] [PATCH v3 00/32] Dynamic module loading for block drivers

2016-07-07 Thread John Snow
On 07/05/2016 11:24 AM, Colin Lord wrote: > This is the next version of this patch series. The first three patches > in the series are mostly the same as they were last time, but with the > issues mentioned in the reviews fixed. Most notably this means much less > copy-paste happening in

Re: [Qemu-devel] [RFC v2 11/11] tcg: Make tb_flush() thread safe

2016-07-07 Thread Sergey Fedorov
On 07/07/16 00:15, Sergey Fedorov wrote: > From: Sergey Fedorov > > Use async_safe_run_on_cpu() to make tb_flush() thread safe. I've just realized that this allows to remove CPUState::tb_flushed as well. Regards, Sergey

[Qemu-devel] [PULL 15/16] target-i386: Publish advised value of MSR_IA32_FEATURE_CONTROL via fw_cfg

2016-07-07 Thread Eduardo Habkost
From: Haozhong Zhang It's a prerequisite that certain bits of MSR_IA32_FEATURE_CONTROL should be set before some features (e.g. VMX and LMCE) can be used, which is usually done by the firmware. This patch adds a fw_cfg file "etc/msr_feature_control" which contains the

[Qemu-devel] [PULL 12/16] target-i386: Show host and VM TSC frequencies on mismatch

2016-07-07 Thread Eduardo Habkost
Improve the TSC frequency mismatch warning to show the host and VM TSC frequencies. Reviewed-by: Dr. David Alan Gilbert Reviewed-by: Marcelo Tosatti Signed-off-by: Eduardo Habkost --- target-i386/kvm.c | 4 +++- 1 file changed, 3

[Qemu-devel] [PULL 14/16] target-i386: kvm: Add basic Intel LMCE support

2016-07-07 Thread Eduardo Habkost
From: Ashok Raj This patch adds the support to inject SRAR and SRAO as LMCE, i.e. they are injected to only one VCPU rather than broadcast to all VCPUs. As KVM reports LMCE support on Intel platforms, this features is only available on Intel platforms. LMCE is disabled by

[Qemu-devel] [PULL 13/16] target-i386: Report hyperv feature words through qom

2016-07-07 Thread Eduardo Habkost
From: Evgeny Yakovlev This change adds hyperv feature words report through qom rpc. When VM is configured with hyperv features enabled libvirt will check that required feature words are set in cpuid leaf 4003 through qom request. Currently qemu does not report

[Qemu-devel] [PULL 05/16] vl: Set errp to _abort on machine compat_props

2016-07-07 Thread Eduardo Habkost
Use the new GlobalProperty.errp field to handle compat_props errors. Example output before this change: (with an intentionally broken entry added to PC_COMPAT_1_3 just for testing) $ qemu-system-x86_64 -machine pc-1.3 qemu-system-x86_64: hw/core/qdev-properties.c:1091:

[Qemu-devel] [PULL 10/16] arm: virt: Parse cpu_model only once

2016-07-07 Thread Eduardo Habkost
From: Igor Mammedov Considering that features are converted to global properties and global properties are automatically applied to every new instance of created CPU (at object_new() time), there is no point in parsing cpu_model string every time a CPU created. So move

[Qemu-devel] [PULL 16/16] target-i386: Enable LMCE for '-cpu host' if supported by host

2016-07-07 Thread Eduardo Habkost
From: Haozhong Zhang If -cpu host is used, LMCE will be automatically enabled when it's supported by host. Signed-off-by: Haozhong Zhang Reviewed-by: Eduardo Habkost Signed-off-by: Eduardo Habkost

[Qemu-devel] [PULL 02/16] qdev: Eliminate qemu_add_globals() function

2016-07-07 Thread Eduardo Habkost
The function is just a helper to handle the -global options, it can stay in vl.c like most qemu_opts_foreach() calls. Reviewed-by: Igor Mammedov Reviewed-by: Markus Armbruster Signed-off-by: Eduardo Habkost ---

[Qemu-devel] [PULL 11/16] pc: Parse CPU features only once

2016-07-07 Thread Eduardo Habkost
From: Igor Mammedov Considering that features are converted to global properties and global properties are automatically applied to every new instance of created CPU (at object_new() time), there is no point in parsing cpu_model string every time a CPU created. So move

[Qemu-devel] [PULL 08/16] target-i386: Avoid using locals outside their scope

2016-07-07 Thread Eduardo Habkost
From: Paolo Bonzini x86_cpu_parse_featurestr has a "val = num;" assignment just before num goes out of scope. Push num up to fix the issue. Signed-off-by: Paolo Bonzini Reviewed-by: Igor Mammedov Reviewed-by: Eduardo Habkost

[Qemu-devel] [PULL 09/16] cpu: Use CPUClass->parse_features() as convertor to global properties

2016-07-07 Thread Eduardo Habkost
From: Igor Mammedov Currently CPUClass->parse_features() is used to parse -cpu features string and set properties on created CPU instances. But considering that features specified by -cpu apply to every created CPU instance, it doesn't make sense to parse the same features

[Qemu-devel] [PULL 06/16] target-sparc: Use sparc_cpu_parse_features() directly

2016-07-07 Thread Eduardo Habkost
From: Igor Mammedov Make SPARC target use sparc_cpu_parse_features() directly so it won't get in the way of switching other propertified targets to handling features as global properties. Signed-off-by: Igor Mammedov Reviewed-by: Eduardo Habkost

[Qemu-devel] [PULL 01/16] qdev: Don't stop applying globals on first error

2016-07-07 Thread Eduardo Habkost
qdev_prop_set_globals_for_type() stops applying global properties on the first error. It is a leftover from when QEMU exited on any error when applying global property. Commit 25f8dd9 changed the fatal error to a warning, but neglected to drop the stopping. Fix that. For example, the following

[Qemu-devel] [PULL 03/16] qdev: GlobalProperty.errp field

2016-07-07 Thread Eduardo Habkost
The new field will allow error handling to be configured by qdev_prop_register_global() callers: _fatal and _abort can be used to make QEMU exit or abort if any errors are reported when applying the properties. While doing it, change the error message from "global %s.%s=%s ignored" to "can't

[Qemu-devel] [PULL 00/16] x86 and machine queue, 2016-07-07

2016-07-07 Thread Eduardo Habkost
The following changes since commit 4f4a9ca4a4386c137301b3662faba076455ff15a: Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20160707' into staging (2016-07-07 14:49:38 +0100) are available in the git repository at: git://github.com/ehabkost/qemu.git tags/x86-pull

[Qemu-devel] [PULL 07/16] target-i386: TCG can support CPUID.07H:EBX.erms

2016-07-07 Thread Eduardo Habkost
From: Paolo Bonzini ERMS just says "rep movsb" and "rep stosb" are fast. It does not imply any new instruction, so we can support it easily. Signed-off-by: Paolo Bonzini Reviewed-by: Eduardo Habkost Signed-off-by: Eduardo Habkost

[Qemu-devel] [PULL 04/16] machine: Add machine_register_compat_props() function

2016-07-07 Thread Eduardo Habkost
Move the compat_props handling to core machine code. Reviewed-by: Marcel Apfelbaum Reviewed-by: Markus Armbruster Signed-off-by: Eduardo Habkost --- hw/core/machine.c | 16 include/hw/boards.h | 1 + vl.c

Re: [Qemu-devel] [PATCH 3/3] tcg: Avoid bouncing tb_lock between tb_gen_code() and tb_add_jump()

2016-07-07 Thread Sergey Fedorov
On 07/07/16 22:36, Alex Bennée wrote: > Sergey Fedorov writes: > >> From: Sergey Fedorov >> >> Signed-off-by: Sergey Fedorov >> Signed-off-by: Sergey Fedorov >> --- >> cpu-exec.c | 15

Re: [Qemu-devel] [PATCH v2 0/6] Reduce lock contention on TCG hot-path

2016-07-07 Thread Alex Bennée
Emilio G. Cota writes: > On Tue, Jul 05, 2016 at 17:18:10 +0100, Alex Bennée wrote: >> Well this is the first re-spin of the series posted last week. I've >> added a bunch of additional patches to be more aggressive with >> avoiding bouncing locks but to be honest the numbers

Re: [Qemu-devel] [PATCH 3/3] tcg: Avoid bouncing tb_lock between tb_gen_code() and tb_add_jump()

2016-07-07 Thread Alex Bennée
Sergey Fedorov writes: > From: Sergey Fedorov > > Signed-off-by: Sergey Fedorov > Signed-off-by: Sergey Fedorov > --- > cpu-exec.c | 15 +-- > 1 file changed, 9 insertions(+), 6

Re: [Qemu-devel] [PATCH v2 0/6] Reduce lock contention on TCG hot-path

2016-07-07 Thread Alex Bennée
Paolo Bonzini writes: > On 07/07/2016 18:04, Emilio G. Cota wrote: >>> > I think the first 3 patches are ready to take if the TCG maintainers >>> > want to: >>> > >>> > tcg: Ensure safe tb_jmp_cache lookup out of 'tb_lock' >>> > tcg: set up tb->page_addr before

Re: [Qemu-devel] [PATCH] linux-user: Handle short lengths in host_to_target_sockaddr()

2016-07-07 Thread Riku Voipio
On Thu, Jul 07, 2016 at 03:44:43PM +0100, Peter Maydell wrote: > If userspace specifies a short buffer for a target sockaddr, > the kernel will only copy in as much as it has space for > (or none at all if the length is zero) -- see the kernel > move_addr_to_user() function. Mimic this in QEMU's >

Re: [Qemu-devel] [PATCH] linux-user: fix signal() syscall on x86_64

2016-07-07 Thread Wirth, Allan
On 7/7/16, 3:09 PM, "Laurent Vivier" wrote: > > >Le 07/07/2016 à 21:04, Wirth, Allan a écrit : >> >> >> On 7/7/16, 3:02 PM, "Laurent Vivier" wrote: >> >>> >>> >>> Le 07/07/2016 à 20:49, Riku Voipio a écrit : On Sat, Jul 02, 2016 at 09:12:09PM

Re: [Qemu-devel] [PATCH] linux-user: fix signal() syscall on x86_64

2016-07-07 Thread Laurent Vivier
Le 07/07/2016 à 21:04, Wirth, Allan a écrit : > > > On 7/7/16, 3:02 PM, "Laurent Vivier" wrote: > >> >> >> Le 07/07/2016 à 20:49, Riku Voipio a écrit : >>> On Sat, Jul 02, 2016 at 09:12:09PM +0100, Peter Maydell wrote: On 2 July 2016 at 17:41, Laurent Vivier

Re: [Qemu-devel] [PATCH] linux-user: fix signal() syscall on x86_64

2016-07-07 Thread Wirth, Allan
On 7/7/16, 3:02 PM, "Laurent Vivier" wrote: > > >Le 07/07/2016 à 20:49, Riku Voipio a écrit : >> On Sat, Jul 02, 2016 at 09:12:09PM +0100, Peter Maydell wrote: >>> On 2 July 2016 at 17:41, Laurent Vivier wrote: Sadly, this can't work:

Re: [Qemu-devel] [PATCH v8 11/12] vfio: register aer resume notification handler for aer resume

2016-07-07 Thread Alex Williamson
On Wed, 6 Jul 2016 10:01:28 +0800 Zhou Jie wrote: > Hi Alex, > > > Due to weekend and holiday in my country, there were zero regular > > working hours between your emails. > I wish you had a good time. > > >>> The following code will be modified. > >>> 1.

Re: [Qemu-devel] [PATCH] linux-user: fix signal() syscall on x86_64

2016-07-07 Thread Laurent Vivier
Le 07/07/2016 à 20:49, Riku Voipio a écrit : > On Sat, Jul 02, 2016 at 09:12:09PM +0100, Peter Maydell wrote: >> On 2 July 2016 at 17:41, Laurent Vivier wrote: >>> Sadly, this can't work: >>> >>> sparc/sparc64/cris use sys_select for NR_select AND NR_newselect. >> >>> Not

Re: [Qemu-devel] [PATCH v3] translate-all: Bugfix for user-mode self-modifying code in 2 page long TB

2016-07-07 Thread Richard Henderson
On 07/07/2016 01:33 AM, Stanislav Shmarov wrote: In user-mode emulation Translation Block can consist of 2 guest pages. In that case QEMU also mprotects 2 host pages that are dedicated for guest memory, containing instructions. QEMU detects self-modifying code with SEGFAULT signal processing.

Re: [Qemu-devel] [PATCH] linux-user: fix signal() syscall on x86_64

2016-07-07 Thread Riku Voipio
On Sat, Jul 02, 2016 at 09:12:09PM +0100, Peter Maydell wrote: > On 2 July 2016 at 17:41, Laurent Vivier wrote: > > Sadly, this can't work: > > > > sparc/sparc64/cris use sys_select for NR_select AND NR_newselect. > > > Not sure all is correct, but it's what I've found: > > >

Re: [Qemu-devel] [PATCH v3 4/4] x86: Set physical address bits based on host

2016-07-07 Thread Dr. David Alan Gilbert
* Eduardo Habkost (ehabk...@redhat.com) wrote: > On Tue, Jul 05, 2016 at 08:03:18PM +0100, Dr. David Alan Gilbert (git) wrote: > > From: "Dr. David Alan Gilbert" > > > > A special case based on the previous phys-bits property; if it's > > the magic value 0 then use the hosts

Re: [Qemu-devel] [PATCH v3 1/4] x86: Allow physical address bits to be set

2016-07-07 Thread Dr. David Alan Gilbert
* Eduardo Habkost (ehabk...@redhat.com) wrote: > On Thu, Jul 07, 2016 at 05:39:14PM +0100, Dr. David Alan Gilbert wrote: > [...] > > * Eduardo Habkost (ehabk...@redhat.com) wrote: > > > On Tue, Jul 05, 2016 at 08:03:15PM +0100, Dr. David Alan Gilbert (git) > > > wrote: > > > > From: "Dr. David

Re: [Qemu-devel] [PATCH v3 2/2] qapi: change QmpInputVisitor to QSLIST

2016-07-07 Thread Eric Blake
On 07/07/2016 09:53 AM, Paolo Bonzini wrote: > This saves a lot of memory compared to a statically-sized array, > or at least 24kb could be considered a lot on an Atari ST. > It also makes the code more similar to QmpOutputVisitor. > > This removes the limit on the depth of a QObject that can be

Re: [Qemu-devel] [PATCH v3 1/4] x86: Allow physical address bits to be set

2016-07-07 Thread Eduardo Habkost
On Thu, Jul 07, 2016 at 05:39:14PM +0100, Dr. David Alan Gilbert wrote: [...] > * Eduardo Habkost (ehabk...@redhat.com) wrote: > > On Tue, Jul 05, 2016 at 08:03:15PM +0100, Dr. David Alan Gilbert (git) > > wrote: > > > From: "Dr. David Alan Gilbert" > > > > > > Currently

[Qemu-devel] [PATCH v3 4/4] ppc/xics: Split ICS into ics-base and ics class

2016-07-07 Thread Nikunj A Dadhania
From: Benjamin Herrenschmidt The existing implementation remains same and ics-base is introduced. The type name "ics" is retained, and all the related functions renamed as ics_simple_* This will allow different implementations for the source controllers such as the MSI

[Qemu-devel] [PATCH v3 3/4] ppc/xics: Use a helper to add a new ICS

2016-07-07 Thread Nikunj A Dadhania
From: Benjamin Herrenschmidt Signed-off-by: Benjamin Herrenschmidt [Move object allocation and adding child to the helper] Signed-off-by: Nikunj A Dadhania Reviewed-by: David Gibson ---

[Qemu-devel] [PATCH v3 0/4] sPAPR xics rework/cleanup (pending)

2016-07-07 Thread Nikunj A Dadhania
sPAPR xics related changes required for powernv platform. This brings infrastructure to get the xics native mode for powernv. Tested pseries guests in KVM and TCG mode. These are the pending patches of the original set. Changelog v2: * Restore xirr_owner after migration * Call icp_resend after

[Qemu-devel] [PATCH v3 1/4] ppc/xics: Make the ICSState a list

2016-07-07 Thread Nikunj A Dadhania
From: Benjamin Herrenschmidt Instead of an array of fixed sized blocks, use a list, as we will need to have sources with variable number of interrupts. SPAPR only uses a single entry. Native will create more. If performance becomes an issue we can add some hashed lookup

[Qemu-devel] [PATCH v3 2/4] ppc/xics: An ICS with offset 0 is assumed to be uninitialized

2016-07-07 Thread Nikunj A Dadhania
From: Benjamin Herrenschmidt This will make life easier for dealing with dynamically configured ICSes such as PHB3 Signed-off-by: Benjamin Herrenschmidt Reviewed-by: David Gibson Signed-off-by: Nikunj A Dadhania

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