[Qemu-devel] [PATCH] docker: Be compatible with older docker

By not using "--format" with docker images command. The option is not available on RHEL 7 docker command. Use an awk matching command instead. Reported-by: Paolo Bonzini Signed-off-by: Fam Zheng --- tests/docker/Makefile.include | 5 ++--- 1 file changed,

[Qemu-devel] [PATCH v3] ppc: Fix signal delivery in ppc-user and ppc64-user

There were a number of bugs in the implementation: - The structure alignment was wrong for 64-bit. - Also 64-bit only does RT signals. - On 64-bit, we need to put a pointer to the (aligned) vector registers in the frame and use it for restoring - We had endian bugs when saving/restoring

[Qemu-devel] [PULL 0/2] ppc-for-2.7 queue 20160803

The following changes since commit 8b54a6a6c63dc84f2744f6b125c1a6c5a16ee10b: Merge remote-tracking branch 'remotes/ehabkost/tags/numa-pull-request' into staging (2016-08-02 12:55:12 +0100) are available in the git repository at: git://github.com/dgibson/qemu.git tags/ppc-for-2.7-20160803

[Qemu-devel] [PULL 2/2] kvm-irqchip: only commit route when irqchip is used

From: Peter Xu Reported from Alexey Kardashevskiy: 3f1fea0fb5bf "kvm-irqchip: do explicit commit when update irq" produces a crash on pseries guest running with VFIO on POWER8 machine as it does not support KVM_CAP_IRQCHIP (KVM_CAP_IRQ_XICS is there instead). At the result,

[Qemu-devel] [PULL 1/2] spapr: Error out when CPU hotplug is attempted on older pseries machines

From: Bharata B Rao CPU hotplug and coldplug aren't supported prior to pseries-2.7. Further, earlier machine types don't use CPU core objects at all. These mean that query-hotpluggable-cpus and coldplug on older pseries machines will crash QEMU. It also means that

[Qemu-devel] [PATCH] vhost: check for vhost_ops before using.

'vhost_set_vring_enable()' tries to call function using pointer to 'vhost_ops' which can be already zeroized in 'vhost_dev_cleanup()' while vhost disconnection. Fix that by checking 'vhost_ops' before using. This fixes QEMU crash on calling 'ethtool -L eth0 combined 2' if vhost disconnected.

Re: [Qemu-devel] [PATCH] ide: fix DMA register transitions

Am 03.08.2016 um 00:05 schrieb John Snow: > ATA8-APT defines the state transitions for both a host controller and > for the hardware device during the lifecycle of a DMA transfer, in > section 9.7 "DMA command protocol." > > One of the interesting tidbits here is that when a device transitions >

[Qemu-devel] [PATCH v2] ppc: Fix signal delivery in ppc-user and ppc64-user

There were a number of bugs in the implementation: - The structure alignment was wrong for 64-bit. - Also 64-bit only does RT signals. - On 64-bit, we need to put a pointer to the (aligned) vector registers in the frame and use it for restoring - We had endian bugs when saving/restoring

Re: [Qemu-devel] [PATCH 1/7] util: Add UUID API

On Wed, Aug 03, 2016 at 10:36:40AM +0800, Fam Zheng wrote: > On Tue, 08/02 15:45, Paolo Bonzini wrote: > > > > > > - Original Message - > > > From: "Fam Zheng" > > > To: qemu-devel@nongnu.org > > > Cc: f...@redhat.com, berra...@redhat.com, pbonz...@redhat.com, > > >

Re: [Qemu-devel] [PATCH 3/3] ppc: Fix signal delivery in 64-bit usermode qemu

On Wed, 2016-08-03 at 13:16 +1000, Benjamin Herrenschmidt wrote: > There were a number of bugs in the implementation. The structure > alignment was wrong for 64-bit. Also 64-bit only does RT signals. > > Finally on 64-bit, we need to put a pointer to the (aligned) > vector registers in the frame.

Re: [Qemu-devel] [PATCH] xen: use a common function for pv and hvm guest backend register calls

On 02/08/16 20:27, Stefano Stabellini wrote: > On Tue, 2 Aug 2016, Juergen Gross wrote: >> Instead of calling xen_be_register() for each supported backend type >> for hvm and pv guests in their machine init functions use a common >> function in order not to have to add new backends twice. >> >>

Re: [Qemu-devel] [PATCH v2] kvm-irqchip: only commit route when irqchip is used

On Wed, Aug 03, 2016 at 11:07:21AM +0800, Peter Xu wrote: > Reported from Alexey Kardashevskiy: > > 3f1fea0fb5bf "kvm-irqchip: do explicit commit when update irq" produces > a crash on pseries guest running with VFIO on POWER8 machine as it does > not support KVM_CAP_IRQCHIP (KVM_CAP_IRQ_XICS is

[Qemu-devel] [PATCH 3/3] ppc: Fix signal delivery in 64-bit usermode qemu

There were a number of bugs in the implementation. The structure alignment was wrong for 64-bit. Also 64-bit only does RT signals. Finally on 64-bit, we need to put a pointer to the (aligned) vector registers in the frame. This is still missing support for VSX which I will add separately.

Re: [Qemu-devel] [PATCH for-2.7] block: Accept any target node for transactional blockdev-backup

On Tue, 08/02 19:22, Kevin Wolf wrote: > Commit 0d978913 changed blockdev-backup to accept arbitrary node names > instead of device names (i.e. root nodes) for the backup target. > However, it forgot to make the same change in transactions and to update > the documentation. This patch fixes these

[Qemu-devel] [PATCH v6 8/8] MAINTAINERS: Add Alistair to the maintainers list

Add Alistair Francis as the maintainer for the Netduino 2 and SMM32F205 SoC. Signed-off-by: Alistair Francis Reviewed-by: Peter Crosthwaite --- MAINTAINERS | 15 +++ 1 file changed, 15 insertions(+) diff --git a/MAINTAINERS

[Qemu-devel] [PATCH 2/2] Fix g2h() for 32-bit targets on 64-bit hosts

The current constructs ends up cropping the host address to 32-bit which crashes for me running 32-bit ppc programs on an x86_64. Signed-off-by: Benjamin Herrenschmidt --- Not sure who to CC for this... include/exec/cpu_ldst.h | 2 +- 1 file changed, 1 insertion(+),

[Qemu-devel] [PATCH v6 5/8] irq: Add a new irq device that allows the ORing of lines

Signed-off-by: Alistair Francis --- As the migration framework is not included in user mode this needs to be a new file. V6: - Make the OR IRQ device a TYPE_DEVICE - Add vmstate hw/core/Makefile.objs | 1 + hw/core/irq.c | 1 + hw/core/or-irq.c | 102

[Qemu-devel] [PATCH 1/2] Fix tlb_vaddr_to_host with CONFIG_USER_ONLY

We use the wrong argument name for the g2h() macro ! Signed-off-by: Benjamin Herrenschmidt --- Not sure who to CC for this... include/exec/cpu_ldst.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h

[Qemu-devel] [PATCH v6 3/8] STM32F2xx: Add the ADC device

Add the STM32F2xx ADC device. This device randomly generates values on each read. This also includes creating a hw/adc directory. Signed-off-by: Alistair Francis Reviewed-by: Peter Maydell --- V4: - Remove the rand() function - Add VMState -

[Qemu-devel] [PATCH v6 4/8] STM32F2xx: Add the SPI device

Add the STM32F2xx SPI device. Signed-off-by: Alistair Francis Reviewed-by: Peter Maydell --- V4: - Add VMState - Small fixes V2: - Address Peter C's comments default-configs/arm-softmmu.mak | 1 + hw/ssi/Makefile.objs| 1 +

[Qemu-devel] [PATCH v6 1/8] STM32F205: Remove the individual device variables

Cleanup the individual DeviceState and SysBusDevice variables to re-use the same variable for each device. Signed-off-by: Alistair Francis Reviewed-by: Peter Crosthwaite --- hw/arm/stm32f205_soc.c | 35 +--

[Qemu-devel] [PATCH v6 2/8] STM32F2xx: Display PWM duty cycle from timer

If correctly configured allow the STM32F2xx timer to print out the PWM duty cycle information. Signed-off-by: Alistair Francis Reviewed-by: Peter Crosthwaite --- V3: - Use OR instead of + for masking - Improve clarity of print statement

[Qemu-devel] [PATCH v6 0/8] Update the Netduino 2 Machine

This patchset continues with the Netduino 2 and STM32F205 SoC work. This patch series makes a small change to the STM32F2xx SoC to tidy up the code. Next a feature is added to the STM32F2xx timer to display the PWM duty cycle, when debugging is enabled. Then the STM32F2xx SPI and ADC devices

[Qemu-devel] [PATCH v2] kvm-irqchip: only commit route when irqchip is used

Reported from Alexey Kardashevskiy: 3f1fea0fb5bf "kvm-irqchip: do explicit commit when update irq" produces a crash on pseries guest running with VFIO on POWER8 machine as it does not support KVM_CAP_IRQCHIP (KVM_CAP_IRQ_XICS is there instead). At the result, KVMState::irq_routes is NULL when

Re: [Qemu-devel] [PATCH qemu] kvm-irqchip: Only do explicit IRQ routing commit when IRQCHIP is in use

On Tue, Aug 02, 2016 at 03:48:23PM -0400, Paolo Bonzini wrote: > > > > This works too. > > > > > > > > You may also want to copy if(!kvm_gsi_routing_enabled()) from > > > > kvm_irqchip_add_msi_route() to align API (not needed in my case though). > > > > Or > > > > just check the result of these

Re: [Qemu-devel] [RFC PATCH V10 1/7] colo-compare: introduce colo compare initialization

On 08/02/2016 02:26 PM, Jason Wang wrote: On 2016年07月26日 09:49, Zhang Chen wrote: This a COLO net ascii figure: Primary qemu Secondary qemu +--+ ++ |

Re: [Qemu-devel] [PULL 09/10] docker: Don't start a container that doesn't exist

On Tue, 08/02 20:59, Paolo Bonzini wrote: > > > On 19/07/2016 16:31, Fam Zheng wrote: > > Image building targets are dependencies of test running targets, so when > > a docker image doesn't exist, it means it's skipped (due to dependency > > checks in pre script). Therefore, skip the test too. >

Re: [Qemu-devel] [PATCH 1/7] util: Add UUID API

On Tue, 08/02 15:45, Paolo Bonzini wrote: > > > - Original Message - > > From: "Fam Zheng" > > To: qemu-devel@nongnu.org > > Cc: f...@redhat.com, berra...@redhat.com, pbonz...@redhat.com, > > kw...@redhat.com, mre...@redhat.com, > > mdr...@linux.vnet.ibm.com,

Re: [Qemu-devel] [PATCH v1 2/2] target-ppc: cmprb - truncate RA to 8bits

On Tue, Aug 02, 2016 at 01:23:00PM +0530, Nikunj A Dadhania wrote: > Missed the following bit in the instruction coding. > > src1 ← EXTZ(RA(56:63)) > > Reported-by: Anton Blanchard > Signed-off-by: Nikunj A Dadhania > --- > > Can be squashed with

Re: [Qemu-devel] [PATCH 1/5] target-ppc: add vector insert instructions

On Mon, Aug 01, 2016 at 12:49:38PM +0530, Rajalakshmi Srinivasaraghavan wrote: > The following vector insert instructions are added from ISA 3.0. > > vinsertb - Vector Insert Byte > vinserth - Vector Insert Halfword > vinsertw - Vector Insert Word > vinsertd - Vector Insert Doubleword > >

Re: [Qemu-devel] [PATCH] spapr: Don't support query-hotpluggable-cpus on earlier pseries machine types

On Tue, Aug 02, 2016 at 08:24:13AM +0200, Peter Krempa wrote: > On Tue, Aug 02, 2016 at 16:20:50 +1000, David Gibson wrote: > > On Tue, Aug 02, 2016 at 10:34:34AM +0530, Bharata B Rao wrote: > > > On Tue, Aug 02, 2016 at 02:25:08PM +1000, David Gibson wrote: > > > > On Power, support for vCPU

Re: [Qemu-devel] [PATCH v1 1/2] target-ppc: modsw - return 64-bit sign extended

On Tue, Aug 02, 2016 at 01:22:59PM +0530, Nikunj A Dadhania wrote: > Reported-by: Anton Blanchard > Signed-off-by: Nikunj A Dadhania > --- > > Can be squashed with the original commit Done. > > target-ppc/translate.c | 2 +- > 1 file changed, 1

Re: [Qemu-devel] [PATCH] vhost: don't set vring call if no vector

On 2016年08月02日 14:37, Cornelia Huck wrote: On Tue, 2 Aug 2016 10:39:22 +0800 Jason Wang wrote: On 2016年08月02日 02:00, Cornelia Huck wrote: On Mon, 1 Aug 2016 16:07:58 +0800 Jason Wang wrote: +if (k->query_guest_notifiers && +

Re: [Qemu-devel] [RFC v5 7/7] hw/arm/virt-acpi-build: Add ITS description in ACPI MADT table

Hi Eric, On 2016/8/3 2:07, Eric Auger wrote: > This patch exposes the GICv3 ITS to the ACPI guest. The ITS structure > is added to the MADT table. > > Signed-off-by: Eric Auger > > --- > > v5: new > > Tested with Tomasz' kernel series on guest side: > - [PATCH V7 0/8]

Re: [Qemu-devel] [PATCH v2 1/2] virtio-blk: Release s->rq queue at system_reset

On Tue, 08/02 13:00, Paolo Bonzini wrote: > > > I'd prefer if Paolo's remark (about blk_drain()'s ability to produce > > more failed requests, stashed in s->rq) were captured in either the > > commit message, or in a code comment. Something like: > > > > /* We drop queued requests after

Re: [Qemu-devel] [PATCH v3 10/10] palmetto-bmc: remove extra no_sdcard assignement

On Tue, 2016-08-02 at 19:15 +0200, Cédric Le Goater wrote: > Signed-off-by: Cédric Le Goater Reviewed-by: Andrew Jeffery > --- >  hw/arm/aspeed.c | 1 - >  1 file changed, 1 deletion(-) > > diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c > index

Re: [Qemu-devel] [PATCH v3 09/10] arm: add support for an ast2500 evaluation board

On Tue, 2016-08-02 at 19:15 +0200, Cédric Le Goater wrote: > The ast2500 eval board has a hardware strapping register value of > 0xF100C2E6 which we use for a definition of AST2500_EVB_HW_STRAP1 > below. > > Signed-off-by: Cédric Le Goater Reviewed-by: Andrew Jeffery

Re: [Qemu-devel] [PATCH v3 08/10] aspeed: add a AST2500 SoC and support to the SCU and SDMC controllers controllers

On Tue, 2016-08-02 at 19:15 +0200, Cédric Le Goater wrote: > Based on previous work done by Andrew Jeffery . > > Signed-off-by: Cédric Le Goater Reviewed-by: Andrew Jeffery > --- > >  Changes since v2: > >  - more precise definitions of the

Re: [Qemu-devel] [PATCH v3 07/10] hw/misc: use macros to define hw-strap1 register on the AST2400 Aspeed SoC

On Tue, 2016-08-02 at 19:15 +0200, Cédric Le Goater wrote: > This gives some explanation behind the magic number 0x120CE416. > > Signed-off-by: Cédric Le Goater Reviewed-by: Andrew Jeffery > --- > >  Changes since v2: > >  - more precise definitions of the

Re: [Qemu-devel] [PATCH v3 06/10] palmetto-bmc: add board specific configuration

On Tue, 2016-08-02 at 19:15 +0200, Cédric Le Goater wrote: > aspeed_board_init() now uses a board identifier to customize some values > specific to the board. > > Signed-off-by: Cédric Le Goater Reviewed-by: Andrew Jeffery > --- > >  Changes since v2: > >  -

Re: [Qemu-devel] [PATCH v3 05/10] palmetto-bmc: replace palmetto_bmc with aspeed

On Tue, 2016-08-02 at 19:15 +0200, Cédric Le Goater wrote: > This is mostly a name replacement to prepare ground for other SoCs > specificities. It also adds a TypeInfo struct for the palmetto-bmc > board with a custom initialization for the same reason. > > Signed-off-by: Cédric Le Goater

Re: [Qemu-devel] [PATCH v3 04/10] palmetto-bmc: rename the Aspeed board file to aspeed.c

On Tue, 2016-08-02 at 19:15 +0200, Cédric Le Goater wrote: > We plan to add more Aspeed boards to this file. There are no changes > in the code. > > Signed-off-by: Cédric Le Goater Reviewed-by: Andrew Jeffery > --- >  hw/arm/Makefile.objs  |   2 +- >  

Re: [Qemu-devel] [PATCH v3 03/10] aspeed-soc: provide a framework to add new SoCs

On Tue, 2016-08-02 at 19:15 +0200, Cédric Le Goater wrote: > Let's define an object class for each Aspeed SoC we support. A > AspeedSoCInfo struct gathers the SoC specifications which can later > be > used by an instance of the class or by a board using the SoC. > > Signed-off-by: Cédric Le

Re: [Qemu-devel] [PATCH v3 02/10] ast2400: replace ast2400 with aspeed_soc

On Tue, 2016-08-02 at 19:15 +0200, Cédric Le Goater wrote: > This is a name replacement to prepare ground for other SoCs. > > Let's also remove the AST2400_SMC_BASE definition from the address > space mappings, as it is not used. This controller was removed from > the Aspeed SoC AST2500, so this

Re: [Qemu-devel] [PATCH v3 01/10] ast2400: rename the Aspeed SoC files to aspeed_soc

On Tue, 2016-08-02 at 19:15 +0200, Cédric Le Goater wrote: > Let's prepare for new Aspeed SoCs and rename the ast2400 file to a > more generic one. There are no changes in the code apart from the > header file include. > > Signed-off-by: Cédric Le Goater Reviewed-by: Andrew

Re: [Qemu-devel] [PATCH 0/2] hw/ppc: fdt cleanups

On Tue, Aug 02, 2016 at 07:37:59PM +0200, Cédric Le Goater wrote: > Hello, > > Here are a couple of enhancements for sPAPR but PowerNV should use > them also. Applied to ppc-for-2.8, thanks. > > Thanks, > > C. > > Cédric Le Goater (2): > hw/ppc: use error_report instead of fprintf >

Re: [Qemu-devel] [PATCH] ppc: Fix macio ESCC legacy mapping

On Tue, Aug 02, 2016 at 07:22:43PM +1000, Benjamin Herrenschmidt wrote: > The current mapping, while correct for the base ports (which is all the > driver uses these days), is wrong for the extended registers. > > I suspect the bugs come from incorrect tables in the CHRP IO Ref document, > I

Re: [Qemu-devel] [PATCH v9 3/8] loader: Allow a custom AddressSpace when loading ROMs

On Fri, Jul 29, 2016 at 8:56 AM, Peter Maydell wrote: > On 14 July 2016 at 01:03, Alistair Francis > wrote: >> When loading ROMs allow the caller to specify an AddressSpace to use for >> the load. >> >> Signed-off-by: Alistair Francis

Re: [Qemu-devel] [Qemu-block] [PATCH for-2.7] block: Accept any target node for transactional blockdev-backup

On 08/02/2016 01:22 PM, Kevin Wolf wrote: Commit 0d978913 changed blockdev-backup to accept arbitrary node names instead of device names (i.e. root nodes) for the backup target. However, it forgot to make the same change in transactions and to update http://i.imgur.com/PfBxuOb.gif the

[Qemu-devel] [PATCH] ide: fix DMA register transitions

ATA8-APT defines the state transitions for both a host controller and for the hardware device during the lifecycle of a DMA transfer, in section 9.7 "DMA command protocol." One of the interesting tidbits here is that when a device transitions from DDMA0 ("Prepare state") to DDMA1 ("Data_Transfer

Re: [Qemu-devel] [PATCH v9 6/8] loader: Add AddressSpace loading support to targphys

On Fri, Jul 29, 2016 at 10:42 AM, Peter Maydell wrote: > On 14 July 2016 at 01:03, Alistair Francis > wrote: >> Add a new function load_image_targphys_as() that allows the caller >> to specify an AddressSpace to use when loading a targphys.

Re: [Qemu-devel] [PULL 10/25] qdist: fix memory leak during binning

Hi On Tue, Aug 2, 2016 at 11:53 PM Paolo Bonzini wrote: > From: "Emilio G. Cota" > > In qdist_bin__internal(), to->entries is initialized to a 1-element array, > which we then leak when n == from->n. Fix it. > > Signed-off-by: Emilio G. Cota

[Qemu-devel] [Bug 1490611] Re: Using qemu >=2.2.1 to convert raw->VHD (fixed) adds extra padding to the result file, which Microsoft Azure rejects as invalid

** Description changed: - Starting with a raw disk image, using "qemu-img convert" to convert from - raw to VHD results in the output VHD file's virtual size being aligned - to the nearest 516096 bytes (16 heads x 63 sectors per head x 512 bytes - per sector), instead of preserving the input

[Qemu-devel] Shutting down x86 QEMU with ACPI from Userspace

Hi all, This took a lot of fiddling, so I figured I'd document my findings here in case it helps anybody else. If you don't want to have CONFIG_ACPI in your kernel, but still would like to shutdown QEMU, the following works for the q35 machine type: ioperm(0x604, 2, 1); outw(1 << 13,

Re: [Qemu-devel] [Bug 1608802] [NEW] READ_DMA (0xC8) command does not work correctly

- Original Message - Am 02.08.2016 um 08:52 hat Stefan Weil geschrieben: Am 02.08.2016 um 08:11 schrieb Stefan Weil: > Public bug reported: > > The QEMU PC emulation of DMA does not behave like real hardware or other > virtualization software. > > >From the original bug report (Benjamin

Re: [Qemu-devel] [PATCH qemu] kvm-irqchip: Only do explicit IRQ routing commit when IRQCHIP is in use

> > > This works too. > > > > > > You may also want to copy if(!kvm_gsi_routing_enabled()) from > > > kvm_irqchip_add_msi_route() to align API (not needed in my case though). > > > Or > > > just check the result of these checks by if(!s->irq_routes) :) > > > Thanks. > > > > Right. Do you like to

Re: [Qemu-devel] [Patch v1 00/29] s390x CPU models: exposing features

On Tue, Aug 02, 2016 at 08:12:34PM +0200, David Hildenbrand wrote: > > On Tue, Aug 02, 2016 at 01:58:46PM +0200, David Hildenbrand wrote: > > [...] > > > So we have: > > > a) "query-cpu-model-expansion" - tell us what the "host" or another CPU > > >model looks like. Either falling back to a

Re: [Qemu-devel] [PATCH 1/7] util: Add UUID API

- Original Message - > From: "Fam Zheng" > To: qemu-devel@nongnu.org > Cc: f...@redhat.com, berra...@redhat.com, pbonz...@redhat.com, > kw...@redhat.com, mre...@redhat.com, > mdr...@linux.vnet.ibm.com, arm...@redhat.com, s...@weilnetz.de, > qemu-bl...@nongnu.org >

[Qemu-devel] [PULL 24/25] qdev: Fix use after free in qdev_init_nofail error path

From: Fam Zheng Since 69382d8b (qdev: Fix object reference leak in case device.realize() fails), object_property_set_bool could release the object. The error path wants the type name, so hold an reference before realizing it. Cc: Igor Mammedov

[Qemu-devel] [PULL 25/25] util: Fix assertion in iov_copy() upon zero 'bytes' and non-zero 'offset'

From: Shmulik Ladkani In cases where iov_copy() is passed with zero 'bytes' argument and a non-zero 'offset' argument, nothing gets copied - as expected. However no copy iterations are performed, so 'offset' is left unaltered, leading to the final

Re: [Qemu-devel] [PATCH] numa: set the memory backend "is_mapped" field

On Tue, Aug 02, 2016 at 03:20:41PM -0400, Paolo Bonzini wrote: [...] > > I have just noticed that this fell through the cracks, sorry. > > Applied to numa-next. Thanks! > > Actually I am just finishing tests of a pull request that included it > (because I was the one that caused the regression).

[Qemu-devel] [PULL 21/25] x86: ioapic: ignore level irq during processing

From: Peter Xu For level triggered interrupts, we will get Remote IRR bit cleared after guest kernel finished processing specific request. Before that, we should ignore the same interrupt from triggering again. Signed-off-by: Peter Xu Message-Id:

[Qemu-devel] [PULL 23/25] Reorganize help output of '-display' option

From: Robert Ho The '-display' help information is not very correct. This patch sort it a little. Also, in its help information, reveals what implicit display option will be chosen if no definition. Signed-off-by: Robert Ho Message-Id:

[Qemu-devel] [PULL 19/25] fw_cfg: Make base type "fw_cfg" abstract

From: Markus Armbruster Missed when commit 5712db6 split off "fw_cfg_io" and "fw_cfg_mem". Signed-off-by: Markus Armbruster Message-Id: <1469777353-9383-1-git-send-email-arm...@redhat.com> Reviewed-by: Laszlo Ersek Signed-off-by: Paolo

[Qemu-devel] [PULL 22/25] x86: ioapic: add support for explicit EOI

From: Peter Xu Some old Linux kernels (upstream before v4.0), or any released RHEL kernels has problem in sending APIC EOI when IR is enabled. Meanwhile, many of them only support explicit EOI for IOAPIC, which is only introduced in IOAPIC version 0x20. This patch provide a

[Qemu-devel] [PULL 18/25] block: Cater to iscsi with non-power-of-2 discard

From: Eric Blake Dell Equallogic iSCSI SANs have a very unusual advertised geometry: $ iscsi-inq -e 1 -c $((0xb0)) iscsi://XXX/0 wsnz:0 maximum compare and write length:1 optimal transfer length granularity:0 maximum transfer length:0 optimal transfer length:0 maximum

[Qemu-devel] [PULL 16/25] nbd: Limit nbdflags to 16 bits

From: Eric Blake Rather than asserting that nbdflags is within range, just give it the correct type to begin with :) nbdflags corresponds to the per-export portion of NBD Protocol "transmission flags", which is 16 bits in response to NBD_OPT_EXPORT_NAME and NBD_OPT_GO.

[Qemu-devel] [PULL 15/25] nbd: Fix bad flag detection on server

From: Eric Blake Commit ab7c548e added a check for invalid flags, but used an early return on error instead of properly going through the cleanup label. Signed-off-by: Eric Blake Message-Id: <1469129688-22848-2-git-send-email-ebl...@redhat.com>

[Qemu-devel] [PULL 12/25] qdist: return "(empty)" instead of NULL when printing an empty dist

From: "Emilio G. Cota" Printf'ing a NULL string is undefined behaviour. Avoid it. Reported-by: Peter Maydell Signed-off-by: Emilio G. Cota Message-Id: <1469459025-23606-4-git-send-email-c...@braap.org> Signed-off-by: Paolo Bonzini

[Qemu-devel] [PULL 14/25] i2c: fix migration regression introduced by broadcast support

From: Igor Mammedov QEMU fails migration with following error: qemu-system-x86_64: Missing section footer for i2c_bus qemu-system-x86_64: load of migration failed: Invalid argument when migrating from: qemu-system-x86_64-v2.6.0 -m 256M rhel72.img -M pc-i440fx-2.6 to

[Qemu-devel] [PULL 13/25] mptsas: really fix migration compatibility

Commit 2e2aa316 removed internal flag msi_in_use, but it existed in vmstate. Restore it for migration to older QEMU versions. Reported-by: Amit Shah Suggested-by: Amit Shah Cc: Markus Armbruster Cc: Marcel Apfelbaum

[Qemu-devel] [PULL 11/25] qdist: use g_realloc_n instead of g_realloc

From: "Emilio G. Cota" While at it, remove the unnecessary parentheses around dist->size. Signed-off-by: Emilio G. Cota Message-Id: <1469459025-23606-3-git-send-email-c...@braap.org> Signed-off-by: Paolo Bonzini --- util/qdist.c | 4 ++--

[Qemu-devel] [PULL 20/25] apic: fix broken migration for kvm-apic

From: Igor Mammedov commit f6e98444 (apic: Use apic_id as apic's migration instance_id) breaks migration when in kernel irqchip is used for 2.6 and older machine types. It applies compat property only for userspace 'apic' type instead of applying it to all apic types

[Qemu-devel] [PULL 07/25] util: Drop inet_listen()

From: Cao jin Since commit e65c67e4, inet_listen() is not used anymore, and all inet listen operation goes through QIOChannel. Cc: Daniel P. Berrange Cc: Gerd Hoffmann Cc: Paolo Bonzini Cc: Eric Blake

[Qemu-devel] [PULL 06/25] util: drop unix_nonblocking_connect()

From: Cao jin It is never used; all nonblocking connect now goes through socket_connect(), which calls unix_connect_addr(). Cc: Daniel P. Berrange Cc: Gerd Hoffmann Cc: Paolo Bonzini Signed-off-by: Cao jin

[Qemu-devel] [PULL 10/25] qdist: fix memory leak during binning

From: "Emilio G. Cota" In qdist_bin__internal(), to->entries is initialized to a 1-element array, which we then leak when n == from->n. Fix it. Signed-off-by: Emilio G. Cota Message-Id: <1469459025-23606-2-git-send-email-c...@braap.org> Signed-off-by: Paolo

[Qemu-devel] [PULL 08/25] qht: do not segfault when gathering stats from an uninitialized qht

From: "Emilio G. Cota" So far, QHT functions assume that the passed qht has previously been initialized--otherwise they segfault. This patch makes an exception for qht_statistics_init, with the goal of simplifying calling code. For instance, qht_statistics_init is called from

[Qemu-devel] [PULL 17/25] osdep: Document differences in rounding macros

From: Eric Blake Make it obvious which macros are safe in which situations. Useful since QEMU_ALIGN_UP and ROUND_UP both purport to do the same thing, but differ on whether the alignment must be a power of 2. Signed-off-by: Eric Blake Message-Id:

[Qemu-devel] [PULL 04/25] checkpatch: add check for bzero

Tested-By: Peter Xu Signed-off-by: Paolo Bonzini --- scripts/checkpatch.pl | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl index afa7f79..b7cb4ab 100755 --- a/scripts/checkpatch.pl +++

[Qemu-devel] [PULL 00/25] Misc QEMU fixes for 2016-08-02

The following changes since commit cc0100f464c94bf80ad36cd432f4a1ed58126b60: MAINTAINERS: Update the Xilinx maintainers (2016-08-01 15:31:32 +0100) are available in the git repository at: git://github.com/bonzini/qemu.git tags/for-upstream for you to fetch changes up to

[Qemu-devel] [PULL 09/25] target-i386: fix typo in xsetbv implementation

From: Dave Hansen QEMU 2.6 added support for the XSAVE family of instructions, which includes the XSETBV instruction which allows setting the XCR0 register. But, when booting Linux kernels with XSAVE support enabled, I was getting very early crashes where the

[Qemu-devel] [PULL 03/25] fix qemu exit on memory hotplug when allocation fails at prealloc time

From: Igor Mammedov When adding hostmem backend at runtime, QEMU might exit with error: "os_mem_prealloc: Insufficient free host memory pages available to allocate guest RAM" It happens due to os_mem_prealloc() not handling errors gracefully. Fix it by passing errp

[Qemu-devel] [PULL 02/25] numa: set the memory backend "is_mapped" field

From: Greg Kurz Commit 2aece63 "hostmem: detect host backend memory is being used properly" added a way to know if a memory backend is busy or available for use. It caused a slight regression if we pass the same backend to a NUMA node and to a pc-dimm device: -m

[Qemu-devel] [PULL 01/25] util/qht: Document memory ordering assumptions

It is naturally expected that some memory ordering should be provided around qht_insert() and qht_lookup(). Document these assumptions in the header file and put some comments in the source to denote how that memory ordering requirements are fulfilled. Signed-off-by: Paolo Bonzini

[Qemu-devel] [PULL 05/25] util: drop inet_nonblocking_connect()

From: Cao jin It is never used; all nonblocking connect now goes through socket_connect(), which calls inet_connect_addr(). Cc: Daniel P. Berrange Cc: Gerd Hoffmann Cc: Paolo Bonzini Signed-off-by: Cao jin

Re: [Qemu-devel] [PATCH v5 11/13] cpu-exec-common: Introduce async_safe_run_on_cpu()

On Tue, Aug 02, 2016 at 18:27:42 +0100, Alex Bennée wrote: > From: Sergey Fedorov > > This patch is based on the ideas found in work of KONRAD Frederic [1], > Alex Bennée [2], and Alvise Rigo [3]. > > This mechanism allows to perform an operation safely in a quiescent >

Re: [Qemu-devel] [PATCH] numa: set the memory backend "is_mapped" field

- Original Message - > From: "Eduardo Habkost" > To: "Igor Mammedov" > Cc: "Greg Kurz" , "Thomas Huth" , > qemu-devel@nongnu.org, pbonz...@redhat.com > Sent: Tuesday, August 2, 2016 8:00:06 PM > Subject: Re:

Re: [Qemu-devel] [PULL 09/10] docker: Don't start a container that doesn't exist

On 19/07/2016 16:31, Fam Zheng wrote: > Image building targets are dependencies of test running targets, so when > a docker image doesn't exist, it means it's skipped (due to dependency > checks in pre script). Therefore, skip the test too. > > Signed-off-by: Fam Zheng >

[Qemu-devel] [PATCH for-2.7] atapi: fix halted DMA reset

Followup to 87ac25fd, this time for ATAPI DMA. Reported-by: Paolo Bonzini Signed-off-by: John Snow --- hw/ide/atapi.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/ide/atapi.c b/hw/ide/atapi.c index 95056d9..6189675 100644 --- a/hw/ide/atapi.c

Re: [Qemu-devel] [PATCH v5 13/13] cpu-exec: replace cpu->queued_work with GArray

On Tue, Aug 02, 2016 at 18:27:44 +0100, Alex Bennée wrote: > Under times of high memory stress the additional small mallocs by a > linked list are source of potential memory fragmentation. As we have > worked hard to avoid mallocs elsewhere when queuing work we might as > well do the same for the

Re: [Qemu-devel] [PATCH] trace: add syslog tracing backend

* Daniel P. Berrange (berra...@redhat.com) wrote: > On Tue, Aug 02, 2016 at 04:06:42PM +0100, Paul Durrant wrote: > > This patch adds a tracing backend which sends output using syslog(). > > The syslog backend is limited to POSIX compliant systems. > > > > openlog() is called with facility set to

Re: [Qemu-devel] [PATCH] xen: use a common function for pv and hvm guest backend register calls

On Tue, 2 Aug 2016, Gerd Hoffmann wrote: > On Di, 2016-08-02 at 08:32 +0200, Juergen Gross wrote: > > Instead of calling xen_be_register() for each supported backend type > > for hvm and pv guests in their machine init functions use a common > > function in order not to have to add new backends

Re: [Qemu-devel] [PATCH] xen: use a common function for pv and hvm guest backend register calls

On Tue, 2 Aug 2016, Juergen Gross wrote: > Instead of calling xen_be_register() for each supported backend type > for hvm and pv guests in their machine init functions use a common > function in order not to have to add new backends twice. > > This at once fixes the error that hvm domains

Re: [Qemu-devel] [Patch v1 00/29] s390x CPU models: exposing features

> On Tue, Aug 02, 2016 at 01:58:46PM +0200, David Hildenbrand wrote: > [...] > > So we have: > > a) "query-cpu-model-expansion" - tell us what the "host" or another CPU > >model looks like. Either falling back to a static model or > >completely exposing all properties. > > The

[Qemu-devel] [RFC v5 7/7] hw/arm/virt-acpi-build: Add ITS description in ACPI MADT table

This patch exposes the GICv3 ITS to the ACPI guest. The ITS structure is added to the MADT table. Signed-off-by: Eric Auger --- v5: new Tested with Tomasz' kernel series on guest side: - [PATCH V7 0/8] Introduce ACPI world to ITS, https://lkml.org/lkml/2016/6/20/321 -

Re: [Qemu-devel] [PATCH] target-i386: add more Intel AVX-512 instructions support

On Tue, Aug 02, 2016 at 04:10:39PM +0800, Luwei Kang wrote: > Add more AVX512 feature bits, include AVX512DQ, AVX512IFMA, > AVX512BW, AVX512VL, AVX512VBMI. Its spec can be found at: > https://software.intel.com/sites/default/files/managed/b4/3a/319433-024.pdf > > Signed-off-by: Luwei Kang

[Qemu-devel] [RFC v5 6/7] arm/virt: Add ITS to the virt board

From: Pavel Fedin If supported by the configuration, ITS will be added automatically. This patch also renames v2m_phandle to msi_phandle because it's now used by both MSI implementations. Signed-off-by: Pavel Fedin Signed-off-by: Eric Auger

[Qemu-devel] [RFC v5 2/7] target-arm: move gicv3_class_name from machine to kvm_arm.h

Machine.c contains code related to migration. Let's move gicv3_class_name to kvm_arm.h instead. Signed-off-by: Eric Auger Suggested-by: Peter Maydell --- v4 -> v5: - add #include "qemu/error-report.h" - rebased on target-arm: Fix unreachable

[Qemu-devel] [RFC v5 4/7] target-arm/kvm: Pass requester ID to MSI routing functions

From: Pavel Fedin Introduce global kvm_arm_msi_use_devid flag and pass device IDs in kvm_arch_fixup_msi_route(). Device IDs are required by the ITS. Signed-off-by: Pavel Fedin Signed-off-by: Eric Auger --- v3 -> v4: - OR

[Qemu-devel] [RFC v5 5/7] hw/intc/arm_gicv3_its: Implement support for in-kernel ITS emulation

From: Pavel Fedin The ITS control frame is in-kernel emulated while accesses to the GITS_TRANSLATER are mediated through the KVM_SIGNAL_MSI ioctl (MSI direct MSI injection advertised by the CAP_SIGNAL_MSI capability) the kvm_gsi_direct_mapping is explicitly set to false to

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