Fix inconsistent irq status, because of this in the trace logs, for e.g.
LSI status was 0x7, i.e. XICS_STATUS_ASSERTED, XICS_STATUS_SENT and
XICS_STATUS_REJECTED all set, which did not make sense. So the REJECTED
would have been set in earlier interrupt cycle, and then asserted and
sent in this
From: Benjamin Herrenschmidt
This will make life easier for dealing with dynamically configured
ICSes such as PHB3
Signed-off-by: Benjamin Herrenschmidt
Reviewed-by: David Gibson
Signed-off-by: Nikunj A Dadhania
sPAPR xics related changes required for powernv platform. This brings
infrastructure to get the xics native mode for powernv. Tested pseries guests
in KVM and TCG mode. These are the pending patches of the original set.
Changelog v3:
* Added ICP_Native and XICSNative in "native" implementation
tlbie (BookS) and tlbivax (BookE) plus the H_CALLs(pseries) should have
a global effect.
Introduces TLB_NEED_GLOBAL_FLUSH flag. During lazy tlb flush, after
taking care of pending local flushes, check broadcast flush(at context
synchronizing event ptesync/tlbsync, etc) is needed. Depending on the
We flush the qemu TLB lazily. check_tlb_flush is called whenever we hit
a context synchronizing event or instruction that requires a pending
flush to be performed.
However, we fail to handle broadcast TLB flush operations. In order to
fix that efficiently, we want to differenciate whether
On Sat, 2016-09-17 at 23:31 -0400, G 3 wrote:
> Add the ability to add resolutions from the command-line. This
> patch
> works by
> looking for a property called 'resolutions' in the options node of
> OpenBIOS.
> If it is found all the resolutions are parsed and loaded.
>
> Example
PowerPC failed to handle broadcast TLB flush operations. Executing
instructions that are defined architecturally as synchronizing global TLB
should have a global effect.
* tlbie on BookS
* tlbivax on BookE
* H_CALLs (H_REMOVE, H_BULK_REMOVE and H_PROTECT) in case of pseries,
since they
Introduces bit-flag in CPUPPCState::tlb_need_flush:
TLB_NEED_LOCAL_FLUSH (0x1) - Flush local tlb
This would indicate a pending local tlb flush (isync instructions,
interrupts, ...)
Signed-off-by: Nikunj A Dadhania
---
target-ppc/cpu.h | 1 +
Hi,
sorry for replying late(was in vacation).
On 09/14/2016 07:59 PM, Marcel Apfelbaum wrote:
On 09/14/2016 12:14 PM, Cao jin wrote:
It cannot guarantee all pci devices will free the allocated resource in
its .realize function on realize failure.
CC: Michael S. Tsirkin
401 - 409 of 409 matches
Mail list logo