Re: [Qemu-devel] [RFC 1/4] spapr_pci: Delegate placement of PCI host bridges to machine type

On 07/10/16 16:10, David Gibson wrote: > On Fri, Oct 07, 2016 at 02:57:43PM +1100, Alexey Kardashevskiy wrote: >> On 06/10/16 14:03, David Gibson wrote: >>> The 'spapr-pci-host-bridge' represents the virtual PCI host bridge (PHB) >>> for a PAPR guest. Unlike on x86, it's routine on Power (both

Re: [Qemu-devel] [RFC v2] libvirt vGPU QEMU integration

Ping.. Pulling the questions at the top. >> Will libvirt report 'description' RO attribute, its output would be >> string, so that user could be able to see the configuration of that >> profile? >> > > Daniel, > Waiting for your input on this. > >> We can have 'class' as optional attribute. So

Re: [Qemu-devel] [RFC 1/4] spapr_pci: Delegate placement of PCI host bridges to machine type

On Fri, Oct 07, 2016 at 02:57:43PM +1100, Alexey Kardashevskiy wrote: > On 06/10/16 14:03, David Gibson wrote: > > The 'spapr-pci-host-bridge' represents the virtual PCI host bridge (PHB) > > for a PAPR guest. Unlike on x86, it's routine on Power (both bare metal > > and PAPR guests) to have

Re: [Qemu-devel] [PATCH v4 05/20] ppc/pnv: add a PnvCore object

On Mon, Oct 03, 2016 at 09:24:41AM +0200, Cédric Le Goater wrote: > This is largy inspired by sPAPRCPUCore with some simplification, no > hotplug for instance. But the differences are small and the objects > could possibly be merged. > > A set of PnvCore objects is added to the PnvChip and the

Re: [Qemu-devel] [PATCH v4 04/20] ppc/pnv: add a PIR handler to PnvChip

On Mon, Oct 03, 2016 at 09:24:40AM +0200, Cédric Le Goater wrote: > The Processor Identification Register (PIR) is a register that holds a > processor identifier which is used for bus transactions (XSCOM) and > for processor differentiation in multiprocessor systems. It also used > in the

Re: [Qemu-devel] [PATCH v4 03/20] ppc/pnv: add a core mask to PnvChip

On Fri, 2016-10-07 at 15:32 +1100, David Gibson wrote: > On Mon, Oct 03, 2016 at 09:24:39AM +0200, Cédric Le Goater wrote: > > This will be used to build real HW ids for the cores and enforce > some > > limits on the available cores per chip. > > Is there actually a practical reason to allow the

Re: [Qemu-devel] [PATCH v4 01/20] ppc/pnv: add skeleton PowerNV platform

On Mon, Oct 03, 2016 at 09:24:37AM +0200, Cédric Le Goater wrote: > From: Benjamin Herrenschmidt > > The goal is to emulate a PowerNV system at the level of the skiboot > firmware, which loads the OS and provides some runtime services. Power > Systems have a lower

Re: [Qemu-devel] [PATCH v4 01/20] ppc/pnv: add skeleton PowerNV platform

On Fri, Oct 07, 2016 at 03:14:48PM +1100, David Gibson wrote: > On Mon, Oct 03, 2016 at 09:24:37AM +0200, Cédric Le Goater wrote: > > From: Benjamin Herrenschmidt > > > > The goal is to emulate a PowerNV system at the level of the skiboot > > firmware, which loads the

Re: [Qemu-devel] [PATCH v4 03/20] ppc/pnv: add a core mask to PnvChip

On Mon, Oct 03, 2016 at 09:24:39AM +0200, Cédric Le Goater wrote: > This will be used to build real HW ids for the cores and enforce some > limits on the available cores per chip. Is there actually a practical reason to allow the user (or machine type) to override the default core mask? > >

Re: [Qemu-devel] [PATCH v4 02/20] ppc/pnv: add a PnvChip object

On Mon, Oct 03, 2016 at 09:24:38AM +0200, Cédric Le Goater wrote: > This is is an abstraction of a POWER8 chip which is a set of cores > plus other 'units', like the pervasive unit, the interrupt controller, > the memory controller, the on-chip microcontroller, etc. The whole can > be seen as a

Re: [Qemu-devel] [PATCH v5] MC146818 RTC: coordinate guest clock base to destination host after migration

On Mon, Sep 26, 2016 at 08:41:01PM +0800, Junlian Bell wrote: > qemu tracks guest time based on vector [base_rtc, last_update], in which > last_update stands for a monotonic tick which is actually uptime of the > host. > according to rtc implementation codes of recent releases and upstream, >

Re: [Qemu-devel] [RFC 1/4] spapr_pci: Delegate placement of PCI host bridges to machine type

On 06/10/16 14:03, David Gibson wrote: > The 'spapr-pci-host-bridge' represents the virtual PCI host bridge (PHB) > for a PAPR guest. Unlike on x86, it's routine on Power (both bare metal > and PAPR guests) to have numerous independent PHBs, each controlling a > separate PCI domain. > > There

Re: [Qemu-devel] [Qemu-block] [PATCH] block/gluster: add support for SEEK_DATA/SEEK_HOLE

On Thu, Oct 06, 2016 at 05:09:59PM -0500, Eric Blake wrote: > On 03/07/2016 01:14 PM, Eric Blake wrote: > > [adding qemu-devel; ALL patches must cc qemu-devel even when sent to > > another list] > > > > On 03/07/2016 11:04 AM, Niels de Vos wrote: > >> GlusterFS 3.8 contains support for SEEK_DATA

[Qemu-devel] [PATCH 1/1] block: add gluster ifdef guard checks for SEEK_DATA/SEEK_HOLE support

Add checks to see if the system compiling QEMU has support for SEEK_HOLE/SEEK_DATA. If the system does not, we will flag that seek data is unsupported in gluster. Note: this is not a check on whether the gluster server itself supports SEEK_DATA (that is already done during runtime), but rather

Re: [Qemu-devel] [QEMU PATCH v5 2/6] migration: spapr_drc: defined VMStateDescription struct

On Wed, Oct 05, 2016 at 12:38:53PM +0100, Dr. David Alan Gilbert wrote: > * Jianjun Duan (du...@linux.vnet.ibm.com) wrote: > > To manage hotplug/unplug of dynamic resources such as PCI cards, > > memory, and CPU on sPAPR guests, a firmware abstraction known as > > a Dynamic Resource Connector

Re: [Qemu-devel] [QEMU PATCH v5 2/6] migration: spapr_drc: defined VMStateDescription struct

On Mon, Oct 03, 2016 at 11:24:53AM -0700, Jianjun Duan wrote: > To manage hotplug/unplug of dynamic resources such as PCI cards, > memory, and CPU on sPAPR guests, a firmware abstraction known as > a Dynamic Resource Connector (DRC) is used to assign a particular > dynamic resource to the guest,

Re: [Qemu-devel] [QEMU PATCH v5 1/6] migration: alternative way to set instance_id in SaveStateEntry

On Wed, Oct 05, 2016 at 09:44:57AM -0700, Jianjun Duan wrote: > Please see comments below: > > On 10/05/2016 03:12 AM, Dr. David Alan Gilbert wrote: > > * Jianjun Duan (du...@linux.vnet.ibm.com) wrote: > >> In QOM(QEMU Object Model) migrated objects are identified with instance_id > >> which is

Re: [Qemu-devel] [QEMU PATCH v5 5/6] migration: spapr: migrate ccs_list in spapr state

On Mon, Oct 03, 2016 at 11:24:56AM -0700, Jianjun Duan wrote: > ccs_list in spapr state maintains the device tree related > information on the rtas side for hotplugged devices. In racing > situations between hotplug events and migration operation, a rtas > hotplug event could be migrated from the

Re: [Qemu-devel] [QEMU PATCH v5 4/6] migration: migrate QTAILQ

On Thu, Oct 06, 2016 at 08:01:56PM +0100, Dr. David Alan Gilbert wrote: > * Jianjun Duan (du...@linux.vnet.ibm.com) wrote: > > > > > > On 10/05/2016 09:56 AM, Dr. David Alan Gilbert wrote: > > > * Jianjun Duan (du...@linux.vnet.ibm.com) wrote: > > >> Currently we cannot directly transfer a

[Qemu-devel] [PATCH v2] tap-bsd: OpenBSD uses tap(4) now

Update the tap-bsd code now that OpenBSD uses tap(4). Signed-off-by: Brad Smith --- v2: Allow the code to deal with newer vs older OpenBSD releases diff --git a/net/tap-bsd.c b/net/tap-bsd.c index c506ac3..6c96922 100644 --- a/net/tap-bsd.c +++ b/net/tap-bsd.c @@ -35,6 +35,10

Re: [Qemu-devel] [PATCH] qtest: add read/write accessors with a specific endianness

On Thu, Oct 06, 2016 at 12:03:34PM +0100, Peter Maydell wrote: > On 6 October 2016 at 04:38, David Gibson wrote: > > On Wed, Oct 05, 2016 at 05:31:07AM -0700, Peter Maydell wrote: > >> On 4 October 2016 at 16:43, David Gibson > >> wrote:

Re: [Qemu-devel] [PATCH] tests: minor cleanups in usb-hcd-uhci-test

On Thu, Oct 06, 2016 at 04:50:48PM +0200, Laurent Vivier wrote: > Two minor cleanups: > - exit gracefully in case on unsupported target, > - put machine command line in a constant to avoid > to duplicate it. > > Signed-off-by: Laurent Vivier Reviewed-by: David Gibson

Re: [Qemu-devel] [Bug 1630723] [NEW] UART writes to netduino2/stm32f205-soc disappear

QEMU only supports the Netduino (not Netduino 2) it is possible that the base addresses are different and that is why you aren't seeing the serial output. Thanks, Alistair On Wed, Oct 5, 2016 at 11:56 AM, Seth wrote: > Public bug reported: > > Writes to UART 2 and 3

Re: [Qemu-devel] [RFC 1/4] spapr_pci: Delegate placement of PCI host bridges to machine type

On Thu, Oct 06, 2016 at 11:36:12AM +0200, Laurent Vivier wrote: > > > On 06/10/2016 05:03, David Gibson wrote: > > The 'spapr-pci-host-bridge' represents the virtual PCI host bridge (PHB) > > for a PAPR guest. Unlike on x86, it's routine on Power (both bare metal > > and PAPR guests) to have

Re: [Qemu-devel] Simulating 3 chips on one board

On Wed, Sep 28, 2016 at 4:36 PM, Alex Bennée wrote: > > Seth K writes: > >> I need to simulate 3 chips that are on one board and that talk to each >> other through UART, SPI and GPIO. The chips verify each other's work, and I >> need to be able to

Re: [Qemu-devel] [PATCH] qtest: ask endianness of the target in qtest_init()

On Thu, Oct 06, 2016 at 10:46:22PM +0200, Greg Kurz wrote: > On Thu, 6 Oct 2016 20:56:58 +0200 > Laurent Vivier wrote: > > > The target endianness is not deduced anymore from > > the architecture name but asked directly to the guest, > > using a new qtest command:

Re: [Qemu-devel] [PATCH] qtest: add read/write accessors with a specific endianness

On Thu, Oct 06, 2016 at 05:59:00PM +0200, Laurent Vivier wrote: > > > On 06/10/2016 17:41, Peter Maydell wrote: > > On 6 October 2016 at 16:36, Paolo Bonzini wrote: > >> > >> > >> On 06/10/2016 16:11, Greg Kurz wrote: > >>> FWIW, Cedric had another proposal which apparently

Re: [Qemu-devel] [PATCH] qtest: add read/write accessors with a specific endianness

On Thu, Oct 06, 2016 at 05:36:32PM +0200, Paolo Bonzini wrote: > > > On 06/10/2016 16:11, Greg Kurz wrote: > > FWIW, Cedric had another proposal which apparently went unnoticed: > > > > > > > > The idea is to add an optional endianness argument

Re: [Qemu-devel] [PATCH] qtest: add read/write accessors with a specific endianness

On Thu, Oct 06, 2016 at 04:11:42PM +0200, Greg Kurz wrote: > On Thu, 6 Oct 2016 12:03:34 +0100 > Peter Maydell wrote: > > > On 6 October 2016 at 04:38, David Gibson > > wrote: > > > On Wed, Oct 05, 2016 at 05:31:07AM -0700, Peter Maydell

Re: [Qemu-devel] [PATCH] qtest: add read/write accessors with a specific endianness

On Thu, Oct 06, 2016 at 11:47:36AM +0100, Peter Maydell wrote: > On 6 October 2016 at 04:45, David Gibson wrote: > > On Wed, Oct 05, 2016 at 07:20:52AM -0700, Peter Maydell wrote: > >> On 5 October 2016 at 07:00, Cédric Le Goater wrote: > >> > On

Re: [Qemu-devel] [PATCHv3] Reducing stack frame size in stream_process_mem2s()

On Thu, Oct 6, 2016 at 11:16 AM, wrote: > From: Rutuja Shah > > This patch allocates memory for txbuf in struct Stream rather than the stack. > As a result, the stack frame size is reduced of stream_process_mem2s(). > > Signed-off-by: Rutuja Shah

Re: [Qemu-devel] Baremetal Netduino2 -- cannot output on UARTs 2-4

On Thu, Oct 6, 2016 at 2:52 PM, Seth K wrote: > You're right, qemu was not happy with that command line, but your pointer > really helped me out, thank you!! I think a combination of my > misunderstanding what the arguments meant, and a weird bug with this chip, > resulted in

Re: [Qemu-devel] [PATCH v2 09/11] blockjob: add block_job_start

On 10/05/2016 11:17 AM, Kevin Wolf wrote: Am 01.10.2016 um 00:00 hat John Snow geschrieben: Instead of automatically starting jobs at creation time via backup_start et al, we'd like to return a job object pointer that can be started manually at later point in time. For now, add the

Re: [Qemu-devel] [Qemu-block] [PATCH] block/gluster: add support for SEEK_DATA/SEEK_HOLE

On 03/07/2016 01:14 PM, Eric Blake wrote: > [adding qemu-devel; ALL patches must cc qemu-devel even when sent to > another list] > > On 03/07/2016 11:04 AM, Niels de Vos wrote: >> GlusterFS 3.8 contains support for SEEK_DATA and SEEK_HOLE. This makes >> it possible to detect sparse areas in

Re: [Qemu-devel] Baremetal Netduino2 -- cannot output on UARTs 2-4

You're right, qemu was not happy with that command line, but your pointer really helped me out, thank you!! I think a combination of my misunderstanding what the arguments meant, and a weird bug with this chip, resulted in my complete confusion. Using the command line:

[Qemu-devel] [Bug 1174654] Re: qemu-system-x86_64 takes 100% CPU after host machine resumed from suspend to ram

I observed a similar behavior with a different application on a Windows host. The application is using the multimedia timer. In my case it seems that the timer is catching up the ticks missed during suspend to ram after resume. The timer thread performing the callbacks has high-priority on

Re: [Qemu-devel] Adding Save States menu items

On Oct 6, 2016, at 4:47 PM, Peter Maydell wrote: > On 6 October 2016 at 12:59, Eric Blake wrote: >> Libvirt also learned that the qemu 'migrate-to-disk' format (used by >> 'savevm' or 'migrate') is NOT self-descriptive - in order to fully and >> safely revert to an earlier

[Qemu-devel] [PATCH v5] tests: add a m25p80 test

This test uses the palmetto platform and the Aspeed SPI controller to test the m25p80 flash module device model. The flash model is defined by the platform (n25q256a) and it would be nice to find way to control it, using a property probably. Signed-off-by: Cédric Le Goater

Re: [Qemu-devel] [PATCH] qtest: ask endianness of the target in qtest_init()

On Thu, 6 Oct 2016 20:56:58 +0200 Laurent Vivier wrote: > The target endianness is not deduced anymore from > the architecture name but asked directly to the guest, > using a new qtest command: "endianness". As it can't > change (this is the value of TARGET_WORDS_BIGENDIAN),

Re: [Qemu-devel] Adding Save States menu items

On 6 October 2016 at 12:59, Eric Blake wrote: > Libvirt also learned that the qemu 'migrate-to-disk' format (used by > 'savevm' or 'migrate') is NOT self-descriptive - in order to fully and > safely revert to an earlier state, you HAVE to store the command line > (or a way to

Re: [Qemu-devel] [PATCH] qtest: ask endianness of the target in qtest_init()

On 6 October 2016 at 11:56, Laurent Vivier wrote: > The target endianness is not deduced anymore from > the architecture name but asked directly to the guest, > using a new qtest command: "endianness". As it can't > change (this is the value of TARGET_WORDS_BIGENDIAN), > we

Re: [Qemu-devel] Adding Save States menu items

On 10/06/2016 03:10 PM, Programmingkid wrote: > > On Oct 6, 2016, at 3:59 PM, Eric Blake wrote: > >> On 10/06/2016 09:22 AM, Programmingkid wrote: >>> Would you accept a patch that added "Save State" and "Restore State" menu >>> items to the cocoa interface? They would allow the user to save

Re: [Qemu-devel] [PATCH v2 04/11] blockjobs: Always use block_job_get_aio_context

On 10/05/2016 10:02 AM, Kevin Wolf wrote: Am 01.10.2016 um 00:00 hat John Snow geschrieben: There are a few places where we're fishing it out for ourselves. Let's not do that and instead use the helper. Signed-off-by: John Snow That change makes a difference when the

Re: [Qemu-devel] Adding Save States menu items

On Oct 6, 2016, at 3:59 PM, Eric Blake wrote: > On 10/06/2016 09:22 AM, Programmingkid wrote: >> Would you accept a patch that added "Save State" and "Restore State" menu >> items to the cocoa interface? They would allow the user to save the running >> state of the emulator. > > Doesn't

Re: [Qemu-devel] Adding Save States menu items

On 10/06/2016 11:17 AM, Paolo Bonzini wrote: > > > On 06/10/2016 18:04, Programmingkid wrote: >> 'Save State...' would call something equivalent to the monitor command >> savevm. >> It would display a dialog box asking to give a name to this save. The default >> name would probably be "save

Re: [Qemu-devel] Adding Save States menu items

On 10/06/2016 09:22 AM, Programmingkid wrote: > Would you accept a patch that added "Save State" and "Restore State" menu > items to the cocoa interface? They would allow the user to save the running > state of the emulator. Doesn't virt-manager already do this? What do we gain by duplicating

Re: [Qemu-devel] [QEMU PATCH v5 4/6] migration: migrate QTAILQ

On 10/06/2016 12:01 PM, Dr. David Alan Gilbert wrote: > * Jianjun Duan (du...@linux.vnet.ibm.com) wrote: >> >> >> On 10/05/2016 09:56 AM, Dr. David Alan Gilbert wrote: >>> * Jianjun Duan (du...@linux.vnet.ibm.com) wrote: Currently we cannot directly transfer a QTAILQ instance because of the

Re: [Qemu-devel] [PATCH v5 14/14] cryptodev: rename cryptodev stuff

On 10/06/2016 06:36 AM, Gonglei wrote: > Remove qcrypto and/or QCRYPTO prefix in order to > make the name shorter because it doesn't repeat > any information. > > Signed-off-by: Gonglei > --- > backends/cryptodev-builtin.c | 84 This file

Re: [Qemu-devel] [PATCH v3 8/8] vmxnet3: remove unnecessary internal msix state flag

> On 6 Oct 2016, at 17:43, Dr. David Alan Gilbert wrote: > > * Dmitry Fleytman (dmi...@daynix.com) wrote: >> >>> On 30 Sep 2016, at 15:08 PM, Markus Armbruster wrote: >>> >>> Cao jin writes: >>> > On 09/29/2016 10:42 PM,

Re: [Qemu-devel] [QEMU PATCH v5 4/6] migration: migrate QTAILQ

* Jianjun Duan (du...@linux.vnet.ibm.com) wrote: > > > On 10/05/2016 09:56 AM, Dr. David Alan Gilbert wrote: > > * Jianjun Duan (du...@linux.vnet.ibm.com) wrote: > >> Currently we cannot directly transfer a QTAILQ instance because of the > >> limitation in the migration code. Here we introduce

[Qemu-devel] [PATCH] qtest: ask endianness of the target in qtest_init()

The target endianness is not deduced anymore from the architecture name but asked directly to the guest, using a new qtest command: "endianness". As it can't change (this is the value of TARGET_WORDS_BIGENDIAN), we store it to not have to ask every time we want to know if we have to byte-swap a

Re: [Qemu-devel] [PATCH 05/10] qemu-tech: document lazy condition code evaluation in cpu.h

On 6 October 2016 at 16:24, Paolo Bonzini wrote: > Unlike the other sections, they are pretty specific to a particular CPU. > > Signed-off-by: Paolo Bonzini > --- > qemu-tech.texi | 25 - > target-cris/cpu.h | 7 +++ >

Re: [Qemu-devel] [PATCH 06/10] qemu-tech: move user mode emulation features from qemu-tech

On Thu, Oct 06, 2016 at 05:24:19PM +0200, Paolo Bonzini wrote: > These are interesting for users too, since nowadays most > qemu-user users are going to be somewhat technical rather than > just people that want to run Wine. Some detail is lost, on > the other hand some of the information I

Re: [Qemu-devel] [PATCH v2 02/11] blockjob: centralize QMP event emissions

On 10/06/2016 02:16 PM, Eric Blake wrote: On 10/06/2016 11:57 AM, John Snow wrote: Mirrors "internal bitmaps," too. I can rig it such that if a job has no ID, it will cease to show up via query and no longer emit events. Downside: Whether or not a device is busy or can accept another job

[Qemu-devel] [PATCHv3] Reducing stack frame size in stream_process_mem2s()

From: Rutuja Shah This patch allocates memory for txbuf in struct Stream rather than the stack. As a result, the stack frame size is reduced of stream_process_mem2s(). Signed-off-by: Rutuja Shah Reviewed-by: Edgar E. Iglesias

Re: [Qemu-devel] [PATCH v2 02/11] blockjob: centralize QMP event emissions

On 10/06/2016 11:57 AM, John Snow wrote: > Mirrors "internal bitmaps," too. > > I can rig it such that if a job has no ID, it will cease to show up via > query and no longer emit events. > > Downside: Whether or not a device is busy or can accept another job > becomes opaque to the management

Re: [Qemu-devel] [PATCH 3/4] sockets: add AF_VSOCK support

On 10/06/2016 11:40 AM, Stefan Hajnoczi wrote: > Add the AF_VSOCK address family so that qemu-ga will be able to use > virtio-vsock. > > The AF_VSOCK address family uses address tuples. The cid is > the unique identifier comparable to an IP address. AF_VSOCK does not > use name

Re: [Qemu-devel] [PATCH 0/3] preliminaries for GICv3 virt support

On 6 October 2016 at 18:48, Peter Maydell wrote: > Trying the kvm-unit-tests, the simple 'setup' test > works OK, but the one which tries to PSCI boot other SMP cores > fails. This is probably because the outer QEMU is intercepting those PSCI calls and executing them

Re: [Qemu-devel] [Qemu-block] [PATCH v14 10/21] qapi: permit auto-creating nested structs

On 10/06/2016 10:30 AM, Kevin Wolf wrote: >>> So, considering that it is a purely internally used type not visible in >>> QMP, would it make sense to change NetLegacy to be a flat union instead, >>> with NetLegacyOptions as the common base? Then you get the same flat >>> namespace that we always

Re: [Qemu-devel] Adding Save States menu items

On Oct 6, 2016, at 1:49 PM, Peter Maydell wrote: > On 6 October 2016 at 18:43, Programmingkid wrote: >> @ Peter I don't know how to implement this in GTK. The GTK GUI maintainer >> doesn't even >> reply to my emails. Could we start this in Cocoa and then port it to

Re: [Qemu-devel] Adding Save States menu items

On 6 October 2016 at 18:43, Programmingkid wrote: > @ Peter I don't know how to implement this in GTK. The GTK GUI maintainer > doesn't even > reply to my emails. Could we start this in Cocoa and then port it to GTK? I > think > the time is right. QEMU has progressed

Re: [Qemu-devel] [PATCH 0/3] preliminaries for GICv3 virt support

On 6 October 2016 at 17:59, Edgar E. Iglesias wrote: > On Thu, Oct 06, 2016 at 02:21:04PM +0100, Peter Maydell wrote: >> This set of three straightforward patches is a preliminary >> for adding virtualization support to the GICv3 emulation: >> * add a (nop

Re: [Qemu-devel] [PATCH V6 2/2] arm: virt: add PMU property to mach-virt machine type

On Tue, 2016-10-04 at 17:38 -0400, Wei Huang wrote: > CPU vPMU is now turned off by default, but it was ON in virt-2.7 > machine type. To solve this problem, this patch adds a PMU option > in machine state, which is used to control CPU's vPMU status. This > PMU option is not exposed to command

Re: [Qemu-devel] [PATCH V6 1/2] arm64: Add an option to turn on/off vPMU support

On Tue, 2016-10-04 at 17:38 -0400, Wei Huang wrote: > This patch adds a pmu=[on/off] option to enable/disable vPMU support > in guest vCPU. This option is only available for cortex-a57/cortex-53/ > host under both TCG and KVM modes, but unavailable on ARMv7 and other > processors. It allows virt

Re: [Qemu-devel] Adding Save States menu items

On Oct 6, 2016, at 12:17 PM, Paolo Bonzini wrote: > > > On 06/10/2016 18:04, Programmingkid wrote: >> 'Save State...' would call something equivalent to the monitor command >> savevm. >> It would display a dialog box asking to give a name to this save. The default >> name would probably be

Re: [Qemu-devel] vfio/pci: IGD assignment

Hello, I'm just add { PCI_VENDOR_ID_INTEL, 0x9d70, pci_quirk_mf_endpoint_acs }, in drivers/pci/quirks.c for the sound card on intel nuc skylake. This issues is present on broadwell, but it's very strange behaviour because it depends how the windows igd drivers seems to be installed. I'm trying

Re: [Qemu-devel] [PATCH v2 02/11] blockjob: centralize QMP event emissions

On 10/06/2016 03:44 AM, Kevin Wolf wrote: Am 05.10.2016 um 20:49 hat John Snow geschrieben: On 10/05/2016 09:43 AM, Kevin Wolf wrote: Am 01.10.2016 um 00:00 hat John Snow geschrieben: @@ -3136,10 +3111,10 @@ void qmp_block_commit(bool has_job_id, const char *job_id, const char *device,

Re: [Qemu-devel] [PATCH v2 00/12] virtio migration: simplify vmstate helper

On 10/06/2016 05:30 PM, Paolo Bonzini wrote: > > > On 06/10/2016 14:55, Halil Pasic wrote: >> >> Let us simplify a couple of things and get rid of some code duplication. >> >> NOTE: This series is exploring the suggestions of Paolo (I did my best >> to do everything as requested). I still

Re: [Qemu-devel] [PATCH 1/3] target-arm: Implement dummy MDCCINT_EL1

On Thu, Oct 06, 2016 at 02:21:05PM +0100, Peter Maydell wrote: > MDCCINT_EL1 is part of the DCC debugger communication > channel between the CPU and an attached external debugger. > QEMU doesn't implement this, but since Linux may try > to access this register we need to provide at least > a dummy

Re: [Qemu-devel] [PATCH 2/3] target-arm: Add trace events for the generic timers

On Thu, Oct 06, 2016 at 02:21:06PM +0100, Peter Maydell wrote: > Add some useful trace events for the ARM generic timers (notably > the various register writes and the resulting IRQ line state). Reviewed-by: Edgar E. Iglesias > > Signed-off-by: Peter Maydell

[Qemu-devel] [PATCH 0/4] qga: add vsock-listen

This patch series adds virtio-vsock support to the QEMU guest agent. $ qemu-system-x86_64 -device vhost-vsock-pci,guest-cid=3 ... (guest)# qemu-ga -m vsock-listen -p 3:1234 You can interact with the qga monitor using the nc-vsock utility:

Re: [Qemu-devel] [PATCH] MAINTAINERS: qemu-trivial information

On 10/06/2016 09:43 AM, Laurent Vivier wrote: > Information about "qemu-trivial" ML can be found in the wiki: > > http://wiki.qemu.org/Contribute/TrivialPatches > > But the first place where a developer looks is the file MAINTAINERS. > > This also allows the get_maintainer.pl script to

[Qemu-devel] [PATCH 3/4] sockets: add AF_VSOCK support

Add the AF_VSOCK address family so that qemu-ga will be able to use virtio-vsock. The AF_VSOCK address family uses address tuples. The cid is the unique identifier comparable to an IP address. AF_VSOCK does not use name resolution so it's seasy to convert between struct sockaddr_vm

[Qemu-devel] [PATCH 1/5] target-tricore: Added FTOUZ instruction

Converts a 32-bit floating point number to an unsigned int. The result is rounded towards zero. Signed-off-by: Bastian Koppelmann --- target-tricore/fpu_helper.c | 42 ++ target-tricore/helper.h | 1 +

Re: [Qemu-devel] [PATCH] virtio-9p: add reset handler

On Thu, 6 Oct 2016 19:11:03 +0300 "Michael S. Tsirkin" wrote: > On Thu, Oct 06, 2016 at 03:12:10PM +0200, Greg Kurz wrote: > > Virtio devices should implement the VirtIODevice->reset() function to > > perform necessary cleanup actions and to bring the device to a quiescent > >

[Qemu-devel] [PATCH 1/4] qga: drop unused sockaddr in accept(2) call

ga_channel_listen_accept() is currently hard-coded to support only AF_UNIX because the struct sockaddr_un type is used. This function should work with any address family. Drop the sockaddr since the client address is unused and is an optional argument to accept(2). Signed-off-by: Stefan

Re: [Qemu-devel] [PULL 00/15] Migration

Peter Maydell wrote: > On 6 October 2016 at 17:09, Juan Quintela wrote: >> Peter Maydell wrote: >>> On 5 October 2016 at 14:44, Juan Quintela wrote: From: Juan Quintela

[Qemu-devel] [PATCH 0/5] Added 7 instructions to the tricore target

Hi, this series was originally posted by Peer Adelt some time ago[1], but still had some problems which I tried to fix with this patch set. The tricky bits here were the FTOUZ and MADD/MSUB.F instructions. The latter had the problem of not giving back the correct NAN when the result of the

Re: [Qemu-devel] [PULL 00/15] Migration

On 6 October 2016 at 17:23, Juan Quintela wrote: > Peter Maydell wrote: >> Travis builds include OSX, if you're prepared to wait around >> for them to complete before submitting (they're usually about 10 >> hours wall-clock time to complete a

[Qemu-devel] [PATCH 4/5] target-tricore: Added new JNE instruction variant

From: Peer Adelt If D[15] is != sign_ext(const4) then PC will be set to (PC + zero_ext(disp4 + 16)). [BK: fixed style errors] Signed-off-by: Peer Adelt Message-Id: <1465314555-11501-5-git-send-email-peer.ad...@c-lab.de> --- target-tricore/translate.c

Re: [Qemu-devel] [PATCH 05/10] qemu-tech: document lazy condition code evaluation in cpu.h

On 06/10/2016 18:18, Emilio G. Cota wrote: > On Thu, Oct 06, 2016 at 17:24:18 +0200, Paolo Bonzini wrote: >> Unlike the other sections, they are pretty specific to a particular CPU. >> >> Signed-off-by: Paolo Bonzini >> --- >> qemu-tech.texi | 25

Re: [Qemu-devel] [PATCH 0/3] preliminaries for GICv3 virt support

On Thu, Oct 06, 2016 at 02:21:04PM +0100, Peter Maydell wrote: > This set of three straightforward patches is a preliminary > for adding virtualization support to the GICv3 emulation: > * add a (nop implementation of) MDCCINT_EL1, since KVM >will read/write it on worldswitch > * fix some

[Qemu-devel] [PATCH 3/5] target-tricore: Added new MOV instruction variant

From: Peer Adelt Puts the content of data register D[a] into E[c][63:32] and the content of data register D[b] into E[c][31:0]. [BK: fix style error] Signed-off-by: Peer Adelt Message-Id: <1465314555-11501-4-git-send-email-peer.ad...@c-lab.de> ---

Re: [Qemu-devel] [PULL 00/15] Migration

On 6 October 2016 at 17:09, Juan Quintela wrote: > Peter Maydell wrote: >> On 5 October 2016 at 14:44, Juan Quintela wrote: >>> From: Juan Quintela >>> >>> The following changes since commit

Re: [Qemu-devel] [PATCH v4 12/17] vfio/platform: fix a wrong returned value in vfio_populate_device

Hi, On 04/10/2016 14:48, Markus Armbruster wrote: > Eric Auger writes: > >> In case the vfio_init_intp fails we currently do not return an >> error value. This patch fixes the bug. The returned value is not >> explicit but in practice the error object is the one used to

Re: [Qemu-devel] [PATCH 05/10] qemu-tech: document lazy condition code evaluation in cpu.h

On Thu, Oct 06, 2016 at 17:24:18 +0200, Paolo Bonzini wrote: > Unlike the other sections, they are pretty specific to a particular CPU. > > Signed-off-by: Paolo Bonzini > --- > qemu-tech.texi | 25 - > target-cris/cpu.h | 7 +++ >

[Qemu-devel] [PATCH 4/4] qga: add vsock-listen method

Add AF_VSOCK (virtio-vsock) support as an alternative to virtio-serial. $ qemu-system-x86_64 -device vhost-vsock-pci,guest-cid=3 ... (guest)# qemu-ga -m vsock-listen -p 3:1234 Signed-off-by: Stefan Hajnoczi --- qga/channel-posix.c | 25 +

Re: [Qemu-devel] [PATCH v4 14/17] vfio/pci: Conversion to realize

Hi Markus On 04/10/2016 14:58, Markus Armbruster wrote: > Eric Auger writes: > >> This patch converts VFIO PCI to realize function. >> >> Also original initfn errors now are propagated using QEMU >> error objects. All errors are formatted with the same pattern: >> "vfio:

Re: [Qemu-devel] [PATCH v2 1/2] linux-user: added support for preadv() system call.

On 6 October 2016 at 16:49, Dejan Jovicevic wrote: > v1 -> v2: > - Using safe_preadv() instead of calling preadv() directly. > > This system call performs the same task as the readv system call, > with the exception of having the fourth argument, offset, which >

Re: [Qemu-devel] [PATCH 09/10] qemu-tech: rewrite some parts

On Thu, Oct 06, 2016 at 17:24:22 +0200, Paolo Bonzini wrote: > Drop most the device emulation part and merge the rest into the description > of the MMU. Make some bits more up-to-date. > > Signed-off-by: Paolo Bonzini (snip) > The host SIGSEGV and SIGBUS signal handlers

Re: [Qemu-devel] [PATCH] virtio-9p: add reset handler

On Thu, Oct 06, 2016 at 03:12:10PM +0200, Greg Kurz wrote: > Virtio devices should implement the VirtIODevice->reset() function to > perform necessary cleanup actions and to bring the device to a quiescent > state. > > In the case of the virtio-9p device, this means: > - emptying the list of

[Qemu-devel] [PATCH 2/4] qga: drop unnecessary GA_CHANNEL_UNIX_LISTEN checks

Throughout the code there are c->listen_channel checks which manage the listen socket file descriptor (waiting for accept(2), closing the file descriptor, etc). These checks are currently preceded by explicit c->method == GA_CHANNEL_UNIX_LISTEN checks. Explicit GA_CHANNEL_UNIX_LISTEN checks are

Re: [Qemu-devel] [PATCH v4 08/17] vfio: Pass an Error object to vfio_connect_container

Hi Markus, On 04/10/2016 14:03, Markus Armbruster wrote: > Eric Auger writes: > >> The error is currently simply reported in vfio_get_group. Don't >> bother too much with the prefix which will be handled at upper level, >> later on. >> >> Signed-off-by: Eric Auger

Re: [Qemu-devel] [PATCH v4 15/17] vfio/pci: Remove vfio_msix_early_setup returned value

Hi Markus, On 04/10/2016 15:05, Markus Armbruster wrote: > Eric Auger writes: > >> The returned value is not used anymore by the caller, vfio_realize, >> since the error now is stored in the error object. So let's remove it. >> >> Signed-off-by: Eric Auger

Re: [Qemu-devel] [PATCH] docs: Belatedly update for move of QMP/* to docs/

On 10/06/2016 10:10 AM, Markus Armbruster wrote: > Missed in commit 7537fe0 and commit 9b89b6a. > > Signed-off-by: Markus Armbruster > --- > docs/qmp-commands.txt | 2 +- > docs/writing-qmp-commands.txt | 4 ++-- > 2 files changed, 3 insertions(+), 3 deletions(-)

Re: [Qemu-devel] [PATCH 00/10] qemu-tech cleanup

On Thu, Oct 06, 2016 at 17:24:13 +0200, Paolo Bonzini wrote: > qemu-tech is limited to TCG and large parts of it are obsolete or are > just fine in qemu-doc. Split it into other sources of documentation, > placing what's left in an appendix of qemu-doc. > > Ultimately we should have a new

[Qemu-devel] [PATCH v5 17/17] vfio/pci: Handle host oversight

In case the end-user calls qemu with -vfio-pci option without passing either sysfsdev or host property value, the device is interpreted as :00:00.0. Let's create a specific error message to guide the end-user. Signed-off-by: Eric Auger Reviewed-by: Markus Armbruster

[Qemu-devel] [PATCH v5 13/17] vfio/platform: Pass an error object to vfio_base_device_init

This patch propagates errors encountered during vfio_base_device_init up to the realize function. In case the host value is not set or badly formed we now report an error. Signed-off-by: Eric Auger Reviewed-by: Markus Armbruster --- v4 -> v5: -

[Qemu-devel] [PATCH 2/5] target-tricore: Added MADD.F and MSUB.F instructions

Multiplies D[a] and D[b] and adds/subtracts the result to/from D[d]. The result is put in D[c]. All operands are floating-point numbers. Signed-off-by: Bastian Koppelmann --- target-tricore/fpu_helper.c | 93 -

[Qemu-devel] [PATCH v5 15/17] vfio/pci: Remove vfio_msix_early_setup returned value

The returned value is not used anymore by the caller, vfio_realize, since the error now is stored in the error object. So let's remove it. Signed-off-by: Eric Auger Reviewed-by: Markus Armbruster --- Logically we could do that job for all the

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