Re: [Qemu-devel] [PATCH v12 04/19] block: Use block_job_add_bdrv() in mirror_start_job()

Am 26.10.2016 um 12:29 hat Alberto Garcia geschrieben: > Use block_job_add_bdrv() instead of blocking all operations in > mirror_start_job() and unblocking them in mirror_exit(). > > Signed-off-by: Alberto Garcia Reviewed-by: Kevin Wolf

Re: [Qemu-devel] [PATCH 1/4] block/curl: Use BDRV_SECTOR_SIZE

On 25.10.2016 20:31, Eric Blake wrote: > On 10/24/2016 09:54 PM, Max Reitz wrote: >> Currently, curl defines its own constant SECTOR_SIZE. There is no >> advantage over using the global BDRV_SECTOR_SIZE, so drop it. >> >> Cc: qemu-sta...@nongnu.org >> Signed-off-by: Max Reitz

Re: [Qemu-devel] [PATCH v12 01/19] block: Add bdrv_drain_all_{begin, end}()

Am 26.10.2016 um 12:29 hat Alberto Garcia geschrieben: > bdrv_drain_all() doesn't allow the caller to do anything after all > pending requests have been completed but before block jobs are > resumed. > > This patch splits bdrv_drain_all() into _begin() and _end() for that > purpose. It also adds

Re: [Qemu-devel] macOS 10.12 Sierra, Xcode 8 & clock_gettime()

On Oct 25, 2016, at 10:36 AM, qemu-devel-requ...@nongnu.org wrote: Message: 1 Date: Tue, 25 Oct 2016 17:12:22 +0300 From: Liviu Ionescu To: Paolo Bonzini Cc: qemu-devel Subject: Re: [Qemu-devel] macOS 10.12 Sierra, Xcode 8 &

Re: [Qemu-devel] [PATCH v2 1/6] qdev: device_class_set_props() function

On Wed, Oct 26, 2016 at 03:34:29PM +0200, Igor Mammedov wrote: > On Thu, 20 Oct 2016 15:47:54 -0200 > Eduardo Habkost wrote: > > > Replace direct assignment of DeviceClass::props with a > > device_class_set_props() function. The new function will handle > > registration of

Re: [Qemu-devel] [PATCH 2/2] hostmem-file: allow option 'size' optional

On 26/10/2016 16:17, Eduardo Habkost wrote: > On Wed, Oct 26, 2016 at 03:49:29PM +0800, Haozhong Zhang wrote: >> On 10/26/16 13:56 +0800, Haozhong Zhang wrote: >>> On 10/25/16 17:50 -0200, Eduardo Habkost wrote: On Mon, Oct 24, 2016 at 05:21:51PM +0800, Haozhong Zhang wrote: > +if

Re: [Qemu-devel] [PATCH RFC] acpi: don't build acpi tables for xen hvm guests

On Wed, Oct 26, 2016 at 11:32:56AM +0100, Wei Liu wrote: > On Tue, Oct 25, 2016 at 04:33:03PM -0700, Stefano Stabellini wrote: > > CC'ing maintainers > > > > On Tue, 25 Oct 2016, Wei Liu wrote: > > > Xen's toolstack is in charge of building ACPI tables. Skip acpi table > > > building if running

Re: [Qemu-devel] [PATCH v5 13/13] iotests: Add test for NBD's blockdev-add interface

On 25.10.2016 16:41, Markus Armbruster wrote: > Max Reitz writes: > >> Signed-off-by: Max Reitz >> --- >> tests/qemu-iotests/147 | 196 >> + >> tests/qemu-iotests/147.out | 5 ++ >>

Re: [Qemu-devel] [PATCH v5 12/13] iotests: Add assert_json_filename_equal() method

On 26.10.2016 12:41, Kevin Wolf wrote: > Am 25.10.2016 um 15:11 hat Max Reitz geschrieben: >> Since the order of keys in JSON filenames is not necessarily fixed, they >> should not be compared to fixed strings. This method takes a Python dict >> as a reference, parses a given JSON filename and

Re: [Qemu-devel] [PATCH COLO-Frame (Base) v21 06/17] COLO: Introduce checkpointing protocol

On 2016/10/26 13:25, Amit Shah wrote: On (Tue) 18 Oct 2016 [20:10:02], zhanghailiang wrote: We need communications protocol of user-defined to control the checkpointing process. The new checkpointing request is started by Primary VM, and the interactive process like below: Checkpoint

Re: [Qemu-devel] [PATCH v5 08/13] qapi: Allow blockdev-add for NBD

On 26.10.2016 01:57, Eric Blake wrote: > On 10/25/2016 08:11 AM, Max Reitz wrote: >> Signed-off-by: Max Reitz >> --- >> qapi/block-core.json | 25 ++--- >> 1 file changed, 22 insertions(+), 3 deletions(-) >> >> diff --git a/qapi/block-core.json

Re: [Qemu-devel] [PATCH 2/2] hostmem-file: allow option 'size' optional

On Wed, Oct 26, 2016 at 03:49:29PM +0800, Haozhong Zhang wrote: > On 10/26/16 13:56 +0800, Haozhong Zhang wrote: > > On 10/25/16 17:50 -0200, Eduardo Habkost wrote: > > > On Mon, Oct 24, 2016 at 05:21:51PM +0800, Haozhong Zhang wrote: > > > > +if (memory) { > > > > +memory = memory ?:

Re: [Qemu-devel] [PATCH COLO-Frame (Base) v21 05/17] COLO: Establish a new communicating path for COLO

On 2016/10/26 13:06, Amit Shah wrote: On (Tue) 18 Oct 2016 [20:10:01], zhanghailiang wrote: This new communication path will be used for returning messages from Secondary side to Primary side. Signed-off-by: zhanghailiang Signed-off-by: Li Zhijian

Re: [Qemu-devel] [PATCH COLO-Frame (Base) v21 12/17] COLO: Add 'x-colo-lost-heartbeat' command to trigger failover

* Amit Shah (amit.s...@redhat.com) wrote: > On (Tue) 18 Oct 2016 [20:10:08], zhanghailiang wrote: > > We leave users to choose whatever heartbeat solution they want, > > if the heartbeat is lost, or other errors they detect, they can use > > experimental command 'x_colo_lost_heartbeat' to tell

Re: [Qemu-devel] [PATCH COLO-Frame (Base) v21 03/17] migration: Enter into COLO mode after migration if COLO is enabled

On 2016/10/26 12:50, Amit Shah wrote: On (Tue) 18 Oct 2016 [20:09:59], zhanghailiang wrote: Add a new migration state: MIGRATION_STATUS_COLO. Migration source side enters this state after the first live migration successfully finished if COLO is enabled by command 'migrate_set_capability x-colo

Re: [Qemu-devel] [PATCH COLO-Frame (Base) v21 04/17] migration: Switch to COLO process after finishing loadvm

On 2016/10/26 13:01, Amit Shah wrote: On (Tue) 18 Oct 2016 [20:10:00], zhanghailiang wrote: Switch from normal migration loadvm process into COLO checkpoint process if COLO mode is enabled. We add three new members to struct MigrationIncomingState, 'have_colo_incoming_thread' and

Re: [Qemu-devel] [PATCH 1/2] KVM: page track: add a new notifier type: track_flush_slot

On 10/21/2016 01:06 AM, Paolo Bonzini wrote: > On 20/10/2016 03:48, Xiao Guangrong wrote: >> I understood that KVM side is safe, however, vfio side is independent with >> kvm and the user of usrdata can fetch kvm struct at any time, consider >> this scenario: >> >> CPU 0

Re: [Qemu-devel] [PATCH v2 04/11] qapi: fix @ACPI sections

Marc-André Lureau writes: > This helps the doc parser. > > Signed-off-by: Marc-André Lureau > --- > qapi-schema.json | 6 -- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/qapi-schema.json b/qapi-schema.json >

Re: [Qemu-devel] [PATCH COLO-Frame (Base) v21 17/17] configure: Support enable/disable COLO feature

On 10/26/2016 01:07 AM, Amit Shah wrote: > On (Tue) 18 Oct 2016 [20:10:13], zhanghailiang wrote: >> configure --enable-colo/--disable-colo to switch COLO >> support on/off. >> COLO feature is enabled by default. >> >> Signed-off-by: zhanghailiang >> Signed-off-by:

Re: [Qemu-devel] [PATCH v2 03/11] qapi: fix missing symbol @prefix

Marc-André Lureau writes: > Signed-off-by: Marc-André Lureau > --- > qapi-schema.json | 4 ++-- > qapi/block-core.json | 4 ++-- > qapi/crypto.json | 36 ++-- > 3 files changed, 22

Re: [Qemu-devel] [PATCH COLO-Frame (Base) v21 10/17] COLO: Add checkpoint-delay parameter for migrate-set-parameters

On 10/26/2016 12:45 AM, Amit Shah wrote: > On (Tue) 18 Oct 2016 [20:10:06], zhanghailiang wrote: >> Add checkpoint-delay parameter for migrate-set-parameters, so that >> we can control the checkpoint frequency when COLO is in periodic mode. >> >> Cc: Luiz Capitulino >> Cc:

Re: [Qemu-devel] [PATCH] util/mmap-alloc: check parameter before using

On 10/26/2016 02:18 AM, Cao jin wrote: > Also refactor some code hunk for readability > > Signed-off-by: Cao jin > --- > util/mmap-alloc.c | 20 +--- > 1 file changed, 9 insertions(+), 11 deletions(-) > > diff --git a/util/mmap-alloc.c

Re: [Qemu-devel] [PATCH v2 1/6] qdev: device_class_set_props() function

On Thu, 20 Oct 2016 15:47:54 -0200 Eduardo Habkost wrote: > Replace direct assignment of DeviceClass::props with a > device_class_set_props() function. The new function will handle > registration of class properties, later. > > Except for manual conversion of

Re: [Qemu-devel] [Qemu-arm] [PATCH] net: smc91c111: check packet number and data register index

On 26 October 2016 at 13:33, P J P wrote: > Hello, > > +-- On Tue, 25 Oct 2016, Peter Maydell wrote --+ > | > case 2: /* Packet Number Register */ > | > -s->packet_num = value; > | > +s->packet_num = value & (NUM_PACKETS - 1); > | > | The

Re: [Qemu-devel] [PATCH v4 5/5] qapi: allow blockdev-add for ssh

On 10/26/2016 03:31 AM, Kevin Wolf wrote: >>> +# @host_key_check #optional defines how and what to check the host >>> +# key against, defaults to "yes" >> >> I still have reservations about this parameter. > > It doesn't seem to be as easy as an enum. The real thing

Re: [Qemu-devel] [PATCH v2 02/11] qapi: fix schema symbol sections

Marc-André Lureau writes: > According to documentation, there needs to be '##' to start a symbol Suggest to be explicit, and say "According to docs/qapi-code-gen.txt". > section, that's also what the documentation parser expects. Does the doc parser complain when

[Qemu-devel] [PATCH] 4/4] target-ppc: Implement bcdctz. instruction

bcdctz. converts from BCD to Zoned numeric format. Zoned format uses a byte to represent a digit where the most significant nibble is 0x3 or 0xf, depending on the preferred signal. Signed-off-by: Jose Ricardo Ziviani --- target-ppc/helper.h | 1 +

[Qemu-devel] [PATCH] 0/4] POWER9 TCG enablements - BCD functions part I

This serie contains 4 new instructions for POWER9 ISA3.0 bcdcfn.: Decimal Convert From National bcdctn.: Decimal Convert To National bcdcfz.: Decimal Convert From Zoned bcdctz.: Decimal Convert to Zoned Jose Ricardo Ziviani (4): target-ppc: Implement bcdcfn. instruction target-ppc:

[Qemu-devel] [PATCH] 1/4] target-ppc: Implement bcdcfn. instruction

bcdcfn. converts from National numeric format to BCD. National format uses a byte to represent a digit where the most significant nibble is always 0x3 and the least sign. nibbles is the digit itself. Signed-off-by: Jose Ricardo Ziviani --- target-ppc/helper.h

[Qemu-devel] [PATCH] 3/4] target-ppc: Implement bcdcfz. instruction

bcdcfz. converts from Zoned numeric format to BCD. Zoned format uses a byte to represent a digit where the most significant nibble is 0x3 or 0xf, depending on the preferred signal. Signed-off-by: Jose Ricardo Ziviani --- target-ppc/helper.h | 1 +

[Qemu-devel] [PATCH] 2/4] target-ppc: Implement bcdctn. instruction

bcdctn. converts from BCD to National numeric format. National format uses a byte to represent a digit where the most significant nibble is always 0x3 and the least sign. nibbles is the digit itself. Signed-off-by: Jose Ricardo Ziviani --- target-ppc/helper.h

Re: [Qemu-devel] [PATCH v2] trace: Fix 'char **' compilation error in simple backend

On 10/25/2016 10:50 PM, Fam Zheng wrote: > Currently, the generated function body will do "strlen(arg)" but the > argument could be 'char **' or 'char * const *'. Avoid that by excluding > such cases in is_string check. > > Reported by patchew's "make docker-test-mingw@fedora". > > Suggested-by:

Re: [Qemu-devel] [PATCH v5 13/13] iotests: Add test for NBD's blockdev-add interface

Am 25.10.2016 um 15:11 hat Max Reitz geschrieben: > Signed-off-by: Max Reitz With the trailing newline fixed that Markus mentioned: Reviewed-by: Kevin Wolf

Re: [Qemu-devel] [PATCH] Reduce curses escdelay from 1s to 0.2s

On Sa, 2016-10-15 at 19:24 +0200, Samuel Thibault wrote: > Hello, > > Peter Maydell, on Wed 22 Jun 2016 21:49:04 +0100, wrote: > > On 22 June 2016 at 16:44, Samuel Thibault > > wrote: > > > By default, curses will only report single ESC key event after 1s delay, >

Re: [Qemu-devel] [PATCH 12/22] qcow2-bitmap: add IN_USE flag

26.10.2016 15:13, Vladimir Sementsov-Ogievskiy wrote: 26.10.2016 12:21, Vladimir Sementsov-Ogievskiy wrote: 26.10.2016 12:04, Vladimir Sementsov-Ogievskiy wrote: 25.10.2016 13:53, Vladimir Sementsov-Ogievskiy wrote: 24.10.2016 20:18, Max Reitz wrote: On 24.10.2016 19:08, Max Reitz wrote: On

Re: [Qemu-devel] [PATCH 1/3] Add dots keypresses support to the baum braille device

On So, 2016-10-23 at 21:54 +0200, Samuel Thibault wrote: > Signed-off-by: Samuel Thibault Hmm, this one throws strange errors at me: kraxel@nilsson ~/projects/qemu (queue/ui)# git am -3 ~/Downloads/patches/input/\[PATCH_1_3

Re: [Qemu-devel] [PATCH 0/5] curses: wide character support

Hi, > > Given how close the freeze deadline is now I'm tempted to cherry-pick > > patches 0-3 and prepare a pull request ASAP. > > You mean patches 1-3? Patch 5 would be very useful too to fix typing accented > letters, and it doesn't depend on patch 4. Hmm, seems #5 needs a rebase, doesn't

Re: [Qemu-devel] [PATCH] audio: intel-hda: check stream entry count during transfer

On Do, 2016-10-20 at 13:10 +0530, P J P wrote: > From: Prasad J Pandit > > Intel HDA emulator uses stream of buffers during DMA data > transfers. Each entry has buffer length and buffer pointer > position, which are used to derive bytes to 'copy'. If this > length and

Re: [Qemu-devel] [Qemu-arm] [PATCH] net: smc91c111: check packet number and data register index

Hello, +-- On Tue, 25 Oct 2016, Peter Maydell wrote --+ | > case 2: /* Packet Number Register */ | > -s->packet_num = value; | > +s->packet_num = value & (NUM_PACKETS - 1); | | The data sheet says that there are 6 valid bits in the | packet number register, not

Re: [Qemu-devel] [PATCH 12/22] qcow2-bitmap: add IN_USE flag

26.10.2016 12:21, Vladimir Sementsov-Ogievskiy wrote: 26.10.2016 12:04, Vladimir Sementsov-Ogievskiy wrote: 25.10.2016 13:53, Vladimir Sementsov-Ogievskiy wrote: 24.10.2016 20:18, Max Reitz wrote: On 24.10.2016 19:08, Max Reitz wrote: On 24.10.2016 13:35, Vladimir Sementsov-Ogievskiy wrote:

Re: [Qemu-devel] [RFC PATCH 3/4] migration/vmstate: fix array of pointers to struct

* Halil Pasic (pa...@linux.vnet.ibm.com) wrote: > > > On 10/25/2016 12:13 PM, Dr. David Alan Gilbert wrote: > [..] > >> for (i = 0; i < n_elems; i++) { > >> -void *addr = base_addr + size * i; > >> +void *curr_elem = first_elem + size * i; > > > >

Re: [Qemu-devel] [PATCH] virtio-gpu: fix memory leak in virtio_gpu_resource_create_2d

On So, 2016-09-18 at 19:07 -0700, Li Qiang wrote: > From: Li Qiang > > In virtio gpu resource create dispatch, if the pixman format is zero > it doesn't free the resource object allocated previously. Thus leading > a host memory leak issue. This patch avoid this. > >

Re: [Qemu-devel] [QEMU PATCH v7 2/3] migration: migrate QTAILQ

On 10/22/2016 12:52 AM, Jianjun Duan wrote: > +#define RAW_FIELD(base, offset) > \ > +((char *) (base) + offset) > + Seems you partially adopted Paolo's suggestion for improving the macros. Is there a particular reason why you did not

Re: [Qemu-devel] [PATCH 0/5] curses: wide character support

Hi, > > /me wonders whenever we should do the same with iconv. It's part of the > > POSIX.1-2001 specs, and we have 2016 now. Do we *really* need configure > > checks and #ifdefs for it? > > I would only say that libiconv is not always installed by default on BSD > systems for instance.

Re: [Qemu-devel] [RFC PATCH 3/4] migration/vmstate: fix array of pointers to struct

On 10/25/2016 12:13 PM, Dr. David Alan Gilbert wrote: [..] >> for (i = 0; i < n_elems; i++) { >> -void *addr = base_addr + size * i; >> +void *curr_elem = first_elem + size * i; > > This diff is quite confusing because a lot of it involves the >

[Qemu-devel] vmx support for qemu

Hello. I am trying to make realization of vmx for qemu. For now it can: - decode vmx instructions, vmx determination and vmx MSRs reading is supported - handle interrupts, exceptions, vm exits due to cr 0/4 exits, cr shadowing is supported - run bios POST and some amount of guest code in

Re: [Qemu-devel] [PATCH 3/3] Move getting XWindow ID from baum driver to graphical backend

> > Also splitting this up would be nice. > > You mean separating the move of the sdl1.2 code from the addition of > sdl2+gtk code? (and perhaps separate sdl2 and gtk?) One patch adding new console.[ch] interfaces, then one patch per UI, finally switch over baum to the new interfaces. Maybe put

[Qemu-devel] [PATCH v2] net: smc91c111: check packet number and data register index

From: Prasad J Pandit SMSC91C111 Ethernet interface emulator has registers to store 'packet number' and a 'pointer' to Tx/Rx FIFO buffer area. These two are used to derive an address to access into 'data' registers. If they are set incorrectly, they could lead to an OOB

[Qemu-devel] [PULL 48/49] spapr: improve ibm, architecture-vec-5 property handling

From: Michael Roth ibm,architecture-vec-5 is supposed to encode all option vector 5 bits negotiated between platform/guest. Currently we hardcode this property in the boot-time device tree to advertise a single negotiated capability, "Form 1" NUMA Affinity, regardless

Re: [Qemu-devel] [QEMU PATCH v8 1/3] migration: extend VMStateInfo

* Jianjun Duan (du...@linux.vnet.ibm.com) wrote: > Current migration code cannot handle some data structures such as > QTAILQ in qemu/queue.h. Here we extend the signatures of put/get > in VMStateInfo so that customized handling is supported. > > Signed-off-by: Jianjun Duan

[Qemu-devel] [PULL 43/49] pseries: Consolidate construction of /vdevice device tree node

Construction of the /vdevice node (and its children) is divided between spapr_create_fdt_skel() (at init time), which creates the base node, and spapr_populate_vdevice() (at reset time) which creates the nodes for each individual virtual device. This consolidates both into a single function

[Qemu-devel] [PULL 49/49] adb: change handler only when recognized

From: Hervé Poussineau ADB devices must take new handler into account only when they recognize it. This lets operating systems probe for valid/invalid handles, to know device capabilities. Add a FIXME in keyboard handler, which should use a different translation table

[Qemu-devel] [PULL 30/49] ppc/pnv: add a LPC controller

From: Benjamin Herrenschmidt The LPC (Low Pin Count) interface on a POWER8 is made accessible to the system through the ADU (XSCOM interface). This interface is part of set of units connected together via a local OPB (On-Chip Peripheral Bus) which act as a bridge

[Qemu-devel] [PULL 25/49] ppc/pnv: add a core mask to PnvChip

From: Cédric Le Goater This will be used to build real HW ids for the cores and enforce some limits on the available cores per chip. Signed-off-by: Cédric Le Goater Reviewed-by: David Gibson Signed-off-by: David Gibson

[Qemu-devel] [PULL 41/49] pseries: Move /event-sources construction to spapr_build_fdt()

The /event-sources device tree node is built from spapr_create_fdt_skel(). As part of consolidating device tree construction to reset time, this moves it to spapr_build_fdt(). Signed-off-by: David Gibson Reviewed-by: Thomas Huth Reviewed-by:

[Qemu-devel] [PULL 46/49] spapr_hcall: use spapr_ovec_* interfaces for CAS options

From: Michael Roth Currently we access individual bytes of an option vector via ldub_phys() to test for the presence of a particular capability within that byte. Currently this is only done for the "dynamic reconfiguration memory" capability bit. If that bit is

[Qemu-devel] [PULL 28/49] ppc/pnv: add XSCOM infrastructure

From: Cédric Le Goater On a real POWER8 system, the Pervasive Interconnect Bus (PIB) serves as a backbone to connect different units of the system. The host firmware connects to the PIB through a bridge unit, the Alter-Display-Unit (ADU), which gives him access to all the chiplets

[Qemu-devel] [PULL 42/49] pseries: Move /hypervisor node construction to fdt_build_fdt()

Currently the /hypervisor device tree node is constructed in spapr_create_fdt_skel(). As part of consolidating device tree construction to reset time, move it to a function called from spapr_build_fdt(). Signed-off-by: David Gibson Reviewed-by: Thomas Huth

[Qemu-devel] [PULL 45/49] spapr_ovec: initial implementation of option vector helpers

From: Michael Roth PAPR guests advertise their capabilities to the platform by passing an ibm,architecture-vec structure via an ibm,client-architecture-support hcall as described by LoPAPR v11, B.6.2.3. during early boot. Using this information, the platform enables

[Qemu-devel] [PULL 39/49] pseries: Consolidate construction of /chosen device tree node

For historical reasons, building the /chosen node in the guest device tree is split across several places and includes both parts which write the DT sequentially and others which use random access functions. This patch consolidates construction of the node into one place, using random access

[Qemu-devel] [PULL 44/49] pseries: Remove spapr_create_fdt_skel()

For historical reasons construction of the guest device tree in spapr is divided between spapr_create_fdt_skel() which is called at init time, and spapr_build_fdt() which runs at reset time. Over time, more and more things have needed to be moved to reset time. Previous cleanups mean the only

[Qemu-devel] [PULL 36/49] pseries: Move adding of fdt reserve map entries

The flattened device tree passed to pseries guests contains a list of reserved memory areas. Currently we construct this list early in spapr_create_fdt_skel() as we sequentially write the fdt. This will be inconvenient for upcoming cleanups, so this patch moves the reserve map changes to the end

[Qemu-devel] [PULL 23/49] ppc/pnv: add skeleton PowerNV platform

From: Benjamin Herrenschmidt The goal is to emulate a PowerNV system at the level of the skiboot firmware, which loads the OS and provides some runtime services. Power Systems have a lower firmware (HostBoot) that does low level system initialization, like DRAM

[Qemu-devel] [PULL 27/49] ppc/pnv: add a PnvCore object

From: Cédric Le Goater This is largy inspired by sPAPRCPUCore with some simplification, no hotplug for instance. A set of PnvCore objects is added to the PnvChip and the device tree is populated looping on these cores. Real HW cpu ids are now generated depending on the chip cpu

[Qemu-devel] [PULL 38/49] pseries: Move construction of /interrupt-controller fdt node

Currently the device tree node for the XICS interrupt controller is in spapr_create_fdt_skel(). As part of consolidating device tree construction to reset time, this moves it to a function called from spapr_build_fdt(). In addition we move the actual code into hw/intc/xics_spapr.c with the rest

[Qemu-devel] [PULL 34/49] pseries: Remove rtas_addr and fdt_addr fields from machinestate

These values are used only within ppc_spapr_reset(), so just change them to local variables. Signed-off-by: David Gibson Reviewed-by: Thomas Huth Reviewed-by: Alexey Kardashevskiy Reviewed-by: Michael Roth

[Qemu-devel] [PULL 47/49] spapr: add option vector handling in CAS-generated resets

From: Michael Roth In some cases, ibm,client-architecture-support calls can fail. This could happen in the current code for situations where the modified device tree segment exceeds the buffer size provided by the guest via the call parameters. In these cases, QEMU

[Qemu-devel] [PULL 26/49] ppc/pnv: add a PIR handler to PnvChip

From: Cédric Le Goater The Processor Identification Register (PIR) is a register that holds a processor identifier which is used for bus transactions (XSCOM) and for processor differentiation in multiprocessor systems. It also used in the interrupt vector entries (IVE) to identify

[Qemu-devel] [PULL 32/49] target-ppc: add vmul10[u, eu, cu, ecu]q instructions

From: Vasant Hegde vmul10uq : Vector Multiply-by-10 Unsigned Quadword VX-form vmul10euq : Vector Multiply-by-10 Extended Unsigned Quadword VX-form vmul10cuq : Vector Multiply-by-10 & write Carry Unsigned Quadword VX-form vmul10ecuq: Vector Multiply-by-10 Extended

[Qemu-devel] [PULL 40/49] pseries: Consolidate construction of /rtas device tree node

For historical reasons construction of the /rtas node in the device tree (amongst others) is split into several places. In particular it's split between spapr_create_fdt_skel(), spapr_build_fdt() and spapr_rtas_device_tree_setup(). In fact, as well as adding the actual RTAS tokens to the device

[Qemu-devel] [PULL 24/49] ppc/pnv: add a PnvChip object

From: Cédric Le Goater This is is an abstraction of a POWER8 chip which is a set of cores plus other 'units', like the pervasive unit, the interrupt controller, the memory controller, the on-chip microcontroller, etc. The whole can be seen as a socket. It depends on a cpu model

[Qemu-devel] [PULL 13/49] nvram: Rename openbios_firmware_abi.h into sun_nvram.h

From: Thomas Huth The header now only contains inline functions related to the Sun NVRAM, so the a name like sun_nvram.h seems to be more appropriate now. Signed-off-by: Thomas Huth Tested-by: Mark Cave-Ayland Signed-off-by:

[Qemu-devel] [PULL 29/49] ppc/pnv: add XSCOM handlers to PnvCore

From: Cédric Le Goater Now that we are using real HW ids for the cores in PowerNV chips, we can route the XSCOM accesses to them. We just need to attach a specific XSCOM memory region to each core in the appropriate window for the core number. To start with, let's install the DTS

[Qemu-devel] [PULL 18/49] ppc/xics: change the icp_ routines API to use an 'ICPState *' argument

From: Cédric Le Goater The routines : void icp_set_cppr(ICPState *icp, uint8_t cppr); void icp_set_mfrr(ICPState *icp, uint8_t mfrr); void icp_eoi(ICPState *icp, uint32_t xirr); now use one 'ICPState *icp' argument instead of a 'XICSState *' and a server

[Qemu-devel] [PULL 17/49] ppc/xics: add a XICSState backlink in ICPState

From: Cédric Le Goater The link will be used to change the API of the icp_* routines which are still using an XICSState as an argument. Signed-off-by: Cédric Le Goater Signed-off-by: David Gibson --- hw/intc/xics.c| 1 +

[Qemu-devel] [PULL 15/49] target-ppc: implement xxbr[qdwh] instruction

From: Nikunj A Dadhania Add required helpers (GEN_XX2FORM_EO) for supporting this instruction. xxbrh: VSX Vector Byte-Reverse Halfword xxbrw: VSX Vector Byte-Reverse Word xxbrd: VSX Vector Byte-Reverse Doubleword xxbrq: VSX Vector Byte-Reverse Quadword Signed-off-by:

[Qemu-devel] [PULL 35/49] pseries: Make spapr_create_fdt_skel() get information from machine state

Currently spapr_create_fdt_skel() takes a bunch of individual parameters for various things it will put in the device tree. Some of these can already be taken directly from sPAPRMachineState. This patch alters it so that all of them can be taken from there, which will allow this code to be moved

[Qemu-devel] [PULL 11/49] sparc: Use the new common NVRAM functions for system and free space partition

From: Thomas Huth The system and free space NVRAM partitions (for OpenBIOS) are created in exactly the same way as the Mac-style CHRP NVRAM partitions, so we can use the new common helper functions to do this job here, too. Signed-off-by: Thomas Huth

[Qemu-devel] [PULL 37/49] pseries: Consolidate RTAS loading

At each system reset, the pseries machine needs to load RTAS (the runtime portion of the guest firmware) into the VM. This means copying the actual RTAS code into guest memory, and also updating the device tree so that the guest OS and boot firmware can locate it. For historical reasons the copy

[Qemu-devel] [PULL 16/49] ppc/xics: add a xics_set_nr_servers common routine

From: Cédric Le Goater xics_spapr and xics_kvm nearly define the same 'set_nr_servers' handler. Only the type of the ICP differs. So let's make a common one to remove some duplicated code. Signed-off-by: Cédric Le Goater Signed-off-by: David Gibson

[Qemu-devel] [PULL 33/49] pseries: Split device tree construction from device tree load

spapr_finalize_fdt() both finishes building the device tree for the guest and loads it into guest memory. For future cleanups, it's going to be more convenient to do these two things separately. The loading portion is pretty trivial, so we move it inline into the caller, ppc_spapr_reset(). We

[Qemu-devel] [PULL 14/49] target-ppc: implement vnegw/d instructions

From: Nikunj A Dadhania Vector Integer Negate Instructions: vnegw: Vector Negate Word vnegd: Vector Negate Doubleword Signed-off-by: Nikunj A Dadhania Reviewed-by: Thomas Huth Reviewed-by: Richard Henderson

[Qemu-devel] [PULL 31/49] ppc/pnv: add a ISA bus

From: Cédric Le Goater As Qemu only supports a single instance of the ISA bus, we use the LPC controller of chip 0 to create one and plug in a couple of useful devices, like an UART and RTC. An IPMI BT device, which is also an ISA device, can be defined on the command line to

[Qemu-devel] [PULL 06/49] tests: rename target_big_endian() as qvirtio_is_big_endian()

From: Laurent Vivier Move the definition to libqos/virtio.h as it must be used only with virtio functions. Add a QVirtioDevice parameter as it will be needed to know if the virtio device is using virtio 1.0 specification and thus is always little-endian (to do)

[Qemu-devel] [PULL 12/49] nvram: Move the remaining CHRP NVRAM related code to chrp_nvram.[ch]

From: Thomas Huth Everything that is related to CHRP NVRAM should rather reside in chrp_nvram.c / chrp_nvram.h instead of openbios_firmware_abi.h. Signed-off-by: Thomas Huth Tested-by: Mark Cave-Ayland Signed-off-by: David

[Qemu-devel] [PULL 08/49] tests: enable virtio tests on SPAPR

From: Laurent Vivier but disable MSI-X tests on SPAPR as we can't check the result (the memory region used on PC is not readable on SPAPR). Signed-off-by: Laurent Vivier Signed-off-by: David Gibson ---

[Qemu-devel] [PULL 20/49] pseries: Remove unused callbacks from sPAPR VIO bus state

The original QOMification of the spapr VIO devices in 3954d33 "spapr: convert to QEMU Object Model (v2)" moved some callbacks from the VIOsPAPRBus structure to the VIOsPAPRDeviceClass. Except, that it forgot to actually remove them from the VIOsPAPRBus structure (which still exists, though it

[Qemu-devel] [PULL 00/49] ppc-for-2.8 queue 20161026

Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2016-10-25' into staging (2016-10-25 17:03:11 +0100) are available in the git repository at: git://github.com/dgibson/qemu.git tags/ppc-for-2.8-20161026 for you to fetch changes up to acb8eed32d455851773be209a1d9cd0258904b21

[Qemu-devel] [PULL 07/49] tests: use qtest_pc_boot()/qtest_shutdown() in virtio tests

From: Laurent Vivier This patch replaces calls to qtest_start() and qtest_end() by calls to qtest_pc_boot() and qtest_shutdown(). This allows to initialize memory allocator and PCI interface functions. This will ease to enable virtio tests on other architectures by only

[Qemu-devel] [PULL 19/49] ppc: fix MSR_ME handling for system reset interrupt

From: Nicholas Piggin Power ISA specifies ME bit handling for system reset interrupt: if the interrupt occurred while the thread was in power-saving mode, set to 1; otherwise not altered Power ISA 3.0, section 6.5 "Interrupt Definitions", Figure 64. Signed-off-by:

[Qemu-devel] [PULL 05/49] tests: move QVirtioBus pointer into QVirtioDevice

From: Laurent Vivier This allows to not have to pass bus and device for every virtio functions. Signed-off-by: Laurent Vivier Reviewed-by: Greg Kurz Reviewed-by: Thomas Huth [dwg: Fix style nit] Signed-off-by: David

Re: [Qemu-devel] [PATCH 0/5] curses: wide character support

Hello, Gerd Hoffmann, on Wed 26 Oct 2016 12:05:55 +0200, wrote: > Back online now after being sick for a while. Oh, sorry about that, hoping you're fine. > > Samuel Thibault, on Sat 15 Oct 2016 21:53:03 +0200, wrote: > > > This patch series adds wide character support to the curses frontend of

[Qemu-devel] [PULL 04/49] tests: don't check if qtest_spapr_boot() returns NULL

From: Laurent Vivier qtest_spapr_boot()/qtest_pc_boot()/qtest_boot() call qtest_vboot() and qtest_vboot() calls g_malloc(), and g_malloc() never fails: if memory allocation fails, the application is terminated. Signed-off-by: Laurent Vivier Reviewed-by:

[Qemu-devel] [PULL 09/49] spapr_pci: advertise explicit numa IDs even when there's 1 node

From: Michael Roth With the addition of "numa_node" properties for PHBs we began advertising NUMA affinity in cases where nb_numa_nodes > 1. Since the default on the guest side is to make no assumptions about PHB NUMA affinity (defaulting to -1), there is still a

[Qemu-devel] [PULL 21/49] ppc: Fix single step with gdb stub

From: Benjamin Herrenschmidt Signed-off-by: Benjamin Herrenschmidt Signed-off-by: David Gibson --- target-ppc/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-ppc/translate.c

[Qemu-devel] [PULL 02/49] ppc/xics: Add xics to the monitor "info pic" command

From: Benjamin Herrenschmidt Useful to debug interrupt problems. Signed-off-by: Benjamin Herrenschmidt [clg: - updated for qemu-2.7 - added a test on ->irqs as it is not necessarily allocated (PHB3_MSI) - removed static

[Qemu-devel] [PULL 10/49] nvram: Introduce helper functions for CHRP "system" and "free space" partitions

From: Thomas Huth The "system partition" and "free space" partition layouts are defined by the CHRP and LoPAPR specification, and used by OpenBIOS and SLOF. We can re-use this code for other machines that use OpenBIOS and SLOF, too. So let's make this code independent from the

[Qemu-devel] [PULL 03/49] tests: fix memory leak in virtio-scsi-test

From: Laurent Vivier vs is allocated in qvirtio_scsi_pci_init() and never freed. Signed-off-by: Laurent Vivier Reviewed-by: Greg Kurz Reviewed-by: Thomas Huth Signed-off-by: David Gibson

Re: [Qemu-devel] [PATCH v3 00/13] Refactor common part of xen backend and frontend

On Tue, Oct 25, 2016 at 08:50:06AM +0300, Emil Condrea wrote: > This patch series was splitted from QEMU:Xen stubdom vTPM for HVM virtual > machine > http://markmail.org/message/fkix7g3a5zdj7lvr > > It contains a reorganization of xen backend and frontend functions together > with code style

Re: [Qemu-devel] [PATCH 3/3] Move getting XWindow ID from baum driver to graphical backend

Hello, Gerd Hoffmann, on Wed 26 Oct 2016 12:17:44 +0200, wrote: > On So, 2016-10-23 at 21:54 +0200, Samuel Thibault wrote: > > This adds two console functions, qemu_console_set_window_id and > > qemu_graphic_console_get_window_id, to let graphical backend record the > > window id in the

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