Re: [Qemu-devel] a suggestion to extend the query block stats commands for multi-disk case

Hi stefan, At 12/05/2016 07:53 PM, Stefan Hajnoczi wrote: On Mon, Dec 05, 2016 at 04:56:38PM +0800, Dou Liyang wrote: Hi all, Currently, in Qemu, we query the block states by using “info blockstats”. For each disk, the command calls “bdrv_query_stats” function to get the info of block states

Re: [Qemu-devel] [PATCH v7 0/5] IOMMU: intel_iommu support map and unmap notifications

On Tue, Dec 06, 2016 at 03:06:20PM +0800, Lan Tianyu wrote: > On 2016年12月06日 14:51, Peter Xu wrote: > > On Tue, Dec 06, 2016 at 02:30:24PM +0800, Lan Tianyu wrote: > > > > [...] > > > 2. How to restore GPA->HPA mapping when IOVA is disabled by guest. > When guest enables IOVA for

Re: [Qemu-devel] [PATCH for-2.9 v2 0/2] cryptodev: support xts(aes) algorithm

On 2016/12/5 19:39, Longpeng(Mike) wrote: > This patchset firstly fix a bug in cryptodev_builtin_get_aes_algo, and > then add xts(aes) algorithm support. > > --- > Changes since v1: > - change macro's defination. [Arei] > > --- > Longpeng(Mike) (2): > cryptodev: fix the check of aes

Re: [Qemu-devel] [PATCH v7 0/5] IOMMU: intel_iommu support map and unmap notifications

On 2016年12月06日 14:51, Peter Xu wrote: > On Tue, Dec 06, 2016 at 02:30:24PM +0800, Lan Tianyu wrote: > > [...] > 2. How to restore GPA->HPA mapping when IOVA is disabled by guest. When guest enables IOVA for device, vIOMMU will invalidate all previous GPA->HPA mapping and update

Re: [Qemu-devel] [Spice-devel] Postcopy+spice crash

Hi, > >> On a quick glance I'd blame the guest for sending corrupted commands. > >> Strange though that it happens on migration only, so there could be > >> a host issue too. Or a timing issue triggered by migration. > >> > >> Which migration phase? > > > > This is the point at which it

Re: [Qemu-devel] [PATCH v7 0/5] IOMMU: intel_iommu support map and unmap notifications

On Tue, Dec 06, 2016 at 02:30:24PM +0800, Lan Tianyu wrote: [...] > >> 2. How to restore GPA->HPA mapping when IOVA is disabled by guest. > >> When guest enables IOVA for device, vIOMMU will invalidate all previous > >> GPA->HPA mapping and update IOVA->HPA mapping to pIOMMU via iommu > >>

Re: [Qemu-devel] [PATCH v7 0/5] IOMMU: intel_iommu support map and unmap notifications

On 2016年12月02日 14:52, Peter Xu wrote: > On Thu, Dec 01, 2016 at 02:44:14PM +0800, Lan Tianyu wrote: > > [...] > >> Hi: >> I think there are still other gaps to enable passthough device with >> vIOMMU's DMA translation support. >> >> 1. Since this patchset is to shadow guest IO page table to >>

Re: [Qemu-devel] [PATCH 06/13] target-ppc: implement stxvll instructions

Richard Henderson writes: > On 12/05/2016 03:25 AM, Nikunj A Dadhania wrote: >> +getVSR(xt_num, , env); >> +if (msr_le) { >> +for (i = 0; i < end; i++) { >> +cpu_stb_data_ra(env, addr, xt.u8[i], GETPC()); >> +addr = addr_add(env, addr,

Re: [Qemu-devel] [PATCH 05/13] target-ppc: implement stxvl instruction

Richard Henderson writes: > On 12/05/2016 03:25 AM, Nikunj A Dadhania wrote: >> +for (i = 15; i > 15 - end; i--) { >> +cpu_stb_data_ra(env, addr, xt.u8[i], GETPC()); >> +addr = addr_add(env, addr, 1); >> +} > > (1) you need to handle nb > 16. Sure will

Re: [Qemu-devel] [PATCH 04/13] target-ppc: implement lxvll instruction

Richard Henderson writes: > On 12/05/2016 03:25 AM, Nikunj A Dadhania wrote: >> +void helper_lxvll(CPUPPCState *env, target_ulong addr, >> + target_ulong xt_num, target_ulong rb) >> +{ >> +ppc_vsr_t xt; >> + >> +getVSR(xt_num, , env); >> +if

Re: [Qemu-devel] [PATCH 03/13] target-ppc: implement lxvl instruction

Richard Henderson writes: > On 12/05/2016 03:25 AM, Nikunj A Dadhania wrote: >> lxvl: Load VSX Vector with Length >> >> Little/Big-endian Storage: >> +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+ >> |“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“

Re: [Qemu-devel] [PATCH 02/13] target-ppc: add mask_u128 routine

Richard Henderson writes: > On 12/05/2016 03:25 AM, Nikunj A Dadhania wrote: >> +#if defined(CONFIG_INT128) >> +FUNC_MASK(mask_u128, Int128, 128, Int128, ~((__uint128_t)0)); >> +#else >> +static inline Int128 mask_u128(int start, int end) >> +{ >> +Int128 r = {0}; >> +

Re: [Qemu-devel] [PATCH kernel v5 5/5] virtio-balloon: tell host vm's unused page info

> >>> + mutex_lock(>balloon_lock); > >>> + > >>> + for (order = MAX_ORDER - 1; order >= 0; order--) { > >> > >> I scratched my head for a bit on this one. Why are you walking over > >> orders, > >> *then* zones. I *think* you're doing it because you can efficiently > >> fill the bitmaps at a

Re: [Qemu-devel] [PATCH ppc-for-2.9 00/13] POWER9 TCG enablements - part9

On Mon, Dec 05, 2016 at 04:55:17PM +0530, Nikunj A Dadhania wrote: > This series contains 12 new instructions for POWER9 ISA3.0 > Couple of consolidation patches > VSX Vector Insert/Extract Word > VSX Vector Permute > VSX Load/Store with length > VSX Scalar Quad-Precision

Re: [Qemu-devel] [PATCH 13/13] target-ppc: Add xxperm and xxpermr instructions

On Mon, Dec 05, 2016 at 04:55:30PM +0530, Nikunj A Dadhania wrote: > From: Bharata B Rao > > xxperm: VSX Vector Permute > xxpermr: VSX Vector Permute Right-indexed > > Signed-off-by: Bharata B Rao > Signed-off-by: Nikunj A Dadhania

Re: [Qemu-devel] [PATCH 1/1] vfio iommu type1: set size to PAGE_SIZE while looking for iova in dma list

On 12/6/2016 4:24 AM, Alex Williamson wrote: > On Tue, 6 Dec 2016 02:38:01 +0530 > Kirti Wankhede wrote: > >> In the functions of pin_pages/unpin_pages from mdev vendor driver, >> vfio_find_dma() should be called with size as PAGE_SIZE instead of 0. >> vfio_find_dma()

Re: [Qemu-devel] [PATCH 1/1] vfio iommu type1: WARN_ON if notifier block is not unregistered

On 12/6/2016 4:56 AM, Alex Williamson wrote: > On Tue, 6 Dec 2016 02:38:20 +0530 > Kirti Wankhede wrote: > >> mdev vendor driver should unregister the iommu notifier since the vfio >> iommu can persist beyond the attachment of the mdev group. WARN_ON will >> show warning

Re: [Qemu-devel] [PATCH] nbd: Implement NBD_CMD_HAS_ZERO_INIT

I have already seen your proposal mail for NBD_FLAG_INIT_ZEROES extension. Thank you! 在 2016/12/6 0:54, Eric Blake 写道: On 12/05/2016 05:09 AM, Stefan Hajnoczi wrote: On Sun, Dec 04, 2016 at 11:44:57PM +, Yi Fang wrote: NBD client has not implemented callback for .bdrv_has_zero_init. So

Re: [Qemu-devel] [PATCH] nbd: Implement NBD_CMD_HAS_ZERO_INIT

Yes, you are right. It's not necessary to use such a command. I will subscribe nbd-general mail-list and implement has_zero_init during connection. Thank you! 在 2016/12/5 19:09, Stefan Hajnoczi 写道: On Sun, Dec 04, 2016 at 11:44:57PM +, Yi Fang wrote: NBD client has not implemented

[Qemu-devel] [PULL V2 2/3] fsl_etsec: Pad short payloads with zeros

From: Andrey Smirnov Depending on QEMU network setup it is possible for us to receive a complete Ethernet packet that is less 64 bytes long. One such example is when QEMU is configured to use a standalone TAP device (not set to be a part of any bridge) receives and ARP

[Qemu-devel] [PULL V2 3/3] fsl_etsec: Fix various small problems in hexdump code

From: Andrey Smirnov Fix various small problems in hexdump code, such as: - Reference to non-existing field etsec->nic->nc.name is replaced with nc->name - Type mismatch warnings Signed-off-by: Andrey Smirnov Signed-off-by: Jason

[Qemu-devel] [PULL V2 1/3] net: mcf: check receive buffer size register value

From: Prasad J Pandit ColdFire Fast Ethernet Controller uses a receive buffer size register(EMRBR) to hold maximum size of all receive buffers. It is set by a user before any operation. If it was set to be zero, ColdFire emulator would go into an infinite loop while

[Qemu-devel] [PULL V2 0/3] Net patches

The following changes since commit bd8ef5060dd2124a54578241da9a572faf7658dd: Merge remote-tracking branch 'dgibson/tags/ppc-for-2.8-20161201' into staging (2016-12-01 13:39:29 +) are available in the git repository at: https://github.com/jasowang/qemu.git tags/net-pull-request for you

Re: [Qemu-devel] [PULL 0/3] Net patches

On 2016年12月05日 22:35, Stefan Hajnoczi wrote: On Mon, Dec 05, 2016 at 05:52:00PM +0800, Jason Wang wrote: The following changes since commit bd8ef5060dd2124a54578241da9a572faf7658dd: Merge remote-tracking branch 'dgibson/tags/ppc-for-2.8-20161201' into staging (2016-12-01 13:39:29 +)

Re: [Qemu-devel] [PATCH v9 00/12] Add Mediated device support

On 12/06/2016 01:44 AM, Gerd Hoffmann wrote: > Hi, > >> Just want to share that we have published a KVMGT implementation >> based on this v9 patchset, to: >> >> https://github.com/01org/gvt-linux/tree/gvt-next-kvmgt >> >> It doesn't utilize common routines introduced by 05+ patches yet. >>

Re: [Qemu-devel] [PATCH v7 0/5] IOMMU: intel_iommu support map and unmap notifications

On Fri, Dec 02, 2016 at 10:30:34AM -0700, Alex Williamson wrote: [...] > On the host though, I'd expect we still have separate IOMMU domains, > one for each device and we do DMA_{UN}MAP ioctls separately per > container. Thanks, I have a RFC version of replay implementation that used the way

Re: [Qemu-devel] [PATCH v7 0/5] IOMMU: intel_iommu support map and unmap notifications

On 12/3/2016 1:30 AM, Alex Williamson wrote: > On Fri, 2 Dec 2016 14:08:59 +0800 > Peter Xu wrote: > >> On Thu, Dec 01, 2016 at 04:27:52PM +0800, Lan Tianyu wrote: >>> On 2016年11月30日 17:23, Peter Xu wrote: On Mon, Nov 28, 2016 at 05:51:50PM +0200, Aviv B.D wrote: > *

Re: [Qemu-devel] [PATCH for 2.8 v3 1/1] cadence_uart: Check baud rate generator and divider values on migration

Dear Alistair francis, As the issue is found by Jiangxin from Huawei test team, could you please change the "Reported-by" to Jiangxin , thank you. And keep Jiangxin in the email loop, thank you. Best regards, Huawei PSIRT -邮件原件- 发件人: Alistair

Re: [Qemu-devel] [PATCH for-2.9 1/3] crypto: add standard des support

> > From: Daniel P. Berrange [mailto:berra...@redhat.com] > Sent: Tuesday, December 06, 2016 12:59 AM > To: Gonglei (Arei) > Cc: longpeng; ebl...@redhat.com; arm...@redhat.com; > qemu-devel@nongnu.org; Wubin (H); Zhoujian (jay, Euler) > Subject: Re: [PATCH for-2.9 1/3] crypto: add standard des

Re: [Qemu-devel] [qemu patch V3 2/2] kvmclock: reduce kvmclock difference on migration

On Mon, Dec 05, 2016 at 03:20:16PM -0200, Marcelo Tosatti wrote: > On Mon, Dec 05, 2016 at 01:17:42PM -0200, Eduardo Habkost wrote: [...] > > > > > > > > +static void kvm_get_clock(KVMClockState *s) > > > > +{ > > > > +struct kvm_clock_data data; > > > > +int ret; > > > > + > > > > +

Re: [Qemu-devel] [Qemu-ppc] [PATCH 2/7] target-ppc: Implement unsigned quadword left/right shift and unit tests

On Mon, Dec 05, 2016 at 07:35:39AM -0200, jos...@linux.vnet.ibm.com wrote: > On Mon, Dec 05, 2016 at 12:56:39PM +1100, David Gibson wrote: > > On Sat, Dec 03, 2016 at 05:37:27PM -0800, Richard Henderson wrote: > > > On 12/02/2016 09:00 PM, Jose Ricardo Ziviani wrote: > > > > +++

Re: [Qemu-devel] [Qemu-ppc] [PATCH 5/7] target-ppc: Implement bcdsr. instruction

On Mon, Dec 05, 2016 at 04:52:57PM -0200, jos...@linux.vnet.ibm.com wrote: > On Mon, Dec 05, 2016 at 02:19:26PM +1100, David Gibson wrote: > > On Sat, Dec 03, 2016 at 03:00:04AM -0200, Jose Ricardo Ziviani wrote: > > > bcdsr.: Decimal shift and round. This instruction works like bcds. > > >

Re: [Qemu-devel] Unable to add ram object with same ID after addition, migration and removal at the target

On Mon, Dec 05, 2016 at 12:44:53AM -0600, Michael Roth wrote: > Quoting Bharata B Rao (2016-12-04 21:51:32) > > On Fri, Dec 2, 2016 at 11:46 PM, Dr. David Alan Gilbert > > > > wrote: > > > > * Bharata B Rao (bharata@gmail.com) wrote: > > > Hi, > > > > >

Re: [Qemu-devel] [PATCH for-2.9 15/17] target-i386: Define static "base" CPU model

On Mon, Dec 05, 2016 at 07:18:47PM +0100, David Hildenbrand wrote: > Am 02.12.2016 um 22:18 schrieb Eduardo Habkost: > > The query-cpu-model-expand QMP command needs at least one static > > model, to allow the "static" expansion mode to be implemented. > > Instead of defining static versions of

Re: [Qemu-devel] [PATCH for-2.9 00/17] target-i386: Implement query-cpu-model-expansion

On Mon, Dec 05, 2016 at 07:13:36PM +0100, David Hildenbrand wrote: > > > > Is static really needed? I can understand why migration-safe might be > > > of interest, but can't see how "static" could help (I mean we have > > > static expansion for this purpose). Do you have anything special in > > >

[Qemu-devel] [PATCH for-2.9 07/10] memhp: move GPE handler_E03 into build_memory_hotplug_aml()

>From this patch all the memory hotplug related AML bits are consolidated in one place within DSTD. Follow up patches will utilize that to simplify memory hotplug related C/AML code. Signed-off-by: Igor Mammedov --- include/hw/acpi/memory_hotplug.h | 6 +++---

[Qemu-devel] [PATCH for-2.9 06/10] memhp: merge build_memory_devices() into build_memory_hotplug_aml()

It consolidates memory hotplug AML in one place within DSDT Signed-off-by: Igor Mammedov --- include/hw/acpi/memory_hotplug.h | 2 -- hw/acpi/memory_hotplug.c | 14 - hw/i386/acpi-build.c | 61 ++-- 3 files

[Qemu-devel] [PATCH] doc: Propose NBD_FLAG_INIT_ZEROES extension

While not directly related to NBD_CMD_WRITE_ZEROES, the qemu team discovered that it is useful if a server can advertise whether an export is in a known-all-zeroes state at the time the client connects. Signed-off-by: Eric Blake --- doc/proto.md | 5 + 1 file changed, 5

[Qemu-devel] [PATCH for-2.9 10/10] memhp: move DIMM devices into dedicated scope with related common methods

Move DIMM devices from global _SB scope to a new \_SB.MHPC container along with common methods used by DIMMs: MCRS, MRST, MPXM, MOST, MEJ00, MSCN, MTFY this reduces AML size on 12 * #slots bytes, i.e. up to 3072 bytes for 265 slots. Signed-off-by: Igor Mammedov ---

[Qemu-devel] [PATCH for-2.9 03/10] memhp: move build_memory_hotplug_aml() into memory_hotplug.c

Signed-off-by: Igor Mammedov --- hw/acpi/Makefile.objs | 2 +- hw/acpi/memory_hotplug.c| 247 + hw/acpi/memory_hotplug_acpi_table.c | 262 3 files changed, 248 insertions(+), 263

[Qemu-devel] [PATCH for-2.9 09/10] memhp: don't generate memory hotplug AML if it's not enabled/supported

That reduces DSDT by 910 bytes when memory hotplug isn't enabled. While doing so drop intermediate variables/arguments passing around ACPI_MEMORY_HOTPLUG_IO_LEN and making it local to memory_hotplug.c, hardcoding it there as it can't change. Also don't pass around ACPI_MEMORY_HOTPLUG_BASE

[Qemu-devel] [PATCH for-2.9 04/10] memhp: move build_memory_devices() into memory_hotplug.c

Signed-off-by: Igor Mammedov --- include/hw/acpi/memory_hotplug.h | 2 + hw/acpi/memory_hotplug.c | 124 +++ hw/i386/acpi-build.c | 124 --- 3 files changed, 126 insertions(+), 124

[Qemu-devel] [PATCH for-2.9 02/10] tests: pc: acpi: add SRAT and DSDT blobs for memory hotplug variant

Signed-off-by: Igor Mammedov --- PS: note to maintainer when applied, this patch should be merged with previous patch "tests: pc: add memory hotplug acpi tables tests" to avoid 'make check" failure during bisect --- tests/acpi-test-data/pc/DSDT.memhp | Bin 0 -> 6613

[Qemu-devel] [PATCH for-2.9 05/10] memhp: consolidate scattered MHPD device declaration

since static and dynamic parts of memory MHPD device are now in the same table (DSDT), there is no point keeping them scattered across the table, so consolidate it in one place. There aren't any functional change, only AML text movement from externally refferenced MHPD scope directly into MHPD

[Qemu-devel] [PATCH for-2.9 08/10] memhp: move memory hotplug only defines to memory_hotplug.c

Move defines used locally only by memory_hotplug.c into it from header files. Signed-off-by: Igor Mammedov --- include/hw/acpi/memory_hotplug.h | 3 --- include/hw/acpi/pc-hotplug.h | 22 -- hw/acpi/memory_hotplug.c | 24

[Qemu-devel] [PATCH for-2.9 01/10] tests: pc: add memory hotplug acpi tables tests

Signed-off-by: Igor Mammedov --- tests/bios-tables-test.c | 24 1 file changed, 24 insertions(+) diff --git a/tests/bios-tables-test.c b/tests/bios-tables-test.c index 812f830..5404805 100644 --- a/tests/bios-tables-test.c +++

[Qemu-devel] [PATCH for-2.9 00/10] pc: acpi: memory hotplug cleanup/consolidation

Series cleanups and consolidates scattered memory hotplug code so it could be easily reused by ARM target later. As result: * added memory hotplug variant to bios tables test * all ACPI related parts of memory hotplug are consolidated within memory_hotplug.c * DSDT table size is reduced

Re: [Qemu-devel] [PATCH 1/1] vfio iommu type1: WARN_ON if notifier block is not unregistered

On Tue, 6 Dec 2016 02:38:20 +0530 Kirti Wankhede wrote: > mdev vendor driver should unregister the iommu notifier since the vfio > iommu can persist beyond the attachment of the mdev group. WARN_ON will > show warning if vendor driver doesn't unregister the notifier and is

Re: [Qemu-devel] [PATCH 1/1] vfio iommu type1: set size to PAGE_SIZE while looking for iova in dma list

On Tue, 6 Dec 2016 02:38:01 +0530 Kirti Wankhede wrote: > In the functions of pin_pages/unpin_pages from mdev vendor driver, > vfio_find_dma() should be called with size as PAGE_SIZE instead of 0. > vfio_find_dma() searches for the range in dma_list. > > In

[Qemu-devel] [kvm-unit-tests RFC 15/15] arm/arm64: ITS test

This patch implements an example ITS test which - allocates a device - allocates a collection - maps the device to an ITT - maps the collection to a redistributor - creates an ITT entry for the device - requests an LPI for this entry the test checks the LPI hits the right CPU and triggers the

[Qemu-devel] [kvm-unit-tests RFC 12/15] arm/arm64: ITS: create collection

Helper function to create a collection, characterized by its collection id and the target address. Currently the number of collections cannot exceed the number of redistributors. Signed-off-by: Eric Auger --- --- lib/arm/asm/gic-v3-its.h | 1 + lib/arm/gic-v3-its.c

[Qemu-devel] [kvm-unit-tests RFC 07/15] arm/arm64: ITS: Init the command queue

Allocate the command queue and initialize related registers: CBASER, CREADR, CWRITER. The command queue is 64kB. This aims at not bothing with fullness. Signed-off-by: Eric Auger --- lib/arm/asm/gic-v3-its.h | 37 +

[Qemu-devel] [kvm-unit-tests RFC 13/15] arm/arm64: ITS: commands

Implement main ITS commands. The code is largely inherited from the ITS driver. Signed-off-by: Eric Auger --- arm/Makefile.common | 2 +- lib/arm/asm/gic-v3-its.h | 31 lib/arm/gic-v3-its-cmd.c | 399 +++ 3 files

[Qemu-devel] [kvm-unit-tests RFC 10/15] arm/arm64: ITS: its_enable_defaults

its_enable_defaults() is the top init function that allocates all the requested tables (device, collection, lpi config and pending tables), enable LPIs at distributor level and ITS level. gicv3_enable_defaults must be called before. Signed-off-by: Eric Auger ---

[Qemu-devel] [kvm-unit-tests RFC 14/15] arm/arm64: gic: Generalize ipi_enable()

For ITS test we plan to reuse the ipi_enable() code to install the IRQ handler and enable the IRQ at CPU level. Let's rename the function into setup_irq(). Signed-off-by: Eric Auger --- arm/gic.c | 14 -- 1 file changed, 8 insertions(+), 6 deletions(-) diff

[Qemu-devel] [kvm-unit-tests RFC 06/15] arm/arm64: ITS: Set the LPI config and pending tables

Allocate the LPI configuration and per re-distributor pending table. Set redistributor's PROPBASER and PENDBASER. The LPIs are enabled by default in the config table. Signed-off-by: Eric Auger --- lib/arm/asm/gic-v3-its.h | 20 + lib/arm/asm/gic-v3.h | 77

[Qemu-devel] [kvm-unit-tests RFC 05/15] arm/arm64: GICv3: add cpu count

Add a new cpu_count field in gicv3_data indicating the number of redistributors. This will be useful for enumeration of their resources such as LPI pending tables. Signed-off-by: Eric Auger --- lib/arm/asm/gic-v3.h | 1 + lib/arm/gic-v3.c | 2 ++ 2 files changed, 3

[Qemu-devel] [kvm-unit-tests RFC 11/15] arm/arm64: ITS: create device

Introduce an helper function that registers a new device candidate to send MSIs on the ITS. The device is characterized by its device id, the number of event ids. This dimensions the associated interrupt translation table (ITT), allocated by this function. Signed-off-by: Eric Auger

[Qemu-devel] [kvm-unit-tests RFC 09/15] arm/arm64: ITS: Parse the typer register

Parse the ITS TYPER and populates the associate its_data field. Some of the info are needed for command handling, typically the PTA bit which reports the target address encoding type. Signed-off-by: Eric Auger --- lib/arm/asm/gic-v3-its.h | 23 +++

[Qemu-devel] [kvm-unit-tests RFC 04/15] arm/arm64: ITS: BASER parsing and setup

Add helper routines to parse BASER registers and set them up Signed-off-by: Eric Auger --- lib/arm/asm/gic-v3-its.h | 72 +++ lib/arm/gic-v3-its.c | 79 2 files changed, 151

[Qemu-devel] [kvm-unit-tests RFC 03/15] arm/arm64: ITS skeleton

At the moment we just detect the presence of ITS as part of the GICv3 init routine and initialize its base address. Signed-off-by: Eric Auger --- arm/Makefile.common| 1 + lib/arm/asm/gic-v3-its.h | 22 ++ lib/arm/asm/gic.h | 1 +

[Qemu-devel] [kvm-unit-tests RFC 08/15] arm/arm64: ITS: enable LPIs at re-distributor level

This helper function enables the signaling of LPIs by the redistributor to the connected PE. Signed-off-by: Eric Auger --- lib/arm/asm/gic-v3-its.h | 1 + lib/arm/gic-v3-its.c | 15 +++ 2 files changed, 16 insertions(+) diff --git

[Qemu-devel] [kvm-unit-tests RFC 02/15] arm/arm64: gicv3: Add some re-distributor defines

PROPBASER, PENDBASE and GICR_CTRL will be used for LPI management. Signed-off-by: Eric Auger --- lib/arm/asm/gic-v3.h | 6 ++ 1 file changed, 6 insertions(+) diff --git a/lib/arm/asm/gic-v3.h b/lib/arm/asm/gic-v3.h index 22deb4b..ed330af 100644 ---

[Qemu-devel] [kvm-unit-tests RFC 01/15] libcflat: Add other size defines

Introduce additional SZ_256, SZ_8K, SZ_16K macros that will be used by ITS tests. Signed-off-by: Eric Auger --- lib/libcflat.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/lib/libcflat.h b/lib/libcflat.h index bdcc561..880810a 100644 --- a/lib/libcflat.h +++

[Qemu-devel] [kvm-unit-tests RFC 00/15] arm/arm64: add ITS framework

This series proposes a framework to test the virtual ITS. This is based on Drew's v7 series [1]. The last patch tests several ITS commands (collection/device mapping, interrupt translation service entry creation and LPI trigger through INT command). At this point we don't use any external PCIe

[Qemu-devel] [PULL for-2.8 3/3] qemu-doc: update gluster protocol usage guide

From: Prasanna Kumar Kalever Document: 1. The new debug and logfile options with their usages 2. New json format and its usage and 3. update "GlusterFS, Device URL Syntax" section in "Invocation" Signed-off-by: Prasanna Kumar Kalever

[Qemu-devel] [PULL for-2.8 1/3] block/gluster: fix QMP to match debug option

From: Prasanna Kumar Kalever The QMP definition of BlockdevOptionsGluster: { 'struct': 'BlockdevOptionsGluster', 'data': { 'volume': 'str', 'path': 'str', 'server': ['GlusterServer'], '*debug-level': 'int',

[Qemu-devel] [PULL for-2.8 2/3] block/nfs: fix QMP to match debug option

From: Prasanna Kumar Kalever The QMP definition of BlockdevOptionsNfs: { 'struct': 'BlockdevOptionsNfs', 'data': { 'server': 'NFSServer', 'path': 'str', '*user': 'int', '*group': 'int', '*tcp-syn-count': 'int',

[Qemu-devel] [PULL for-2.8 0/3] Block patches for -rc3

The following changes since commit bc66cedb4141fb7588f2462c74310d8fb5dd4cf1: Merge remote-tracking branch 'yongbok/tags/mips-20161204' into staging (2016-12-05 10:56:45 +) are available in the git repository at: https://github.com/codyprime/qemu-kvm-jtc.git tags/block-pull-request for

Re: [Qemu-devel] [PATCH for-2.8 v3 2/3] block/nfs: fix QMP to match debug option

On 11/02/2016 11:50 AM, Prasanna Kumar Kalever wrote: > The QMP definition of BlockdevOptionsNfs: > { 'struct': 'BlockdevOptionsNfs', > 'data': { 'server': 'NFSServer', > 'path': 'str', > '*user': 'int', > '*group': 'int', > '*tcp-syn-count':

Re: [Qemu-devel] [PATCH for-2.8 v3 3/3] qemu-doc: update gluster protocol usage guide

On 11/02/2016 11:50 AM, Prasanna Kumar Kalever wrote: > Document: > 1. The new debug and logfile options with their usages > 2. New json format and its usage and > 3. update "GlusterFS, Device URL Syntax" section in "Invocation" > > Signed-off-by: Prasanna Kumar Kalever

Re: [Qemu-devel] [PATCH for-2.8 v3 1/3] block/gluster: fix QMP to match debug option

On 11/02/2016 11:50 AM, Prasanna Kumar Kalever wrote: > The QMP definition of BlockdevOptionsGluster: > { 'struct': 'BlockdevOptionsGluster', > 'data': { 'volume': 'str', > 'path': 'str', > 'server': ['GlusterServer'], > '*debug-level': 'int', >

Re: [Qemu-devel] [PATCH for-2.8 v3 1/3] block/gluster: fix QMP to match debug option

On Mon, Dec 05, 2016 at 03:10:32PM -0600, Eric Blake wrote: > On 11/02/2016 11:50 AM, Prasanna Kumar Kalever wrote: > > The QMP definition of BlockdevOptionsGluster: > > { 'struct': 'BlockdevOptionsGluster', > > 'data': { 'volume': 'str', > > 'path': 'str', > > 'server':

[Qemu-devel] [PATCH 1/1] vfio iommu type1: WARN_ON if notifier block is not unregistered

mdev vendor driver should unregister the iommu notifier since the vfio iommu can persist beyond the attachment of the mdev group. WARN_ON will show warning if vendor driver doesn't unregister the notifier and is forced to follow the implementations steps. Signed-off-by: Kirti Wankhede

[Qemu-devel] [PATCH 1/1] vfio iommu type1: set size to PAGE_SIZE while looking for iova in dma list

In the functions of pin_pages/unpin_pages from mdev vendor driver, vfio_find_dma() should be called with size as PAGE_SIZE instead of 0. vfio_find_dma() searches for the range in dma_list. In vfio_dma_do_unmap(), vfio_find_dma() when used to look for start address of unmap->iova, size should be

Re: [Qemu-devel] [libvirt] [Qemu-ppc] [RFC PATCH qemu] spapr_pci: Create PCI-express root bus by default

(Sorry for any duplicates. I sent it from the wrong address the first time) On 12/01/2016 11:18 PM, David Gibson wrote: On Fri, Nov 25, 2016 at 02:46:21PM +0100, Andrea Bolognani wrote: On Wed, 2016-11-23 at 16:00 +1100, David Gibson wrote: Existing libvirt versions assume that pseries guests

Re: [Qemu-devel] [PATCH v4 12/13] aio: self-tune polling time

On 12/01/2016 08:26 PM, Stefan Hajnoczi wrote: > This patch is based on the algorithm for the kvm.ko halt_poll_ns > parameter in Linux. The initial polling time is zero. > > If the event loop is woken up within the maximum polling time it means > polling could be effective, so grow polling time.

Re: [Qemu-devel] [PATCH for-2.8 v2] qcow2: Don't strand clusters near 2G intervals during commit

On 12/05/2016 10:49 AM, Eric Blake wrote: > The qcow2_make_empty() function is reached during 'qemu-img commit', > in order to clear out ALL clusters of an image. However, if the > image cannot use the fast code path (true if the image is format > 0.10, or if the image contains a snapshot), the

Re: [Qemu-devel] [PATCH for-2.8] qdev: apply global properties in reverse order

On Mon, 5 Dec 2016 14:48:29 -0200 Eduardo Habkost wrote: > On Mon, Dec 05, 2016 at 04:42:00PM +0100, Cornelia Huck wrote: > > On Mon, 05 Dec 2016 16:21:22 +0100 > > Greg Kurz wrote: > > > > > The current code recursively applies global properties from

Re: [Qemu-devel] [PATCH for-2.8] qdev: apply global properties in reverse order

On Mon, 5 Dec 2016 16:42:00 +0100 Cornelia Huck wrote: > On Mon, 05 Dec 2016 16:21:22 +0100 > Greg Kurz wrote: > > > The current code recursively applies global properties from child up to > > parent. So, if you have: > > > > -global

Re: [Qemu-devel] [PATCH for-2.9 1/3] crypto: add standard des support

On 12/05/2016 02:59 AM, Longpeng(Mike) wrote: > This patch add standart DES support. s/standart/standard/ > > Signed-off-by: Longpeng(Mike) > --- > +++ b/qapi/crypto.json > @@ -75,7 +75,7 @@ > { 'enum': 'QCryptoCipherAlgorithm', >'prefix': 'QCRYPTO_CIPHER_ALG', >

Re: [Qemu-devel] [libvirt] [Qemu-ppc] [RFC PATCH qemu] spapr_pci: Create PCI-express root bus by default

On 12/01/2016 11:18 PM, David Gibson wrote: On Fri, Nov 25, 2016 at 02:46:21PM +0100, Andrea Bolognani wrote: On Wed, 2016-11-23 at 16:00 +1100, David Gibson wrote: Existing libvirt versions assume that pseries guests have a legacy PCI root bus, and will base their PCI address allocation / PCI

Re: [Qemu-devel] [Qemu-ppc] [PATCH 5/7] target-ppc: Implement bcdsr. instruction

On Mon, Dec 05, 2016 at 02:19:26PM +1100, David Gibson wrote: > On Sat, Dec 03, 2016 at 03:00:04AM -0200, Jose Ricardo Ziviani wrote: > > bcdsr.: Decimal shift and round. This instruction works like bcds. > > however, when performing right shift, 1 will be added to the > > result if the last digit

Re: [Qemu-devel] [PATCH v2] scripts: add "git.orderfile" for ordering diff hunks by pathname patterns

On 12/05/2016 05:24 AM, Laszlo Ersek wrote: > > I suggest we go ahead with this posting (or v1), then people can submit > whatever improvements they deem fit, from their personal experience. I > think the initial version should be minimal and non-controversial. > > We've already spent a

[Qemu-devel] [PATCH for 2.8 v3 1/1] cadence_uart: Check baud rate generator and divider values on migration

The Cadence UART device emulator calculates speed by dividing the baud rate by a 'baud rate generator' & 'baud rate divider' value. The device specification defines these register values to be non-zero and within certain limits. Checks were recently added when writing to these registers but not

Re: [Qemu-devel] [PATCH 12/13] target-ppc: implement xscpsgnqp instruction

On 12/05/2016 03:25 AM, Nikunj A Dadhania wrote: > xscpsgnqp: VSX Scalar Copy Sign Quad-Precision > > Signed-off-by: Nikunj A Dadhania > --- > target-ppc/translate/vsx-impl.inc.c | 12 +++- > target-ppc/translate/vsx-ops.inc.c | 1 + > 2 files changed, 12

Re: [Qemu-devel] [PATCH for-2.9 15/17] target-i386: Define static "base" CPU model

Am 02.12.2016 um 22:18 schrieb Eduardo Habkost: The query-cpu-model-expand QMP command needs at least one static model, to allow the "static" expansion mode to be implemented. Instead of defining static versions of every CPU model, define a "base" CPU model that has absolutely no feature flag

Re: [Qemu-devel] [PATCH 11/13] target-ppc: implement xsnegqp instruction

On 12/05/2016 03:25 AM, Nikunj A Dadhania wrote: > +case OP_NEG: \ > +tcg_gen_xor_i64(xbh, xbh, sgm); \ > +tcg_gen_xori_i64(xbl, xbl, 0);\ > +break;

Re: [Qemu-devel] [PATCH 08/13] target-ppc: implement xxinsertw instruction

On 12/05/2016 03:25 AM, Nikunj A Dadhania wrote: > xxinsertw: VSX Vector Insert Word > > Signed-off-by: Nikunj A Dadhania > --- > target-ppc/helper.h | 1 + > target-ppc/int_helper.c | 30 ++ >

Re: [Qemu-devel] [PATCH for-2.8] qdev: apply global properties in reverse order

On 12/05/2016 06:41 PM, Eduardo Habkost wrote: > On Mon, Dec 05, 2016 at 06:25:55PM +0100, Cornelia Huck wrote: >> > On Mon, 5 Dec 2016 14:48:29 -0200 >> > Eduardo Habkost wrote: >> > >>> > > On Mon, Dec 05, 2016 at 04:42:00PM +0100, Cornelia Huck wrote: > > > On Mon,

Re: [Qemu-devel] [PATCH 10/13] target-ppc: implement xsabsqp/xsnabsqp instruction

On 12/05/2016 03:25 AM, Nikunj A Dadhania wrote: > xsabsqp: VSX Scalar Absolute Quad-Precision > xsnabsqp: VSX Scalar Negative Absolute Quad-Precision > > Signed-off-by: Nikunj A Dadhania > --- > target-ppc/translate/vsx-impl.inc.c | 35

Re: [Qemu-devel] [PATCH for-2.9 00/17] target-i386: Implement query-cpu-model-expansion

Is static really needed? I can understand why migration-safe might be of interest, but can't see how "static" could help (I mean we have static expansion for this purpose). Do you have anything special in mind regarding exposing "static"? I didn't have any specific use case in mind. My main

Re: [Qemu-devel] [PATCH 07/13] target-ppc: implement xxextractuw instruction

On 12/05/2016 03:25 AM, Nikunj A Dadhania wrote: > +static void gen_##name(DisasContext *ctx) \ > +{ \ > +TCGv xt, xb;\ > +TCGv_i32 t0 = tcg_temp_new_i32();

Re: [Qemu-devel] [QEMU PATCH v14 0/4] migration: migrate QTAILQ

ping On 11/23/2016 09:53 AM, Jianjun Duan wrote: > Hi all, > > I addressed some review comments. Comments are welcome. > > v14: - Fixed a return statement. > > Previous versions are: > > v13: - Changed some QTAILQ related macro names to match existing ones. > (link:

Re: [Qemu-devel] [PATCH for-2.8] target-arm/translate-a64: fix gen_load_exclusive

On 5 December 2016 at 17:22, Richard Henderson wrote: > Acked-by: Richard Henderson Thanks. I've put this into a one-patch pullrequest which I've just sent out and which will hopefully make -rc3. thanks -- PMM

Re: [Qemu-devel] [PATCH 04/13] target-ppc: implement lxvll instruction

On 12/05/2016 09:52 AM, Richard Henderson wrote: > On 12/05/2016 03:25 AM, Nikunj A Dadhania wrote: >> +void helper_lxvll(CPUPPCState *env, target_ulong addr, >> + target_ulong xt_num, target_ulong rb) >> +{ >> +ppc_vsr_t xt; >> + >> +getVSR(xt_num, , env); >> +if

[Qemu-devel] [PULL 0/1] target-arm queue

in the git repository at: git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20161205 for you to fetch changes up to 5460da501a57cd72eda6fec736d76539122e2f99: target-arm/translate-a64: fix gen_load_exclusive (2016-12-05 17:52:01 +

[Qemu-devel] [PULL 1/1] target-arm/translate-a64: fix gen_load_exclusive

From: Alex Bennée While testing rth's latest TCG patches with risu I found ldaxp was broken. Investigating further I found it was broken by 1dd089d0 when the cmpxchg atomic work was merged. As part of that change the code attempted to be clever by doing a single 64 bit

Re: [Qemu-devel] [PATCH 06/13] target-ppc: implement stxvll instructions

On 12/05/2016 03:25 AM, Nikunj A Dadhania wrote: > +getVSR(xt_num, , env); > +if (msr_le) { > +for (i = 0; i < end; i++) { > +cpu_stb_data_ra(env, addr, xt.u8[i], GETPC()); > +addr = addr_add(env, addr, 1); > +} > +} else { > +for (i =

Re: [Qemu-devel] [PATCH 05/13] target-ppc: implement stxvl instruction

On 12/05/2016 03:25 AM, Nikunj A Dadhania wrote: > +for (i = 15; i > 15 - end; i--) { > +cpu_stb_data_ra(env, addr, xt.u8[i], GETPC()); > +addr = addr_add(env, addr, 1); > +} (1) you need to handle nb > 16. (2) don't you need different byte indexing for little-endian? r~

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