Rename the error_print_loc() function in preparation for using it to
print warnings as well.
Signed-off-by: Alistair Francis
Reviewed-by: Philippe Mathieu-Daudé
---
util/qemu-error.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
Signed-off-by: Cédric Le Goater
---
hw/intc/xive_spapr.c | 5 +
hw/ppc/spapr.c| 4
include/hw/ppc/xive.h | 1 +
3 files changed, 10 insertions(+)
diff --git a/hw/intc/xive_spapr.c b/hw/intc/xive_spapr.c
index eb8a5c081e51..4f689f8b97c0 100644
---
QEMU currently has a standard method to report errors with
error_repot(). This ensure a sane and standard format when printing
errors. This series is attempting to extend this functionality for
warnings and information as well.
At the moment only one error is being converted, I wanted to get the
Eric Blake writes:
> On 06/21/2017 10:34 AM, Vladimir Sementsov-Ogievskiy wrote:
>> Move to modern errp scheme from just LOGging errors.
>>
>> Signed-off-by: Vladimir Sementsov-Ogievskiy
>> ---
>> nbd/server.c | 268
>>
Signed-off-by: Cédric Le Goater
---
hw/intc/xive_spapr.c | 10 ++
hw/ppc/spapr.c| 11 ++-
include/hw/ppc/xive.h | 1 +
3 files changed, 21 insertions(+), 1 deletion(-)
diff --git a/hw/intc/xive_spapr.c b/hw/intc/xive_spapr.c
index
Let's create the XIVE object whether it used or not by the
machine. CAS will decide which model will be used for the interrupt
controller.
Signed-off-by: Cédric Le Goater
---
hw/ppc/spapr.c | 41 +
1 file changed, 41 insertions(+)
diff
The IRQ number allocator is inspired by OPAL which allocates IPI IRQ
numbers from the bottom of the IRQ number space and allocates the HW
IRQ numbers from the top.
So, this might be slightly overkill for our need. Needs to be
discussed.
Signed-off-by: Cédric Le Goater
---
Signed-off-by: Cédric Le Goater
---
hw/intc/xive.c| 21 +
include/hw/ppc/xive.h | 4
2 files changed, 25 insertions(+)
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index 895dd2b2f61b..bec123649ebd 100644
--- a/hw/intc/xive.c
+++ b/hw/intc/xive.c
On Wed, 5 Jul 2017 13:42:03 +0100
Jean-Philippe Brucker wrote:
> On 05/07/17 07:45, Tian, Kevin wrote:
> >> From: Liu, Yi L
> >> Sent: Monday, July 3, 2017 6:31 PM
> >>
> >> Hi Jean,
> >>
> >>
> >>>
> 2. Define a structure in
It will be used when the guest chooses the XIVE exploitation mode in
CAS.
Signed-off-by: Cédric Le Goater
---
hw/intc/xive.c| 11 +++
include/hw/ppc/xive.h | 2 ++
2 files changed, 13 insertions(+)
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index
On 07/05/2017 12:04 PM, Max Reitz wrote:
> Or, well, yes, it is in this case, but I meant literally UINT64_MAX + 1,
> not the uint64_t value. I meant the natural number 2^64.
>
> Because the issue is that (double)UINT64_MAX will (or may, depending on
> the environment and such) give us 2.0^64 ==
On 07/05/2017 12:00 PM, Max Reitz wrote:
>> (uint64_t)(UINT64_MAX + 1) is well-defined - it is 0.
>>
>> (Adding in unsigned integers is always well-defined - it wraps around on
>> mathematical overflow modulo the integer size. You're thinking of
>> overflow addition on signed integers, which is
The CAS negotiation process determines the interrupt controller model
to use in the guest but currently, the sPAPR machine make uses of the
controller very early in the initialization sequence. The interrupt
source is used to allocate IRQ numbers and populate the device tree
and the interrupt
A set of Hypervisor's call are used to configure the interrupt sources
and the event/notification queues of the guest:
H_INT_GET_SOURCE_INFO
H_INT_SET_SOURCE_CONFIG
H_INT_GET_SOURCE_CONFIG
H_INT_GET_QUEUE_INFO
H_INT_SET_QUEUE_CONFIG
H_INT_GET_QUEUE_CONFIG
H_INT_RESET
Isolate the IPIs in their own interrupt source.
This is not strictly needed for sPAPR, but it might useful for
PowerNV.
Signed-off-by: Cédric Le Goater
---
hw/intc/xive-internal.h | 2 ++
hw/intc/xive.c | 24 +++-
2 files changed, 25 insertions(+),
If a triggered event is let through, the event queue data defined in
the associated IVE is pushed in the in-memory event queue of the
OS. The latter is a memory ring buffer defined by the OS with
H_INT_SET_QUEUE_CONFIG hcall.
Then, an interrupt presenter is located and notified. See next patch.
On 07/05/2017 06:27 PM, Christian Borntraeger wrote:
> On 07/05/2017 05:29 PM, Cornelia Huck wrote:
>> On Wed, 5 Jul 2017 15:54:07 +0200
>> Halil Pasic wrote:
>>
>>> My patch "s390x: fix error propagation in kvm-flic's realize" accidentally
>>> replaced with. That's
The Thread Interrupt Management Area for the OS is mostly used to
acknowledge interrupts and set the CPPR of the CPU.
The TIMA is mapped at the same address for each CPU. 'current_cpu' is
used to retrieve the targeted interrupt presenter object.
Signed-off-by: Cédric Le Goater
As for XICS, the XIVE interface for the guest is described in the
device tree under the interrupt controller node. A couple of new
properties are specific to XIVE :
- "reg"
contains the base address and size of the thread interrupt
managnement areas (TIMA) for the user level for the OS
Signed-off-by: Cédric Le Goater
---
hw/intc/xive.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index c3c1e9c9db2d..cda1fa18e44d 100644
--- a/hw/intc/xive.c
+++ b/hw/intc/xive.c
@@ -53,6 +53,21 @@ static uint64_t
This handler will be used to customize the ouput of the XIVE interrupt
source and presenter objects.
Signed-off-by: Cédric Le Goater
---
hw/intc/xics.c| 36
include/hw/ppc/xics.h | 2 ++
2 files changed, 26 insertions(+), 12
Just like the interrupt source model, we try to reuse the ICP model
because the sPAPR machine is tied to the XICSFabric interface and
should be using a common framework to switch from one controller model
to another: XICS <-> XIVE.
The XIVE interrupt presenter exposes a set of Thread Interrupt
The address of the MMIO page through which the Event State Buffer is
controlled is returned to the guest by the H_INT_GET_SOURCE_INFO hcall.
Signed-off-by: Cédric Le Goater
---
hw/intc/xive.c| 3 +++
include/hw/ppc/xive.h | 1 +
2 files changed, 4 insertions(+)
diff
These flags define some characteristics of the source :
- XIVE_SRC_H_INT_ESB the Event State Buffer are controlled with a
specific hcall H_INT_ESB
- XIVE_SRC_LSILSI or MSI source
- XIVE_SRC_TRIGGERthe full function page supports trigger
- XIVE_SRC_STORE_EOI
This is much like the default one but we expose the PQ bits also.
Signed-off-by: Cédric Le Goater
---
hw/intc/xive.c | 20
1 file changed, 20 insertions(+)
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index 0db97fd33981..db808e0cbe3d 100644
---
Each source adds its own ESB mempry region to the overall ESB memory
region of the controller. It will be mapped in the CPU address space
when XIVE is activated.
The default mapping address for the ESB memory region is the same one
used on baremetal.
Signed-off-by: Cédric Le Goater
Prepare ground for the new exception model XIVE of POWER9.
Signed-off-by: Cédric Le Goater
---
target/ppc/cpu-qom.h| 2 ++
target/ppc/excp_helper.c| 9 ++---
target/ppc/translate.c | 3 ++-
target/ppc/translate_init.c | 2 +-
4 files changed, 11
Each interrupt source is associated with a 2-bit state machine called
an Event State Buffer (ESB). It is controlled by MMIO to trigger
events.
See code for more details on the states.
Signed-off-by: Cédric Le Goater
---
hw/intc/xive.c| 230
This is very similar to the current ICS_SIMPLE model in XICS. We try
to reuse the ICS model because the sPAPR machine is tied to the
XICSFabric interface and should be using a common framework to switch
from one controller model to another: XICS <-> XIVE.
The next patch will introduce the MMIO
Let's provide an empty shell for the XIVE controller model with a
couple of attributes for the IRQ number allocator. The latter is
largely inspired by OPAL which allocates IPI IRQ numbers from the
bottom of the IRQ number space and allocates the HW IRQ numbers from
the top.
The number of IPIs is
The XIVE interrupt controller of the POWER9 uses a set of tables to
redirect exception from event sources to CPU threads. Among which we
choose to model :
- the State Bit Entries (SBE), also known as Event State Buffer
(ESB). This is a two bit state machine for each event source which
is
When XIVE is supported, the device tree should be populated
accordingly and the XIVE memory regions mapped to activate MMIOs.
Depending on the design we choose, we could also allocate different
ICS and ICP objects, or switch between objects. This needs to be
discussed.
Signed-off-by: Cédric Le
On POWER9, the Client Architecture Support (CAS) negotiation process
determines whether the guest operates in XIVE Legacy compatibility
(the former POWER8 interrupt model) or in XIVE exploitation mode (the
newer POWER9 interrupt model).
Bit 7 of Byte 23 of vector 5 is used for this purpose.
On a POWER9 sPAPR machine, the Client Architecture Support (CAS)
negotiation process determines whether the guest operates with an
interrupt controller using the XICS legacy model, as found on POWER8,
or in XIVE exploitation mode, the newer POWER9 interrupt model. This
patchset is a first proposal
On 2017-07-05 19:00, Max Reitz wrote:
> On 2017-07-05 18:29, Eric Blake wrote:
>> On 07/05/2017 11:22 AM, Max Reitz wrote:
>>
>> return (double)x == x && x == y;
>
> Yes, that would do, too; and spares me of having to think about how well
> comparing an arbitrary double to
On 2017-07-05 18:29, Eric Blake wrote:
> On 07/05/2017 11:22 AM, Max Reitz wrote:
>
> return (double)x == x && x == y;
Yes, that would do, too; and spares me of having to think about how well
comparing an arbitrary double to UINT64_MAX actually works. :-)
>>>
>>> On second
On Jul 5, 2017, at 12:42 PM, qemu-devel-requ...@nongnu.org wrote:
Hi,
An interesting bug was reported on #qemu today. It was bisected to
8d04fb55 (drop global lock for TCG) and only occurred when QEMU was
run
with taskset -c 0. Originally the fingers where pointed at mttcg
but it
occurs
On 05/07/2017 18:40, Marc-André Lureau wrote:
> Hi
>
> - Original Message -
>>
>>
>> On 05/07/2017 18:06, Marc-André Lureau wrote:
> coroutine_fn too)
It's not controversial, I would not have expected the functions to call
coroutine_fn. :) How do they do that?
>>>
Hi
- Original Message -
>
>
> On 05/07/2017 18:06, Marc-André Lureau wrote:
> >>> coroutine_fn too)
> >> It's not controversial, I would not have expected the functions to call
> >> coroutine_fn. :) How do they do that?
> >>
> > For example, null_co_readv() calls null_co_common()
Am 27.06.2017 um 21:24 hat Eric Blake geschrieben:
> Rather than having a void function that modifies its input
> in-place as the output, change the signature to reduce a layer
> of indirection and return the result.
>
> Suggested-by: John Snow
> Signed-off-by: Eric Blake
Am 27.06.2017 um 21:24 hat Eric Blake geschrieben:
> We are gradually converting to byte-based interfaces, as they are
> easier to reason about than sector-based. Convert another internal
> function (no semantic change).
>
> Signed-off-by: Eric Blake
> Reviewed-by: John Snow
On 05/07/17 16:46, Markus Armbruster wrote:
I've been working on a patchset that brings the sun4u machine on
qemu-system-sparc64 much closer to a real Ultra 5, however due to
various design restrictions I need to be able to restrict how devices
are added to the machine with
* Daniel P. Berrange (berra...@redhat.com) wrote:
> On Wed, Jul 05, 2017 at 03:43:02PM +0100, Dr. David Alan Gilbert (git) wrote:
> > From: "Dr. David Alan Gilbert"
> >
> > The QMP query-vnc interfaces have gained a lot more information that
> > the HMP interfaces hasn't got
On 2017-07-05 18:22, Max Reitz wrote:
> On 2017-07-05 18:05, Max Reitz wrote:
>> On 2017-07-05 15:48, Max Reitz wrote:
>>> On 2017-07-05 09:07, Markus Armbruster wrote:
Max Reitz writes:
> This generic function (along with its implementations for different
>
On 07/05/2017 11:22 AM, Max Reitz wrote:
return (double)x == x && x == y;
>>>
>>> Yes, that would do, too; and spares me of having to think about how well
>>> comparing an arbitrary double to UINT64_MAX actually works. :-)
>>
>> On second thought, this won't do, because (double)x == x is
On Wed, Jul 05, 2017 at 03:43:02PM +0100, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> The QMP query-vnc interfaces have gained a lot more information that
> the HMP interfaces hasn't got yet. Update it.
>
> Note the output format has changed,
On 07/05/2017 05:29 PM, Cornelia Huck wrote:
> On Wed, 5 Jul 2017 15:54:07 +0200
> Halil Pasic wrote:
>
>> My patch "s390x: fix error propagation in kvm-flic's realize" accidentally
>> replaced with. That's wrong! So please apply this fixup before including
>
> This
- Original Message -
> From: "Dr. David Alan Gilbert"
>
> The QMP query-vnc interfaces have gained a lot more information that
> the HMP interfaces hasn't got yet. Update it.
>
> Note the output format has changed, but this is HMP so that's OK.
>
> In particular,
On 2017-07-05 18:05, Max Reitz wrote:
> On 2017-07-05 15:48, Max Reitz wrote:
>> On 2017-07-05 09:07, Markus Armbruster wrote:
>>> Max Reitz writes:
>>>
This generic function (along with its implementations for different
types) determines whether two QObjects are
On 05/07/2017 18:14, Peter Maydell wrote:
>> - Guest resets board, writing to some hw address (e.g.
>> arm_sysctl_write)
>> - This triggers qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET)
>> - We exit iowrite and drop the BQL
>> - vl.c schedules
On 5 July 2017 at 17:01, Alex Bennée wrote:
> An interesting bug was reported on #qemu today. It was bisected to
> 8d04fb55 (drop global lock for TCG) and only occurred when QEMU was run
> with taskset -c 0. Originally the fingers where pointed at mttcg but it
> occurs in
Eric Blake writes:
> On 07/05/2017 08:48 AM, Max Reitz wrote:
/**
+ * qnum_is_equal(): Test whether the two QNums are equal
+ */
+bool qnum_is_equal(const QObject *x, const QObject *y)
+{
+QNum *num_x = qobject_to_qnum(x);
+QNum
On 05/07/2017 18:06, Marc-André Lureau wrote:
>>> coroutine_fn too)
>> It's not controversial, I would not have expected the functions to call
>> coroutine_fn. :) How do they do that?
>>
> For example, null_co_readv() calls null_co_common() which calls
> co_aio_sleep_ns()
But these are
On 22/06/2017 14:17, Stefan Hajnoczi wrote:
> +@c man begin SYNOPSIS
> +QEMU block driver reference manual
> +@c man end
> +
I think this should be wrapped with @ignore / @end ignore. Otherwise
looks like a great idea.
Paolo
* Stefan Hajnoczi (stefa...@redhat.com) wrote:
> On Fri, Jun 30, 2017 at 12:26:10PM +0100, Dr. David Alan Gilbert wrote:
> > * ali saeedi (ali.saeed...@gmail.com) wrote:
> > > Hello
> > > what does 'DIRTY_MEMORY_BLOCK_SIZE' mean?
> > > is it the number of words in a block? or number of pages in a
Hi
- Original Message -
>
>
> On 05/07/2017 16:21, Marc-André Lureau wrote:
> >>
> >> They are, but it's an implementation detail. Why is this patch necessary?
> > I didn't think this would be controversial :) well, the checks I added to
> > clang verify function pointer share the
No, I can't. I did not build any peripherals. I expect other people to join
for this task.
On Wed, Jul 5, 2017, 6:59 PM Richard Henderson wrote:
> On 07/04/2017 08:34 PM, Michael Rolnik wrote:
> > Hi Richard.
> >
> > Thank you for finding a bug.
> > As for the testing
> > 1. I
On 2017-07-05 15:48, Max Reitz wrote:
> On 2017-07-05 09:07, Markus Armbruster wrote:
>> Max Reitz writes:
>>
>>> This generic function (along with its implementations for different
>>> types) determines whether two QObjects are equal.
>>>
>>> Signed-off-by: Max Reitz
Hi,
An interesting bug was reported on #qemu today. It was bisected to
8d04fb55 (drop global lock for TCG) and only occurred when QEMU was run
with taskset -c 0. Originally the fingers where pointed at mttcg but it
occurs in both single and multi-threaded modes.
I think the problem is
On 07/04/2017 08:34 PM, Michael Rolnik wrote:
Hi Richard.
Thank you for finding a bug.
As for the testing
1. I have a small program that calculates fibonacci numbers. I use it to test
mainly stack operations for different CPU flavors (1, 2 or 3 bytes PC).
2. I manually verified that I can
On Mon, Jul 3, 2017 at 11:53 PM, Markus Armbruster wrote:
> "Daniel P. Berrange" writes:
>
>> On Mon, Jul 03, 2017 at 04:07:21PM +0200, Markus Armbruster wrote:
>>> "Daniel P. Berrange" writes:
>>>
>>> > On Thu, Jun 29, 2017 at
Stefan Hajnoczi writes:
> On Mon, Jun 26, 2017 at 12:19:40PM +0200, Thomas Huth wrote:
>> On 26.06.2017 12:11, Daniel P. Berrange wrote:
>> > The 'sun_path' field in the sockaddr_un struct is not required
>> > to be NULL termianted, so when reporting an error, we must use
>>
Mark Cave-Ayland writes:
> On 05/07/17 06:38, Markus Armbruster wrote:
>
>> Copying Marcel for PCI expertise.
>>
>> Mark Cave-Ayland writes:
>>
>>> Hi all,
>>>
>>> I've been working on a patchset that brings the sun4u machine on
On Fri, Jun 30, 2017 at 3:37 AM, Paolo Bonzini wrote:
>
>
> On 29/06/2017 18:37, Alistair Francis wrote:
>>> Hmm, I think it's possible, poll_msgs is true here.
>> poll_msgs?
>>
>> If nhandles is 0 then we have already entered an earlier if statement
>> and set ready to
On Wed, 5 Jul 2017 17:25:45 +0200
Thomas Huth wrote:
> The start address has to be stored in big endian byte order
> in the iplb.ccw block for the guest.
>
> Signed-off-by: Thomas Huth
> ---
> hw/s390x/ipl.c | 2 +-
> 1 file changed, 1 insertion(+), 1
Eduardo Habkost writes:
> (CCing Greg, the original author of the code that added the
> enforce-config-section option)
>
> On Tue, Jul 04, 2017 at 10:06:54AM +0200, Markus Armbruster wrote:
>> Peter Xu writes:
>>
>> > It's never documented, and now we
On Wed, 5 Jul 2017 15:54:07 +0200
Halil Pasic wrote:
> My patch "s390x: fix error propagation in kvm-flic's realize" accidentally
> replaced with. That's wrong! So please apply this fixup before including
This sentence is missing something ;)
> that patch into
On 21/06/2017 17:34, Vladimir Sementsov-Ogievskiy wrote:
> Starting from this patch to enable traces use -trace option of qemu or
> -T, --trace option of qemu-img, qemu-io and qemu-nbd. For qemu traces
> also can be managed by qmp commands trace-event-{get,set}-state.
>
> Recompilation with
The start address has to be stored in big endian byte order
in the iplb.ccw block for the guest.
Signed-off-by: Thomas Huth
---
hw/s390x/ipl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/s390x/ipl.c b/hw/s390x/ipl.c
index 4e6469d..cc36003 100644
---
On 29/06/2017 21:36, Eric Blake wrote:
>> +memcpy(_magic, buf, 8);
>> +nbd_magic = be64_to_cpu(nbd_magic);
> Do we really need to copy the memory around twice? Can't we just use:
> magic = ldq_be_p(buf);
> and call it good?
Yes.
Paolo
signature.asc
Description: OpenPGP digital
On 05/07/2017 14:33, Vladimir Sementsov-Ogievskiy wrote:
>
>
>>> -static int GCC_FMT_ATTR(4, 5)
>>> +static int GCC_FMT_ATTR(5, 6)
>>> nbd_negotiate_send_rep_err(QIOChannel *ioc, uint32_t type,
>>> - uint32_t opt, const char *fmt, ...)
>>> +
On Tue, Jul 04, 2017 at 03:23:49PM +0200, QingFeng Hao wrote:
> This commit fixes iotest 068 for s390x as s390x uses virtio-scsi-ccw.
> It's based on commit c324fd0a39c by Stefan Hajnoczi.
> Thanks!
>
> Change history:
> v4:
> Got Cornelia Huck's Reviewed-by and take the comment to change
On 05/07/2017 16:02, Anton Nefedov wrote:
> {
> -if (!qemu_chr_fe_get_driver(>chr)) {
> +if (!qemu_chr_fe_backend_connected(>chr)) {
> error_setg(errp, "Can't create serial device, empty char device");
Same here.
Paolo
On 05/07/2017 16:01, Anton Nefedov wrote:
> Changed in v5:
> - rebased
> - patch 6 fixed (wouldn't compile until patch 7 (broken by previous rebase))
> - patch 11 commit message added
I commented on a few patches, but v6 should be the final one.
Thanks,
Paolo
On 05/07/2017 16:02, Anton Nefedov wrote:
> Also, avoid unsafe qemu_chr_fe_get_driver() usage even though the pointer
> is not really stored.
Please move that part to patch 5, together with other switches to
qemu_chr_fe_backend_connected.
Paolo
On Fri, Jun 30, 2017 at 12:26:10PM +0100, Dr. David Alan Gilbert wrote:
> * ali saeedi (ali.saeed...@gmail.com) wrote:
> > Hello
> > what does 'DIRTY_MEMORY_BLOCK_SIZE' mean?
> > is it the number of words in a block? or number of pages in a block? or
> > number of bytes in a block?
> > thanks a
On 05/07/2017 16:01, Anton Nefedov wrote:
> This patch adds a possibility to change a char device without a frontend
> removal.
>
> 1. Ideally, it would have to happen transparently to a frontend, i.e.
> frontend would continue its regular operation.
> However, backends are not stateless and
On 2017-07-03 20:09, Eric Blake wrote:
> POSIX says that backslashes in the arguments to 'echo', as well as
> any use of 'echo -n' and 'echo -e', are non-portable; it recommends
> people should favor 'printf' instead. This is definitely true where
> we do not control which shell is running (such
On Tue, Jun 27, 2017 at 02:24:12PM -0400, John Snow wrote:
> On 06/27/2017 12:31 PM, Kevin Wolf wrote:
> > If that's what we're going to do, I think I can figure out something
> > nice for block nodes. That shouldn't be too hard. The only question
> > would be whether we want a command to query
On 05/07/2017 16:21, Marc-André Lureau wrote:
>>
>> They are, but it's an implementation detail. Why is this patch necessary?
> I didn't think this would be controversial :) well, the checks I added to
> clang verify function pointer share the coroutine attribute.
>
> The function themself
From: "Dr. David Alan Gilbert"
The QMP query-vnc interfaces have gained a lot more information that
the HMP interfaces hasn't got yet. Update it.
Note the output format has changed, but this is HMP so that's OK.
In particular, this now includes client information for
- Original Message -
> On 05/07/2017 00:03, Marc-André Lureau wrote:
> > Signed-off-by: Marc-André Lureau
> > ---
> > include/block/block_int.h | 10 +-
> > 1 file changed, 5 insertions(+), 5 deletions(-)
> >
> > diff --git
On Wed, 07/05 09:01, Eric Blake wrote:
> On 07/05/2017 07:07 AM, Fam Zheng wrote:
> >>>
> >>> Sorry for bikeshedding.
> >>
> >> Not a problem, I also had some double-takes in writing my own code
> >> trying to remember which way I wanted the 'allocation' boolean to be
> >> set, so coming up with a
On Wed, Jul 05, 2017 at 05:02:04PM +0300, Anton Nefedov wrote:
> for a backend change, a number of ioctls has to be replayed to sync
> the current setup of a frontend to a backend tty. This is hopefully
> enough so we don't have to track, store and replay the whole original
> control byte
xen_pt_pci_config_access_check checks if addr >= 0xFF. 0xFF is a valid
address and should not be ignored.
Signed-off-by: Anoob Soman
---
hw/xen/xen_pt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c
index
Signed-off-by: Anton Nefedov
Reviewed-by: Vladimir Sementsov-Ogievskiy
CC: Dr. David Alan Gilbert
---
include/chardev/char.h | 10 ++
hmp.h | 1 +
chardev/char.c | 2 +-
Frontends should have an interface to setup the handler of a backend change.
The interface will be used in the next commits
Signed-off-by: Anton Nefedov
Reviewed-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Marc-André Lureau
On 07/05/2017 08:48 AM, Max Reitz wrote:
>>> /**
>>> + * qnum_is_equal(): Test whether the two QNums are equal
>>> + */
>>> +bool qnum_is_equal(const QObject *x, const QObject *y)
>>> +{
>>> +QNum *num_x = qobject_to_qnum(x);
>>> +QNum *num_y = qobject_to_qnum(y);
>>> +
>>> +switch
this is only not a problem if the test is last in a suite,
otherwise it makes the following main_loop() calls to fail
Signed-off-by: Anton Nefedov
Reviewed-by: Marc-André Lureau
---
tests/test-char.c | 1 +
1 file changed, 1
makes it possible to test the existing chardev-udp
Signed-off-by: Anton Nefedov
Reviewed-by: Marc-André Lureau
---
tests/test-char.c | 56 +++
1 file changed, 40 insertions(+), 16
Hi
- Original Message -
> On 05/07/2017 00:03, Marc-André Lureau wrote:
> > +typedef int TAA_ROLE coroutine_role;
> > +extern coroutine_role _coroutine_fn;
> > +
> > +static inline void co_role_acquire(coroutine_role R) TAA_ACQUIRE(R)
> > TAA_NO_ANALYSYS {}
> > +static inline void
(CCing Greg, the original author of the code that added the
enforce-config-section option)
On Tue, Jul 04, 2017 at 10:06:54AM +0200, Markus Armbruster wrote:
> Peter Xu writes:
>
> > It's never documented, and now we have one more parameter for it (which
> > means this one
On 07/05/2017 01:03 AM, Marc-André Lureau wrote:
> Signed-off-by: Marc-André Lureau
> ---
> block/parallels.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/block/parallels.c b/block/parallels.c
> index 8be46a7d48..213e42b9d2 100644
> ---
On Tue, Jul 04, 2017 at 10:12:45AM +0200, Markus Armbruster wrote:
> Eduardo Habkost writes:
>
> > On Mon, Jul 03, 2017 at 10:44:06AM +0800, Peter Xu wrote:
> >> Currently drive_init_func() may call migrate_get_current() while the
> >> migrate object is still not ready yet
qemu_chr_fe_get_driver() is unsafe, frontends with hotswap support
should not access CharDriver ptr directly as CharDriver might change.
Signed-off-by: Anton Nefedov
Reviewed-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Marc-André Lureau
On 05.07.2017 15:55, Stefan Hajnoczi wrote:
On Mon, Jun 19, 2017 at 03:26:56PM +0300, Pavel Butsykin wrote:
On 15.06.2017 19:38, Stefan Hajnoczi wrote:
This series extends qemu-iotests 068 to also run with iothread enabled. Doing
so was harder than expected because:
1. ioeventfd is disabled
makes it possible to test the existing chardev-file
Signed-off-by: Anton Nefedov
Reviewed-by: Marc-André Lureau
---
tests/test-char.c | 137 +-
1 file changed, 84 insertions(+), 53
for a backend change, a number of ioctls has to be replayed to sync
the current setup of a frontend to a backend tty. This is hopefully
enough so we don't have to track, store and replay the whole original
control byte sequence.
Signed-off-by: Anton Nefedov
parse function will be used by the following patch
Signed-off-by: Anton Nefedov
---
chardev/char.c | 81 --
1 file changed, 51 insertions(+), 30 deletions(-)
diff --git a/chardev/char.c b/chardev/char.c
index
In case of a backend change, the handler functions and the watch have
to be reset.
Also, avoid unsafe qemu_chr_fe_get_driver() usage even though the pointer
is not really stored.
Signed-off-by: Anton Nefedov
Reviewed-by: Vladimir Sementsov-Ogievskiy
101 - 200 of 372 matches
Mail list logo