Re: [Qemu-devel] [RFC v2 0/8] VIRTIO-IOMMU device

Hi Jean, > -Original Message- > From: Jean-Philippe Brucker [mailto:jean-philippe.bruc...@arm.com] > Sent: Friday, July 07, 2017 8:50 PM > To: Bharat Bhushan ; Auger Eric > ; eric.auger@gmail.com; > peter.mayd...@linaro.org;

[Qemu-devel] [PATCH qemu v3] vfio-pci, ppc64/spapr: Reorder group-to-container attaching

At the moment VFIO PCI device initialization works as follows: vfio_realize vfio_get_group vfio_connect_container register memory listeners (1) update QEMU groups lists vfio_kvm_device_add_group Then (example

Re: [Qemu-devel] [PATCH] tests: check-qom-proplist: fix leak

Copying qemu-trivial. Marc-André Lureau writes: > user_creatable_add_opts() returns a reference (the other reference is > for the root parent/child link). > > Leak introduced in commit a1af255f065cc. > > Signed-off-by: Marc-André Lureau

[Qemu-devel] [Bug 1703506] [NEW] SMT not supported by QEMU on AMD Ryzen CPU

Public bug reported: HyperThreading/SMT is supported by AMD Ryzen CPUs but results in this message when setting the topology to threads=2: qemu-system-x86_64: AMD CPU doesn't support hyperthreading. Please configure -smp options properly. Checking in a Windows 10 guest reveals that SMT is not

[Qemu-devel] [PULL 08/17] spapr: Add DRC release method

At the moment, spapr_drc_release() has an ugly switch on the DRC type to call the right, device-specific release function. This cleans it up by doing that via a proper QOM method. It's still arguably an abstraction violation for the DRC code to call into the specific device code, but one mess at

[Qemu-devel] [PULL 04/17] spapr: fix migration to pseries machine < 2.8

From: Laurent Vivier since commit 5c4537bd ("spapr: Fix 2.7<->2.8 migration of PCI host bridge"), some migration fields are forged from the new ones in spapr_pci_pre_save(). It works well, except when the number of MSI devices is 0, because in this case the function exits

[Qemu-devel] [PULL 02/17] spapr: refresh "platform-specific" hcalls comment

From: Greg Kurz We have more of these since the addition of KVMPPC_H_LOGICAL_MEMOP in 2012. Signed-off-by: Greg Kurz Reviewed-by: Thomas Huth Signed-off-by: David Gibson --- include/hw/ppc/spapr.h | 5 ++--- 1

[Qemu-devel] [PULL 16/17] spapr: introduce the XIVE_EXPLOIT option in CAS

From: Cédric Le Goater On POWER9, the Client Architecture Support (CAS) negotiation process determines whether the guest operates in XIVE Legacy compatibility (the former POWER8 interrupt model) or in XIVE exploitation mode (the newer POWER9 interrupt model). Bit 7 of Byte 23 of

[Qemu-devel] [PULL 15/17] ppc/kvm: have the "family" CPU alias to point to TYPE_HOST_POWERPC_CPU

From: Greg Kurz When running KVM on POWER, we allow the user to pass "-cpu POWERx" instead of "-cpu host". This is achieved by patching the ppc_cpu_aliases[] array so that "POWERx" points to the CPU class with the same PVR as the host CPU. This causes CPUs to be instantiated from

[Qemu-devel] [PULL 13/17] spapr: fix memory hotplug error path

From: Greg Kurz QEMU shouldn't abort if spapr_add_lmbs()->spapr_drc_attach() fails. Let's propagate the error instead, like it is done everywhere else where spapr_drc_attach() is called. Signed-off-by: Greg Kurz Reviewed-by: Daniel Barboza

[Qemu-devel] [PULL 14/17] spapr: Only report host/guest IOMMU page size mismatches on KVM

We print a warning if the spapr IOMMU isn't configured to support a page size matching the host page size backing RAM. When that's the case we need more complex logic to translate VFIO mappings, which is slower. But, it's not so slow that it would be at all noticeable against the general

[Qemu-devel] [PULL 17/17] spapr: populate device tree depending on XIVE_EXPLOIT option

From: Cédric Le Goater When XIVE is supported, the device tree should be populated accordingly and the XIVE memory regions mapped to activate MMIOs. Depending on the design we choose, we could also allocate different ICS and ICP objects, or switch between objects. This needs to

[Qemu-devel] [PULL 09/17] spapr: Remove unnecessary differences between hotplug and coldplug paths

spapr_drc_attach() has a 'coldplug' parameter which sets the DRC into configured state initially, instead of the usual ISOLATED/UNUSABLE state. It turns out this is unnecessary: although coldplugged devices do need to be in CONFIGURED state once the guest starts, that will already be accomplished

[Qemu-devel] [PULL 05/17] target-ppc: SPR_BOOKE_ESR not set on FP exceptions

From: Aaron Larson Properly set the book E exception syndrome register when a floating point exception occurs. Currently on a book E processor, the POWERPC_EXCP_FP exception handler fails to set "env->spr[SPR_BOOKE_ESR] = ESR_FP;" as required by the book E specification.

[Qemu-devel] [PULL 10/17] spapr: Use unplug_request for PCI hot unplug

AIUI, ->unplug_request in the HotplugHandler is used for "soft" unplug, where acknowledgement from the guest is required before completing the unplug, whereas ->unplug is used for "hard" unplug where qemu unilaterally removes the device, and the guest just has to cope with its sudden absence. For

[Qemu-devel] [PULL 03/17] spapr: fix bogus function name in comment

From: Greg Kurz $ git grep spapr_ppc_reset hw/ppc/spapr.c: * as part of spapr_ppc_reset(). $ git grep ppc_spapr_reset hw/ppc/spapr.c:static void ppc_spapr_reset(void) hw/ppc/spapr.c:mc->reset = ppc_spapr_reset; hw/ppc/spapr_hcall.c:/* If ppc_spapr_reset() did not set

[Qemu-devel] [PULL 06/17] spapr: Leave DR-indicator management to the guest

The DR-indicator is essentially a "virtual LED" attached to a hotpluggable device, which the guest can set to various states for the attention of the operator or management layers. It's mostly guest managed, except that we once-off set it to ACTIVE/INACTIVE in the attach/detach path. While that

[Qemu-devel] [PULL 11/17] target/ppc: Refactor tcg radix mmu code

From: Suraj Jitindar Singh The mmu-radix64.c file implements functions to enable the radix mmu emulation in tcg mode. There is a function ppc_radix64_walk_tree() which performs the radix tree walk and also implicitly checks the pte protection. Move the protection

[Qemu-devel] [PULL 12/17] target/ppc: Add debug function for radix mmu translation

From: Suraj Jitindar Singh In target/ppc/mmu-hash64.c there already exists the function ppc_hash64_get_phys_page_debug() to get the physical (real) address for a given effective address in hash mode. Implement the function ppc_radix64_get_phys_page_debug() to allow a

[Qemu-devel] [PULL 00/17] ppc-for-2.10 queue 20170711

The following changes since commit 6b06e3e49eb8c91cc286c16d6bf3181ac296f33d: Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2017-07-10-v2' into staging (2017-07-10 16:12:47 +0100) are available in the git repository at: git://github.com/dgibson/qemu.git

[Qemu-devel] [PULL 01/17] spapr: make spapr_populate_hotplug_cpu_dt() static

From: Greg Kurz Since commit ff9006ddbfd1 ("spapr: move spapr_core_[foo]plug() callbacks close to machine code in spapr.c"), this function doesn't need to be extern anymore. Signed-off-by: Greg Kurz Signed-off-by: David Gibson ---

[Qemu-devel] [PULL 07/17] spapr: Uniform DRC reset paths

DRC objects have a regular device reset method. However, it only gets called in the usual way for PCI DRCs. Because of where CPU and LMB DRCs are in the QOM tree, their device reset method isn't automatically called. So, the machine manually registers reset handlers to call device_reset(). This

[Qemu-devel] [PATCH V2] chardev: fix parallel device can't be reconnect

Parallel device don't register be->chr_can_read function, but remote disconnect event is handled in chr_read.So connected parallel device can not detect remote disconnect event. The chardevs with chr_can_read=NULL has the same problem. Signed-off-by: Peng Hao Reviewed-by:

Re: [Qemu-devel] [RFC 22/29] vhost+postcopy: Call wakeups

On Wed, Jun 28, 2017 at 08:00:40PM +0100, Dr. David Alan Gilbert (git) wrote: > From: "Dr. David Alan Gilbert" > > Cause the vhost-user client to be woken up whenever: > a) We place a page in postcopy mode Just to make sure I understand it correctly - UFFDIO_COPY will

[Qemu-devel] [PATCH qemu v9 2/2] memory/iommu: introduce IOMMUMemoryRegionClass

This finishes QOM'fication of IOMMUMemoryRegion by introducing a IOMMUMemoryRegionClass. This also provides a fastpath analog for IOMMU_MEMORY_REGION_GET_CLASS(). This makes IOMMUMemoryRegion an abstract class. Signed-off-by: Alexey Kardashevskiy --- Changes: v9: * moved IOMMU

[Qemu-devel] [PATCH qemu v9 1/2] memory/iommu: QOM'fy IOMMU MemoryRegion

This defines new QOM object - IOMMUMemoryRegion - with MemoryRegion as a parent. This moves IOMMU-related fields from MR to IOMMU MR. However to avoid dymanic QOM casting in fast path (address_space_translate, etc), this adds an @is_iommu boolean flag to MR and provides new helper to do simple

[Qemu-devel] [PATCH qemu v9 0/2] memory/iommu: QOM'fy IOMMU MemoryRegion

Here is a couple of patches to QOM'fy IOMMU memory regions. I have made them in order to proceed with in-kernel TCE stuff acceleration enablement which sort of depends on sPAPR IOMMU MR being QOM'ed. This is based on sha1 3f0602927b Peter Maydell "Merge remote-tracking branch

Re: [Qemu-devel] [RFC 16/29] vhost+postcopy: Stash RAMBlock and offset

On Wed, Jun 28, 2017 at 08:00:34PM +0100, Dr. David Alan Gilbert (git) wrote: > From: "Dr. David Alan Gilbert" > > Stash the RAMBlock and offset for later use looking up > addresses. > > Signed-off-by: Dr. David Alan Gilbert > --- >

Re: [Qemu-devel] [PATCH v6 17/18] shippable: add powerpc target

Hmmm it seems I squashed "add debian/powerpc" (only docker + Makefile) altogether with this one (shippable entry) On Tue, Jul 11, 2017 at 12:09 AM, Philippe Mathieu-Daudé wrote: > Signed-off-by: Philippe Mathieu-Daudé > Reviewed-by: Alex Bennée

Re: [Qemu-devel] [PATCH] util/cacheinfo: add missing include

Hi Richard, On Mon, Jul 10, 2017 at 11:38 PM, Richard Henderson wrote: > On 07/10/2017 03:55 PM, Philippe Mathieu-Daudé wrote: >> >> This include was forgotten when splitting cacheinfo.c out of >> tcg/ppc/tcg-target.inc.c (see commit b255b2c8). >> >> While compiling on powerpc:

[Qemu-devel] [PATCH v6 18/18] shippable: restrict builds to master/staging and shippable* branches

Signed-off-by: Philippe Mathieu-Daudé --- .shippable.yml | 5 + 1 file changed, 5 insertions(+) diff --git a/.shippable.yml b/.shippable.yml index 4c8a85941f..1f05d934e4 100644 --- a/.shippable.yml +++ b/.shippable.yml @@ -1,6 +1,11 @@ language: c git: submodules:

[Qemu-devel] [PATCH v6 16/18] docker: add qemu:debian-jessie based on outdated jessie release

Signed-off-by: Philippe Mathieu-Daudé --- tests/docker/dockerfiles/debian8.docker | 31 +++ 1 file changed, 31 insertions(+) create mode 100644 tests/docker/dockerfiles/debian8.docker diff --git a/tests/docker/dockerfiles/debian8.docker

[Qemu-devel] [PATCH v6 14/18] shippable: add x86_64 targets

Signed-off-by: Philippe Mathieu-Daudé --- .shippable.yml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/.shippable.yml b/.shippable.yml index 189d193da5..7a89341cea 100644 --- a/.shippable.yml +++ b/.shippable.yml @@ -5,6 +5,8 @@ env: global: - LC_ALL=C matrix:

[Qemu-devel] [PATCH v6 10/18] docker: enable gcrypt to extend code coverage on amd64

Signed-off-by: Philippe Mathieu-Daudé --- tests/docker/dockerfiles/debian-amd64-cross.docker | 3 +++ 1 file changed, 3 insertions(+) diff --git a/tests/docker/dockerfiles/debian-amd64-cross.docker b/tests/docker/dockerfiles/debian-amd64-cross.docker index

[Qemu-devel] [PATCH v6 11/18] docker: enable nettle to extend code coverage on arm64

Signed-off-by: Philippe Mathieu-Daudé --- tests/docker/dockerfiles/debian-arm64-cross.docker | 3 +++ 1 file changed, 3 insertions(+) diff --git a/tests/docker/dockerfiles/debian-arm64-cross.docker b/tests/docker/dockerfiles/debian-arm64-cross.docker index

[Qemu-devel] [PATCH v6 09/18] docker: enable netmap to extend code coverage on amd64

Signed-off-by: Philippe Mathieu-Daudé --- tests/docker/dockerfiles/debian-amd64-cross.docker | 8 1 file changed, 8 insertions(+) diff --git a/tests/docker/dockerfiles/debian-amd64-cross.docker b/tests/docker/dockerfiles/debian-amd64-cross.docker index

[Qemu-devel] [PATCH v6 17/18] shippable: add powerpc target

Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée --- .shippable.yml | 2 ++ tests/docker/Makefile.include | 3 ++ .../docker/dockerfiles/debian-powerpc-cross.docker | 40

[Qemu-devel] [PATCH v6 03/18] docker: debian/s390x no more in unstable, now available in Stretch

Signed-off-by: Philippe Mathieu-Daudé --- tests/docker/Makefile.include | 1 + tests/docker/dockerfiles/debian-s390x-cross.docker | 20 ++-- 2 files changed, 11 insertions(+), 10 deletions(-) diff --git a/tests/docker/Makefile.include

[Qemu-devel] [PATCH v6 01/18] docker: rename debian stable -> 9 (Stretch)

Signed-off-by: Philippe Mathieu-Daudé --- tests/docker/Makefile.include | 6 +++--- tests/docker/dockerfiles/debian-arm64-cross.docker | 4 ++-- tests/docker/dockerfiles/debian-armhf-cross.docker | 4 ++--

[Qemu-devel] [PATCH v6 06/18] docker: add debian/ppc64el based on Stretch

Signed-off-by: Philippe Mathieu-Daudé --- tests/docker/Makefile.include | 1 + .../docker/dockerfiles/debian-ppc64el-cross.docker | 24 ++ 2 files changed, 25 insertions(+) create mode 100644

[Qemu-devel] [PATCH v6 07/18] docker: add debian/amd64

Signed-off-by: Philippe Mathieu-Daudé --- tests/docker/Makefile.include | 1 + tests/docker/dockerfiles/debian-amd64-cross.docker | 18 ++ 2 files changed, 19 insertions(+) create mode 100644

[Qemu-devel] [PATCH v6 08/18] docker: enable virgl to extend code coverage on amd64

Signed-off-by: Philippe Mathieu-Daudé --- tests/docker/dockerfiles/debian-amd64-cross.docker | 9 + 1 file changed, 9 insertions(+) diff --git a/tests/docker/dockerfiles/debian-amd64-cross.docker b/tests/docker/dockerfiles/debian-amd64-cross.docker index

[Qemu-devel] [PATCH v6 15/18] docker: add 'apt-fake' script which generate fake debian packages

Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée --- tests/docker/dockerfiles/debian-apt-fake.sh | 46 + 1 file changed, 46 insertions(+) create mode 100755 tests/docker/dockerfiles/debian-apt-fake.sh diff

[Qemu-devel] [PATCH v6 12/18] shippable: add armel targets

Signed-off-by: Philippe Mathieu-Daudé --- .shippable.yml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/.shippable.yml b/.shippable.yml index 5e0caa65c5..abcaf6f4d4 100644 --- a/.shippable.yml +++ b/.shippable.yml @@ -5,6 +5,8 @@ env: global: - LC_ALL=C matrix:

[Qemu-devel] [PATCH v6 00/18] docker/shippable: rework debian images, add powerpc ppc64el and amd64

This patchset add 3 more architectures to the cross-build farm. Altough amd64 'cross' target sounds weird, I find it useful to cover more codebase having libraries installed in image I don't need on my workstation. There is still some issue trying to cross-build mips64el-softmmu, it seems the

[Qemu-devel] [PATCH v6 05/18] docker: add debian/armel based on Stretch

Signed-off-by: Philippe Mathieu-Daudé --- tests/docker/Makefile.include | 1 + tests/docker/dockerfiles/debian-armel-cross.docker | 24 ++ 2 files changed, 25 insertions(+) create mode 100644

[Qemu-devel] [PATCH v6 02/18] docker: add pkg-config and python-minimal packages to debian base

Signed-off-by: Philippe Mathieu-Daudé --- tests/docker/dockerfiles/debian9.docker | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/tests/docker/dockerfiles/debian9.docker b/tests/docker/dockerfiles/debian9.docker index c74f71283c..51c13939ff 100644 ---

[Qemu-devel] [PATCH v6 13/18] shippable: add ppc64el targets

Signed-off-by: Philippe Mathieu-Daudé --- .shippable.yml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/.shippable.yml b/.shippable.yml index abcaf6f4d4..189d193da5 100644 --- a/.shippable.yml +++ b/.shippable.yml @@ -16,6 +16,8 @@ env: # mips64el-softmmu disabled

[Qemu-devel] [PATCH v6 04/18] docker: remove packages now dependent of qemu in Stretch

Signed-off-by: Philippe Mathieu-Daudé --- tests/docker/dockerfiles/debian-arm64-cross.docker | 3 --- tests/docker/dockerfiles/debian-armhf-cross.docker | 3 --- tests/docker/dockerfiles/debian-mipsel-cross.docker | 3 --- tests/docker/dockerfiles/debian-s390x-cross.docker |

[Qemu-devel] [RFC PATCH 2/3] xen/mapcache: disable Xen on arm*

linking on Linux debian/stretch/arm[64] with libxen-4.8: exec.o: In function `reclaim_ramblock': qemu/exec.c:2071: undefined reference to `xen_invalidate_map_cache_entry' exec.o: In function `qemu_map_ram_ptr': qemu/exec.c:2177: undefined reference to `xen_map_cache'

[Qemu-devel] [RFC PATCH 3/3] xen/pt: add comments about !x86 archs

Signed-off-by: Philippe Mathieu-Daudé --- hw/xen/xen_pt.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c index 375efa68f6..21c32b0991 100644 --- a/hw/xen/xen_pt.c +++ b/hw/xen/xen_pt.c @@ -58,7 +58,7 @@ #include

[Qemu-devel] [RFC PATCH 1/3] configure: disable Xen PCI Passthrough on !x86 archs

linking on Linux debian/stretch/arm64 with libxen-4.8: hw/xen/xen_pt.o: In function `xen_pt_pci_read_config': qemu/hw/xen/xen_pt.c:206: undefined reference to `xen_shutdown_fatal_error' hw/xen/xen_pt.o: In function `xen_igd_passthrough_isa_bridge_create': qemu/hw/xen/xen_pt.c:698:

[Qemu-devel] [RFC PATCH 0/3] disable Xen on ARM (until supported)

Hi, Those errors were triggered installing libxen v4.8 on debian Stretch ARM (32b and 64b). It seems QEMU only support Xen on x86 host. patch 1 disable PCI Passthrough if not on x86, patch 2 disable xen_map_cache() on ARM, I don't think it is the correct way to do it, then patch 3 add few

Re: [Qemu-devel] [PATCH] util/cacheinfo: add missing include

On 07/10/2017 03:55 PM, Philippe Mathieu-Daudé wrote: This include was forgotten when splitting cacheinfo.c out of tcg/ppc/tcg-target.inc.c (see commit b255b2c8). While compiling on powerpc: CC util/cacheinfo.o qemu/util/cacheinfo.c: In function 'arch_cache_info':

Re: [Qemu-devel] [PATCH v6 1/2] bitmaps.md: Convert to rST; move it into 'interop' dir

On 07/10/2017 03:15 AM, Kashyap Chamarthy wrote: > This is part of the on-going effort to convert QEMU upstream > documentation syntax to reStructuredText (rST). > > The conversion to rST was done using: > > $ pandoc -f markdown -t rst bitmaps.md -o bitmaps.rst > > Then, make a couple of

Re: [Qemu-devel] [PATCH v4 1/3] ACPI: Add new ACPI structures and macros

Hi Eric, On 2017/7/10 21:54, Eric Blake wrote: > On 07/10/2017 04:25 AM, Dongjiu Geng wrote: >> (1) Add related APEI/HEST table structures and macros, these >> definition refer to ACPI 6.1 and UEFI 2.6 spec. > > Your mail is missing In-Reply-To: and References: headers, which makes > it

[Qemu-devel] [PATCH] util/cacheinfo: add missing include

This include was forgotten when splitting cacheinfo.c out of tcg/ppc/tcg-target.inc.c (see commit b255b2c8). While compiling on powerpc: CC util/cacheinfo.o qemu/util/cacheinfo.c: In function 'arch_cache_info': qemu/util/cacheinfo.c:137:33: error: 'AT_ICACHEBSIZE' undeclared

Re: [Qemu-devel] [PATCH v4 1/3] ACPI: Add new ACPI structures and macros

Dear,Laszlo On 2017/7/10 22:04, Laszlo Ersek wrote: > Yes, the git-send-email options to use are: > > --thread --no-chain-reply-to > > Best to set them permanently in one's qemu clone, > > $ git config --bool sendemail.thread true > $ git config --bool sendemail.chainreplyto false > >

Re: [Qemu-devel] About the trace framework

On 07/10/2017 01:24 PM, Xie Changlong wrote: 在 7/9/2017 5:57 PM, Wang Dong 写道: Hi, I am new to QEMU. But I got some problem so that I want to figure it out. So I try to debug qemu to see what happened. And I found trace framework. I think this will help me understand the point. So I

[Qemu-devel] [PATCH 2/3] test-qdev-global-props: Test global property ordering

Test case to detect the bug fixed by commit "qdev: fix the order compat and global properties are applied". Signed-off-by: Eduardo Habkost --- tests/test-qdev-global-props.c | 33 + 1 file changed, 33 insertions(+) diff --git

[Qemu-devel] [PATCH 3/3] Revert "machine: Convert abstract typename on compat_props to subclass names"

This reverts commit 0bcba41fe379e4c6834adcf1456d9099db31a5b2. The bug addressed by that commit is now fixed in a better way by the commit "qdev: fix the order compat and global properties are applied". Signed-off-by: Eduardo Habkost --- hw/core/machine.c | 26

[Qemu-devel] [PATCH 1/3] qdev: fix the order compat and global properties are applied

From: Greg Kurz The current code recursively applies global properties from child up to parent types. This can cause properties passed with the -global option to be silently overridden by internal compat properties. This is exactly what happens with virtio-*-pci drivers since

[Qemu-devel] [PATCH 0/3] qdev: fix the order compat and global properties are applied

Before 2.8 was released, we found a bug in the way global properties are applied by device code. Greg Kurz sent a fix[1], but we decide to include a more conservative workaround[2] because the 2.8 release was very close. The plan was to include Greg's patch in 2.9, but we forgot to do that. I'm

Re: [Qemu-devel] [PATCH 09/22] exec-all: shrink tb->invalid to uint8_t

On Sun, Jul 09, 2017 at 10:11:21 -1000, Richard Henderson wrote: > On 07/08/2017 09:50 PM, Emilio G. Cota wrote: > >To avoid wasting a byte. I don't have any use in mind for this byte, > >but I think it's good to leave this byte explicitly free for future use. > >See this discussion for how the

Re: [Qemu-devel] qemu-x86_64: Error processing bextr

On 07/10/2017 01:17 PM, Ricardo Ribalda Delgado wrote: 0x0040008179bf <+31>: 8f ea 78 10 d0 08 04 00 00 bextr $0x408,%eax,%edx ... It seems that, bextr is not supported by the emulator/cpu, althoug I have launched the emualtor with -cpu Haswell, that should support bmi1

[Qemu-devel] 答复: Re: [PATCH] tcg/mips: reserve a register for the guest_base.

> On 07/09/2017 11:12 PM, Jiang Biao wrote: > > Reserve a register for the guest_base using ppc code for reference. > > By doing so, we do not have to recompute it for every memory load. > > > > Signed-off-by: Jiang Biao > > Signed-off-by: Richard

Re: [Qemu-devel] [PATCH 12/17] migration: add postcopy migration of dirty bitmaps

On 07/10/2017 05:17 AM, Vladimir Sementsov-Ogievskiy wrote: Can we document this somehow? In this terminology, what happens with frozen bitmap (which in fact is like "active" for the user) on successful backup finish? It turns into a difference between current-state and what-was-backed-up?

Re: [Qemu-devel] [PATCH v4 09/17] dirty-bitmap: Change bdrv_dirty_iter_next() to report byte offset

On 07/03/2017 11:10 AM, Eric Blake wrote: Thanks to recent cleanups, most callers were scaling a return value of sectors into bytes (the exception, in qcow2-bitmap, will be converted to byte-based iteration later). Update the interface to do the scaling internally instead. Signed-off-by:

[Qemu-devel] qemu-x86_64: Error processing bextr

Hi I have the following assembly snipset (from get_common_indeces in glibc compiled with gcc 6.3 -march=bdver4) 0x0040008179b3 <+19>: 89 15 8b c3 20 00 mov %edx,0x20c38b(%rip)# 0x4000a23d44 <_rtld_local_ro+132> 0x0040008179b9 <+25>: 89 1d 7d c3 20 00 mov

Re: [Qemu-devel] [PATCH v4 08/17] dirty-bitmap: Set iterator start by offset, not sector

On 07/03/2017 11:10 AM, Eric Blake wrote: All callers to bdrv_dirty_iter_new() passed 0 for their initial starting point, drop that parameter. Most callers to bdrv_set_dirty_iter() were scaling a byte offset to a sector number; the exception qcow2-bitmap will be converted later to use byte

Re: [Qemu-devel] [PATCH v4 07/17] qcow2: Switch sectors_covered_by_bitmap_cluster() to byte-based

On 07/03/2017 11:10 AM, Eric Blake wrote: We are gradually converting to byte-based interfaces, as they are easier to reason about than sector-based. Change the qcow2 bitmap helper function sectors_covered_by_bitmap_cluster(), renaming it in the process. Signed-off-by: Eric Blake

[Qemu-devel] [PATCH v3 3/4] xen/mapcache: introduce xen_replace_cache_entry()

This new call is trying to update a requested map cache entry according to the changes in the physmap. The call is searching for the entry, unmaps it and maps again at the same place using a new guest address. If the mapping is dummy this call will make it real. This function makes use of a new

[Qemu-devel] [PATCH v3 4/4] xen: don't use xenstore to save/restore physmap anymore

If we have a system with xenforeignmemory_map2() implemented we don't need to save/restore physmap on suspend/restore anymore. In case we resume a VM without physmap - try to recreate the physmap during memory region restore phase and remap map cache entries accordingly. The old code is left for

[Qemu-devel] [PATCH v3 1/4] xen: move physmap saving into a separate function

Non-functional change. Signed-off-by: Igor Druzhinin Reviewed-by: Stefano Stabellini Reviewed-by: Paul Durrant --- hw/i386/xen/xen-hvm.c | 57 --- 1 file changed, 31

[Qemu-devel] [PATCH v3 0/4] xen: don't save/restore the physmap on VM save/restore

Saving/restoring the physmap to/from xenstore was introduced to QEMU majorly in order to cover up the VRAM region restore issue. The sequence of restore operations implies that we should know the effective guest VRAM address *before* we have the VRAM region restored (which happens later).

[Qemu-devel] [PATCH v3 2/4] xen/mapcache: add an ability to create dummy mappings

Dummys are simple anonymous mappings that are placed instead of regular foreign mappings in certain situations when we need to postpone the actual mapping but still have to give a memory region to QEMU to play with. This is planned to be used for restore on Xen. Signed-off-by: Igor Druzhinin

Re: [Qemu-devel] [PATCH] test-i386: Make x86 test program compile on clang

I don’t believe so, I haven’t been able to find it in the bug database. ~Theodore > On Jul 10, 2017, at 2:48 PM, Paolo Bonzini wrote: > > On 10/07/2017 22:57, Theodore Dubois wrote: >> - Clang doesn't support size suffixes on the loop instructions. > > Has this bug been

Re: [Qemu-devel] [PATCH 21/22] tcg: enable per-thread TCG for softmmu

On Mon, Jul 10, 2017 at 17:33:07 -0400, Paolo Bonzini wrote: > > > I agree that it would be nice to have the same mechanism for all. > > > > The main hurdle I see is how to allow for concurrent code generation while > > minimizing flushes of the single, fixed-size[*] code_gen_buffer. > > In

Re: [Qemu-devel] [PATCH v2 5/5] target/arm: use DISAS_EXIT for eret handling

On 10 July 2017 at 20:58, Richard Henderson wrote: > As an aside, I presume we don't have support for armv7ve? I was expecting > there to be an eret insn in the aa32 translator and had to dig up previous > manuals to see when that insn was introduced. We don't yet fully

Re: [Qemu-devel] [PATCH] test-i386: Make x86 test program compile on clang

On 10/07/2017 22:57, Theodore Dubois wrote: > - Clang doesn't support size suffixes on the loop instructions. Has this bug been reported? Paolo

Re: [Qemu-devel] [PATCH v4 06/17] dirty-bitmap: Change bdrv_dirty_bitmap_*serialize*() to take bytes

On 07/03/2017 11:10 AM, Eric Blake wrote: Right now, the dirty-bitmap code exposes the fact that we use a scale of sector granularity in the underlying hbitmap to anything that wants to serialize a dirty bitmap. It's nicer to uniformly expose bytes as our dirty-bitmap interface, matching the

Re: [Qemu-devel] [PATCH 21/22] tcg: enable per-thread TCG for softmmu

> I agree that it would be nice to have the same mechanism for all. > > The main hurdle I see is how to allow for concurrent code generation while > minimizing flushes of the single, fixed-size[*] code_gen_buffer. > In user-mode this is tricky because there is no way to bound the number > of

Re: [Qemu-devel] [PATCH v4 2/5] qapi: Add qobject_is_equal()

First of all, OK, you don't want QNum(42.0) to equal QNum(42) at all (at least not right now and in the foreseeable future). You're the maintainer, so you decide, so I'll go along with it. :-) Now, let's follow up with my therefore rather useless commentary: (Feel free to disregard, because

Re: [Qemu-devel] [PATCH v4 05/17] dirty-bitmap: Change bdrv_dirty_bitmap_size() to report bytes

On 07/10/2017 05:19 PM, Eric Blake wrote: On 07/10/2017 04:09 PM, John Snow wrote: On 07/03/2017 11:10 AM, Eric Blake wrote: We are still using an internal hbitmap that tracks a size in sectors, with the granularity scaled down accordingly, because it lets us use a shortcut for our

Re: [Qemu-devel] [PATCH v4 05/17] dirty-bitmap: Change bdrv_dirty_bitmap_size() to report bytes

On 07/10/2017 04:09 PM, John Snow wrote: > > > On 07/03/2017 11:10 AM, Eric Blake wrote: >> We are still using an internal hbitmap that tracks a size in sectors, >> with the granularity scaled down accordingly, because it lets us >> use a shortcut for our iterators which are currently

Re: [Qemu-devel] [PATCH 21/22] tcg: enable per-thread TCG for softmmu

On Mon, Jul 10, 2017 at 14:05:01 +0200, Paolo Bonzini wrote: > On 09/07/2017 09:50, Emilio G. Cota wrote: > > User-mode is kept out of this: contention due to concurrent translation > > is more commonly found in full-system mode. > > Out of curiosity, is it harder or you just didn't try? It

Re: [Qemu-devel] [PATCH v4 05/17] dirty-bitmap: Change bdrv_dirty_bitmap_size() to report bytes

On 07/03/2017 11:10 AM, Eric Blake wrote: We are still using an internal hbitmap that tracks a size in sectors, with the granularity scaled down accordingly, because it lets us use a shortcut for our iterators which are currently sector-based. But there's no reason we can't track the dirty

Re: [Qemu-devel] [PATCH v7 06/16] qapi: add dirty-bitmaps migration capability

On 07/10/2017 11:30 AM, Vladimir Sementsov-Ogievskiy wrote: > Signed-off-by: Vladimir Sementsov-Ogievskiy > Reviewed-by: John Snow > Reviewed-by: Eric Blake > Reviewed-by: Juan Quintela > --- >

Re: [Qemu-devel] [RFC PATCH 03/26] target/ppc/POWER9: add POWERPC_EXCP_POWER9

On Mon, 2017-07-10 at 14:49 +0200, Cédric Le Goater wrote: > On 07/10/2017 12:26 PM, David Gibson wrote: > > On Wed, Jul 05, 2017 at 07:13:16PM +0200, Cédric Le Goater wrote: > > > Prepare ground for the new exception model XIVE of POWER9. > > > > I'm a bit confused by this. The excp_model is

[Qemu-devel] [PATCH] test-i386: Make x86 test program compile on clang

Clang's assembler is slightly incompatible with GCC's assembler, which caused the program to not compile on Clang for these reasons: - The "q" constraint was specified for an argument to the set instruction, which didn't work because Clang chose the esi register, which has no 8-bit form

[Qemu-devel] [PATCH v3 8/8] target/s390x: Fix risbg handling

The rotation is to the left, but extract shifts to the right. The computation of the extract parameters needs adjusting. For the entry condition, simplify 64 - rot + len <= 64 -rot + len <= 0 len <= rot Reviewed-by: Aurelien Jarno Reported-by:

[Qemu-devel] [PATCH v3 5/8] target/s390x: Implement TRTR

Drop TRT from the set of insns handled internally by EXECUTE. It's more important to adjust the existing helper to handle both TRT and TRTR. Reviewed-by: Aurelien Jarno Signed-off-by: Richard Henderson --- target/s390x/helper.h | 1 +

[Qemu-devel] [PATCH v3 4/8] target/s390x: Implement SRSTU

Reviewed-by: Aurelien Jarno Signed-off-by: Richard Henderson --- target/s390x/helper.h | 1 + target/s390x/mem_helper.c | 41 + target/s390x/translate.c | 13 + target/s390x/insn-data.def | 2

[Qemu-devel] [PATCH v3 0/8] target/s390x tcg improvements

Changes since v2: * Another error in CONVERT UNICODE Changes since v1: * Errors corrected in CONVERT UNICODE * Address writeback corrected in SRST/SRSTU * IDTES feature added. * RISBG handling fixed. r~ David Hildenbrand (1): target/s390x: Allow to enable "idtes" feature for TCG

[Qemu-devel] [PATCH v3 3/8] target/s390x: Tidy SRST

Since we require all registers saved on input, read R0 from ENV instead of passing it manually. Recognize the specification exception when R0 contains incorrect data. Keep high bits of result registers unmodified when in 31 or 24-bit mode. Reviewed-by: Aurelien Jarno

[Qemu-devel] [PATCH v3 7/8] target/s390x: Allow to enable "idtes" feature for TCG

From: David Hildenbrand STFL bit 4 and 5 are just indications to the guest, which TLB entries an IDTE call will clear. These are performance indicators for the guest. STFL bit 4: INVALIDATE DAT TABLE ENTRY (IDTE) performs the invalidation-and-clearing operation by

[Qemu-devel] [PATCH v3 2/8] target/s390x: Implement CONVERT UNICODE insns

Signed-off-by: Richard Henderson --- target/s390x/helper.h | 6 + target/s390x/mem_helper.c | 310 + target/s390x/translate.c | 43 +++ target/s390x/insn-data.def | 13 ++ 4 files changed, 372 insertions(+) diff --git

[Qemu-devel] [PATCH v3 6/8] target/s390x: Mark ETF3 and ETF3_ENH facilities as available

Reviewed-by: Aurelien Jarno Signed-off-by: Richard Henderson --- target/s390x/cpu_models.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c index 2c86b24..a4afdd9 100644 ---

[Qemu-devel] [PATCH v3 1/8] target/s390x: Implement CSST

Signed-off-by: Richard Henderson --- target/s390x/helper.h | 1 + target/s390x/cpu_models.c | 2 + target/s390x/mem_helper.c | 189 + target/s390x/translate.c | 13 +++- target/s390x/insn-data.def | 2 + 5 files

Re: [Qemu-devel] [Qemu-ppc] [RFC drcVI PATCH] spapr: reset DRCs on migration pre_load

On 07/10/2017 03:39 AM, David Gibson wrote: On Fri, Jul 07, 2017 at 06:20:37PM -0300, Daniel Henrique Barboza wrote: "spapr: Remove 'awaiting_allocation' DRC flag" removed the flag that was originally was being used to prevent a race condition between hot unplug and hotplug. The DRC code base

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