On Thu, Oct 05, 2017 at 06:24:43PM +0200, Igor Mammedov wrote:
> Signed-off-by: Igor Mammedov
Acked-by: David Gibson
> ---
> hw/ppc/spapr.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/ppc/spapr.c
On Thu, Oct 05, 2017 at 06:24:40PM +0200, Igor Mammedov wrote:
> spapr core type definition doesn't have any fields that
> require it to be defined at runtime. So replace code
> that fills in TypeInfo at runtime with static TypeInfo
> array that does the same at complie time.
>
> Signed-off-by:
On Thu, Sep 28, 2017 at 06:38:55PM +0530, seeteena wrote:
>
> Thanks Thomas. Since you already put them on cc. I will wait for the
> response.
At this point, I think your patch has been lost in the noise, I'm
afraid. I suggest reposting, CCing those suggested people from the
start. I'd also
On Thu, Oct 05, 2017 at 06:24:44PM +0200, Igor Mammedov wrote:
> use generic cpu_model parsing introduced by
> (6063d4c0f vl.c: convert cpu_model to cpu type and set of global properties
> before machine_init())
>
> it allows to:
> * replace sPAPRMachineClass::tcg_default_cpu with
>
On Thu, Oct 05, 2017 at 06:24:39PM +0200, Igor Mammedov wrote:
> there is a dedicated callback CPUClass::parse_features
> which purpose is to convert -cpu features into a set of
> global properties AND deal with compat/legacy features
> that couldn't be directly translated into CPU's properties.
>
On Thu, Oct 05, 2017 at 06:24:42PM +0200, Igor Mammedov wrote:
> consolidate 'host' core type registration by moving it from
> KVM specific code into spapr_cpu_core.c, similar like it's
> done in x86 target.
>
> Signed-off-by: Igor Mammedov
IIUC this will change behaviour
Hi Bharat,
On 06/10/2017 05:46, Bharat Bhushan wrote:
>
>
Thanks
Eric
>
> However you should be allowed to map 1 sg element of 5 pages and
> then notify the host about this event I think. Still looking at the
> code...
>
> I still can't reproduce the
06.10.2017 10:09, Vladimir Sementsov-Ogievskiy wrote:
06.10.2017 01:12, Eric Blake wrote:
On 10/05/2017 05:36 AM, Paolo Bonzini wrote:
On 05/10/2017 12:02, Vladimir Sementsov-Ogievskiy wrote:
03.10.2017 17:06, Paolo Bonzini wrote:
On 03/10/2017 15:35, Vladimir Sementsov-Ogievskiy wrote:
In
06.10.2017 01:12, Eric Blake wrote:
On 10/05/2017 05:36 AM, Paolo Bonzini wrote:
On 05/10/2017 12:02, Vladimir Sementsov-Ogievskiy wrote:
03.10.2017 17:06, Paolo Bonzini wrote:
On 03/10/2017 15:35, Vladimir Sementsov-Ogievskiy wrote:
In the end this probably means that you have a
On 28.09.2017 22:36, David Hildenbrand wrote:
> External interrupts are currently all handled like floating external
> interrupts, they are queued. Let's prepare for a split of floating
> and local interrupts by turning INTERRUPT_EXT into a mask.
>
> While we can have various floating external
"Dr. David Alan Gilbert (git)" writes:
> From: "Dr. David Alan Gilbert"
>
> opt was declared as a separate local inside the last loop,
> shadowing the local at the top of the function.
>
> Signed-off-by: Dr. David Alan Gilbert
I
05.10.2017 16:37, Eric Blake wrote:
On 10/05/2017 06:30 AM, Vladimir Sementsov-Ogievskiy wrote:
21.09.2017 15:18, Vladimir Sementsov-Ogievskiy wrote:
Hi all!
I'm about this:
"A server SHOULD try to minimize the number of chunks sent in a reply,
but MUST NOT mark a chunk as final if there is
On 10/05/2017 06:24 PM, Igor Mammedov wrote:
> deduce core type directly from chip type instead of
> maintaining type mapping in PnvChipClass::cpu_model.
nice one again.
> Signed-off-by: Igor Mammedov
Reviewed-by: Cédric Le Goater
Thanks,
C.
> ---
>
On 10/05/2017 06:24 PM, Igor Mammedov wrote:
> Use a new DEFINE_TYPES() helper to simplify type registration
>
> Signed-off-by: Igor Mammedov
Reviewed-by: Cédric Le Goater
Thanks,
C.
> ---
> hw/ppc/pnv.c | 92
>
On 10/05/2017 06:24 PM, Igor Mammedov wrote:
> deduce cpu type directly from core type instead of
> maintaining type mapping in PnvCoreClass::cpu_oc and doing
> extra cpu_model parsing in pnv_core_class_init()
>
> Signed-off-by: Igor Mammedov
Reviewed-by: Cédric Le Goater
On 10/05/2017 06:24 PM, Igor Mammedov wrote:
> pnv core type definition doesn't have any fields that
> require it to be defined at runtime. So replace code
> that fills in TypeInfo at runtime with static TypeInfo
> array that does the same at complie time.
This is much better.
> Signed-off-by:
On 10/05/2017 06:24 PM, Igor Mammedov wrote:
> typically for cpus/core type names following convention is used
>
>new_type_prefix-superclass_typename
>
> make PNV core/chip to follow common convention.
>
> Signed-off-by: Igor Mammedov
Reviewed-by: Cédric Le Goater
On 10/05/2017 06:24 PM, Igor Mammedov wrote:
> use common cpu_model prasing in vl.c and set default cpu_model
> using generic MachineClass::default_cpu_type.
>
> Beside of switching to generic infrastructure it solves several
> issues.
>
> * ppc_cpu_class_by_name() is used to deal with
On 10/06/2017 08:10 AM, Nikunj A Dadhania wrote:
> Cédric Le Goater writes:
>
>> Hello,
>>
>> When a CPU is stopped with the 'stop-self' RTAS call, its state
>> 'halted' is switched to 1 and, in this case, the MSR is not taken into
>> account anymore in the cpu_has_work() routine.
Cédric Le Goater writes:
> Hello,
>
> When a CPU is stopped with the 'stop-self' RTAS call, its state
> 'halted' is switched to 1 and, in this case, the MSR is not taken into
> account anymore in the cpu_has_work() routine. Only the pending
> hardware interrupts are checked with
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