[Qemu-devel] [PATCH v9 08/26] tcg: Add generic vector ops for multiplication

Signed-off-by: Richard Henderson --- accel/tcg/tcg-runtime.h | 5 + tcg/tcg-op-gvec.h| 2 ++ tcg/tcg-op.h | 1 + tcg/tcg-opc.h| 1 + tcg/tcg.h| 1 + accel/tcg/tcg-runtime-gvec.c | 44

[Qemu-devel] [PATCH v9 10/26] tcg: Add generic helpers for saturating arithmetic

No vector ops as yet. SSE only has direct support for 8- and 16-bit saturation; handling 32- and 64-bit saturation is much more expensive. Signed-off-by: Richard Henderson --- accel/tcg/tcg-runtime.h | 20 tcg/tcg-op-gvec.h| 10 ++

[Qemu-devel] [PATCH v9 04/26] tcg: Add generic vector expanders

Signed-off-by: Richard Henderson --- Makefile.target |2 +- accel/tcg/tcg-runtime.h | 29 + tcg/tcg-gvec-desc.h | 49 ++ tcg/tcg-op-gvec.h| 198 +++ tcg/tcg-op.h |1 + tcg/tcg-opc.h

[Qemu-devel] [PATCH v9 07/26] tcg: Add generic vector ops for comparisons

Signed-off-by: Richard Henderson --- accel/tcg/tcg-runtime.h | 30 + tcg/tcg-op-gvec.h| 4 ++ tcg/tcg-op.h | 3 + tcg/tcg-opc.h| 2 + tcg/tcg.h| 1 + accel/tcg/tcg-runtime-gvec.c |

[Qemu-devel] [PATCH v9 03/26] tcg: Standardize integral arguments to expanders

Some functions use intN_t arguments, some use uintN_t, some just used "unsigned". To aid putting function pointers in tables, we need consistency. Signed-off-by: Richard Henderson --- tcg/tcg-op.h | 16 tcg/tcg-op.c | 42

[Qemu-devel] [PATCH v9 06/26] tcg: Add generic vector ops for constant shifts

Opcodes are added for scalar and vector shifts, but considering the varied semantics of these do not expose them to the front ends. Do go ahead and provide them in case they are needed for backend expansion. Signed-off-by: Richard Henderson ---

[Qemu-devel] [PATCH v9 05/26] tcg: Add generic vector ops for interleave

Includes zip, unzip, and transform. Signed-off-by: Richard Henderson --- accel/tcg/tcg-runtime.h | 15 +++ tcg/tcg-op-gvec.h| 13 ++ tcg/tcg-op.h | 6 + tcg/tcg-opc.h| 7 + tcg/tcg.h| 3 +

[Qemu-devel] [PATCH v9 02/26] tcg: Add types and basic operations for host vectors

Nothing uses or enables them yet. Signed-off-by: Richard Henderson --- Makefile.target | 4 +- tcg/tcg-op.h | 30 + tcg/tcg-opc.h| 26 tcg/tcg.h| 56 + tcg/tcg-op-vec.c | 362

[Qemu-devel] [PATCH v9 01/26] tcg: Allow multiple word entries into the constant pool

This will be required for storing vector constants. Signed-off-by: Richard Henderson --- tcg/tcg-pool.inc.c | 115 +++-- 1 file changed, 93 insertions(+), 22 deletions(-) diff --git a/tcg/tcg-pool.inc.c

[Qemu-devel] [PATCH v9 00/26] tcg: generic vector operations

I think this will be the last revision before queueing for pull. Peter, the target/arm patches here are primarily for testing, without having to go all the way through to SVE. It also shows how the generic vector interface ought to be used. I'm happy to drop the patches from the tcg pull and

Re: [Qemu-devel] [PATCH v5 4/7] vhost: Merge sections added to temporary list

On Mon, Jan 08, 2018 at 06:07:30PM +, Dr. David Alan Gilbert wrote: > * Igor Mammedov (imamm...@redhat.com) wrote: > > On Mon, 18 Dec 2017 20:13:37 + > > "Dr. David Alan Gilbert (git)" wrote: > > > > > From: "Dr. David Alan Gilbert" > > > > > >

Re: [Qemu-devel] [RFC PATCH 0/3] vfio: ccw: basic channel path event handling

* Pierre Morel [2018-01-15 11:21:47 +0100]: > On 15/01/2018 09:57, Dong Jia Shi wrote: > >* Cornelia Huck [2018-01-11 11:54:22 +0100]: > > > >>On Thu, 11 Jan 2018 04:04:18 +0100 > >>Dong Jia Shi wrote: > >> > >>>Hi

Re: [Qemu-devel] [PATCH 4/4] virtio-net: notify backend with number of queue pairs setup

On Fri, Jan 12, 2018 at 03:56:58PM +0100, Maxime Coquelin wrote: > Signed-off-by: Maxime Coquelin > --- > hw/net/virtio-net.c | 5 + > 1 file changed, 5 insertions(+) > > diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c > index 38674b08aa..b8908c98ed 100644

Re: [Qemu-devel] [PATCH 2/4] vhost-user: specify and implement VHOST_USER_SET_QUEUE_NUM request

On Fri, Jan 12, 2018 at 03:56:56PM +0100, Maxime Coquelin wrote: > When the slave cannot add queues dynamically, Could you please clarify the motivation a bit? Why is it such a big deal to resize the queue array? We know no queues are used before all of them are initialized, so you don't need to

Re: [Qemu-devel] [RFC PATCH 1/3] vfio: ccw: introduce schib region

* Cornelia Huck [2018-01-15 13:24:22 +0100]: > On Mon, 15 Jan 2018 10:50:00 +0100 > Pierre Morel wrote: > > > On 11/01/2018 04:04, Dong Jia Shi wrote: > > > This introduces a new region for vfio-ccw to provide subchannel > > > information for user

Re: [Qemu-devel] [PATCH 1/4] vhost-user: fix multiple queue specification

On Fri, Jan 12, 2018 at 03:56:55PM +0100, Maxime Coquelin wrote: > The number of queues supported by the slave is queried with > message VHOST_USER_GET_QUEUE_NUM, not with message > VHOST_USER_GET_PROTOCOL_FEATURES. > > Also, looking at master and slave implemntations, the payload > returned by

Re: [Qemu-devel] [PULL 00/25] pc, pci, virtio: features, fixes, cleanups

On Tue, Jan 09, 2018 at 12:10:10PM +1100, David Gibson wrote: > On Mon, Jan 08, 2018 at 08:10:23PM +0200, Michael S. Tsirkin wrote: > > On Mon, Jan 08, 2018 at 09:14:41AM +, Peter Maydell wrote: > > > On 21 December 2017 at 23:43, Michael S. Tsirkin wrote: > > > >> you also

Re: [Qemu-devel] [PATCH V7 3/5] docs: add pvrdma device documentation.

On Sun, Jan 14, 2018 at 11:01:45AM +0200, Marcel Apfelbaum wrote: > +5. Limitations > +== Limitations are fine but need to cause init failures since users don't poke in the internal documentation. > +- The device obviously is limited by the Guest Linux Driver features >

[Qemu-devel] GRUB countdown problem in VirtualBox

https://blog.desdelinux.net/wp-content/uploads/2012/07/1.png As usual , GRUB will auto-start the highlighted entry in 5 seconds .. VirtualBox has such a problem that makes GRUB unable to show the first countdown number which is 5. But GRUB is able to show the numbers 4 ,3 ,2 and 1 ..

Re: [Qemu-devel] [PATCH] hw/misc: Add code to emulate Xilinx Slave Serial port

On Tue, Dec 19, 2017 at 4:48 PM, Alistair Francis wrote: > On Thu, Dec 14, 2017 at 7:19 AM, Andrey Smirnov > wrote: >> Add code to emulate Xilinx Slave Serial FPGA configuration port. >> >> Cc: "Edgar E. Iglesias"

[Qemu-devel] [PATCH v4 12/14] i.MX: Add i.MX7 SOC implementation.

The following interfaces are partially or fully emulated: * up to 2 Cortex A9 cores (SMP works with PSCI) * A7 MPCORE (identical to A15 MPCORE) * 4 GPTs modules * 7 GPIO controllers * 2 IOMUXC controllers * 1 CCM module * 1 SVNS module * 1 SRC module * 1 GPCv2

[Qemu-devel] [PATCH v4 13/14] hw/arm: Move virt's PSCI DT fixup code to arm/boot.c

Move virt's PSCI DT fixup code to arm/boot.c and set this fixup to happen automatically for every board that doesn't mark "psci-conduit" as disabled. This way emulated boards other than "virt" that rely on PSIC for SMP could benefit from that code. Cc: Peter Maydell Cc:

[Qemu-devel] [PATCH v4 10/14] usb: Add basic code to emulate Chipidea USB IP

Add code to emulate Chipidea USB IP (used in i.MX SoCs). Tested to work against: -usb -drive if=none,id=stick,file=usb.img,format=raw -device \ usb-storage,bus=usb-bus.0,drive=stick Cc: Peter Maydell Cc: Jason Wang Cc: Philippe Mathieu-Daudé

[Qemu-devel] [PATCH v4 11/14] ARM: Add basic code to emulate A7MPCore DAP block

Add minimal code to emulate A7MPCore DAP block needed to boot Linux guest. Cc: Peter Maydell Cc: Jason Wang Cc: Philippe Mathieu-Daudé Cc: qemu-devel@nongnu.org Cc: qemu-...@nongnu.org Cc: yurov...@gmail.com Signed-off-by: Andrey

[Qemu-devel] [PATCH v4 05/14] i.MX: Add code to emulate i.MX7 SNVS IP-block

Add code to emulate SNVS IP-block. Currently only the bits needed to be able to emulate machine shutdown are implemented. Cc: Peter Maydell Cc: Jason Wang Cc: Philippe Mathieu-Daudé Cc: qemu-devel@nongnu.org Cc:

[Qemu-devel] [PATCH v4 09/14] pci: Add support for Designware IP block

Add code needed to get a functional PCI subsytem when using in conjunction with upstream Linux guest (4.13+). Tested to work against "e1000e" (network adapter, using MSI interrupts) as well as "usb-ehci" (USB controller, using legacy PCI interrupts). Cc: Peter Maydell

[Qemu-devel] [PATCH v4 06/14] i.MX: Add code to emulate GPCv2 IP block

Add minimal code needed to allow upstream Linux guest to boot. Cc: Peter Maydell Cc: Jason Wang Cc: Philippe Mathieu-Daudé Cc: qemu-devel@nongnu.org Cc: qemu-...@nongnu.org Cc: yurov...@gmail.com Reviewed-by: Peter Maydell

[Qemu-devel] [PATCH v4 04/14] i.MX: Add code to emulate i.MX2 watchdog IP block

Add enough code to emulate i.MX2 watchdog IP block so it would be possible to reboot the machine running Linux Guest. Cc: Peter Maydell Cc: Jason Wang Cc: Philippe Mathieu-Daudé Cc: qemu-devel@nongnu.org Cc: qemu-...@nongnu.org

[Qemu-devel] [PATCH v4 03/14] i.MX: Add code to emulate i.MX7 CCM, PMU and ANALOG IP blocks

Add minimal code needed to allow upstream Linux guest to boot. Cc: Peter Maydell Cc: Jason Wang Cc: Philippe Mathieu-Daudé Cc: qemu-devel@nongnu.org Cc: qemu-...@nongnu.org Cc: yurov...@gmail.com Signed-off-by: Andrey Smirnov

[Qemu-devel] [PATCH v4 08/14] i.MX: Add implementation of i.MX7 GPR IP block

Add minimal code needed to allow upstream Linux guest to boot. Cc: Peter Maydell Cc: Jason Wang Cc: Philippe Mathieu-Daudé Cc: qemu-devel@nongnu.org Cc: qemu-...@nongnu.org Cc: yurov...@gmail.com Signed-off-by: Andrey Smirnov

[Qemu-devel] [PATCH v4 01/14] sdhci: Add i.MX specific subtype of SDHCI

IP block found on several generations of i.MX family does not use vanilla SDHCI implementation and it comes with a number of quirks. Introduce i.MX SDHCI subtype of SDHCI block to add code necessary to support unmodified Linux guest driver. Cc: Peter Maydell Cc: Jason

[Qemu-devel] [PATCH v4 00/14] Initial i.MX7 support

Hi everyone, This v4 of the patch series containing the work that I've done in order to enable support for i.MX7 emulation in QEMU. *NOTE*: Patches 1 and 2 are provided for the sake of completness and are going to have to be adapted once Philippe's SD changes land in master. As

[Qemu-devel] [PATCH v4 02/14] hw: i.MX: Convert i.MX6 to use TYPE_IMX_USDHC

Convert i.MX6 to use TYPE_IMX_USDHC since that's what real HW comes with. Cc: Peter Maydell Cc: Jason Wang Cc: Philippe Mathieu-Daudé Cc: qemu-devel@nongnu.org Cc: qemu-...@nongnu.org Cc: yurov...@gmail.com Signed-off-by: Andrey

Re: [Qemu-devel] [Qemu-ppc] [PATCH 0/2] Clean up the ppc default configs

On Mon, Jan 15, 2018 at 03:42:09PM +0100, Thomas Huth wrote: > On 15.01.2018 14:01, Peter Maydell wrote: > > On 15 January 2018 at 09:30, Thomas Huth wrote: > >> (off-topic question: Do we still need a separate ppcemb-softmmu nowadays? > >> It seemed to be useful 10 years ago

[Qemu-devel] [PATCH 6/7] ipmi: disable IRQ and ATN on an external disconnect

From: Corey Minyard Otherwise there's no way to clear them without an external command, and it could lock the OS in the VM if they were stuck. Signed-off-by: Corey Minyard --- hw/ipmi/ipmi_bmc_extern.c | 5 + 1 file changed, 5 insertions(+) diff

[Qemu-devel] [PATCH 7/7] ipmi: Allow BMC device properties to be set

From: Corey Minyard Signed-off-by: Corey Minyard Reviewed-by: Marc-André Lureau --- hw/ipmi/ipmi_bmc_sim.c | 21 ++--- 1 file changed, 14 insertions(+), 7 deletions(-) diff --git a/hw/ipmi/ipmi_bmc_sim.c

[Qemu-devel] [PATCH 5/7] ipmi: Fix macro issues

From: Corey Minyard Macro parameters should almost always have () around them when used. llvm reported an error on this. Remove redundant parenthesis and put parenthesis around the entire macros with assignments in case they are used in an expression. The macros were doing

[Qemu-devel] [PATCH v2] Small IPMI fixes

These are some fixes I've had for a while (mostly). They are small fixes and additions for various things. It would be nice to be able to get these into the upcoming release. I also add myself as the maintainer for the IPMI code, since that seemed appropriate. Changes in v2: I removed the

[Qemu-devel] [PATCH 1/7] Add maintainer for the IPMI code

From: Corey Minyard Signed-off-by: Corey Minyard Acked-by: Marc-André Lureau --- MAINTAINERS | 9 + 1 file changed, 9 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 73a..66a258b 100644 ---

[Qemu-devel] [PATCH 2/7] ipmi: Fix SEL get/set time commands

From: Corey Minyard The minimum message size was on the wrong commands, for getting the time it's zero and for setting the time it's 6. Signed-off-by: Corey Minyard Reviewed-by: Cédric Le Goater Reviewed-by: Marc-André Lureau

[Qemu-devel] [PATCH 3/7] ipmi: Don't set the timestamp on add events that don't have it

From: Corey Minyard According to the spec, from section "32.3 OEM SEL Record - Type E0h-FFh", event types from 0x0e to 0xff do not have a timestamp. So don't set it when adding those types. This required putting the timestamp in a temporary buffer, since it's still required

[Qemu-devel] [PATCH 4/7] ipmi: Add the platform event message command

From: Corey Minyard This lets an event be added to the SEL as if a sensor had generated it. The OpenIPMI driver uses it for storing panic event information. Signed-off-by: Corey Minyard Reviewed-by: Cédric Le Goater ---

Re: [Qemu-devel] [PATCH] sun4u: implement power device

CC'ing PCI maintainers. Hi Mark, On 01/15/2018 05:58 PM, Mark Cave-Ayland wrote: > This inbuilt device contains a single 4-byte register, of which bit 24 is used > to power down the machine on a real Ultra 5. > > The power device exists at offset 0x724000 on a real machine, but due to the >

Re: [Qemu-devel] [PATCH V4 2/7] CAN bus support to connect bust to Linux host SocketCAN interface.

On 01/15/2018 06:29 PM, Pavel Pisa wrote: > Hello Philippe, > > thanks for review. > > I have updated patch series in can-pci branch in > > https://gitlab.fel.cvut.cz/canbus/qemu-canbus > > I would wait some day if there is some remark > from other developers and socket ones especially.

[Qemu-devel] [PULL v3 00/53] Misc changes for 2017-01-12

The following changes since commit 997eba28a3ed5400a80f754bf3a1c8044b75b9ff: Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20180111' into staging (2018-01-11 14:34:41 +) are available in the git repository at: git://github.com/bonzini/qemu.git tags/for-upstream

[Qemu-devel] [PULL 53/53] ucontext: annotate coroutine stack for ASAN

From: Marc-André Lureau It helps ASAN to detect more leaks on coroutine stacks, as found in the following patch. A similar work would need to be done for sigaltstack & windows fibers to have similar coverage. Since ucontext is preferred, I didn't bother checking the

[Qemu-devel] [PULL 46/53] cpu_physical_memory_sync_dirty_bitmap: Another alignment fix

From: "Dr. David Alan Gilbert" This code has an optimised, word aligned version, and a boring unaligned version. My commit f70d345 fixed one alignment issue, but there's another. The optimised version operates on 'longs' dealing with (typically) 64 pages at a time,

Re: [Qemu-devel] [PATCH v4 01/16] fdc: move object structures to header file

On 01/06/2018 10:37 AM, Hervé Poussineau wrote: > We are now able to embed floppy controllers in another object. > > Acked-by: Michael S. Tsirkin > Acked-by: Paolo Bonzini > Signed-off-by: Hervé Poussineau Hmm, if it's necessary to

[Qemu-devel] [PATCH v2] file-posix: specify expected filetypes

I don't think there's a legitimate reason to open directories as if they were files. This prevents QEMU from opening and attempting to probe a directory inode, which can break in exciting ways. One of those ways is lseek on ext4/xfs, which will return 0x7fff as the file size instead of

[Qemu-devel] [PATCH 4/4] curl: convert to CoQueue

Now that CoQueues can use a QemuMutex for thread-safety, there is no need for curl to roll its own coroutine queue. Coroutines can be placed directly on the queue instead of using a list of CURLAIOCBs. Signed-off-by: Paolo Bonzini --- block/curl.c | 20

[Qemu-devel] [PATCH 3/4] coroutine-lock: make qemu_co_enter_next thread-safe

qemu_co_queue_next does not need to release and re-acquire the mutex, because the queued coroutine does not run immediately. However, this does not hold for qemu_co_enter_next. Now that qemu_co_queue_wait can synchronize (via QemuLockable) with code that is not running in coroutine context, it's

[Qemu-devel] [PATCH 2/4] coroutine-lock: convert CoQueue to use QemuLockable

There are cases in which a queued coroutine must be restarted from non-coroutine context (with qemu_co_enter_next). In this cases, qemu_co_enter_next also needs to be thread-safe, but it cannot use a CoMutex and so cannot qemu_co_queue_wait. Use QemuLockable so that the CoQueue can

[Qemu-devel] [PATCH 0/4] coroutine-lock: polymorphic CoQueue

There are cases in which a queued coroutine must be restarted from non-coroutine context (with qemu_co_enter_next). In this cases, qemu_co_enter_next also needs to be thread-safe, but it cannot use a CoMutex and so cannot qemu_co_queue_wait. This happens in curl (which right now is rolling its

[Qemu-devel] [PATCH 1/4] lockable: add QemuLockable

QemuLockable is a polymorphic lock type that takes an object and knows which function to use for locking and unlocking. The implementation could use C11 _Generic, but since the support is not very widespread I am instead using __builtin_choose_expr and __builtin_types_compatible_p, which are

Re: [Qemu-devel] [PATCH 1/3] linux-user: introduce functions to detect CPU type

On 01/13/2018 06:48 AM, Laurent Vivier wrote: > From: YunQiang Su > > Move CPU type name selection to a function, > and add a function to return ELF e_flags. > > [lv: splitted the patch and some cleanup in get_elf_eflags()] > Signed-off-by: Laurent Vivier >

Re: [Qemu-devel] [PATCH V4 2/7] CAN bus support to connect bust to Linux host SocketCAN interface.

Hello Philippe, thanks for review. I have updated patch series in can-pci branch in https://gitlab.fel.cvut.cz/canbus/qemu-canbus I would wait some day if there is some remark from other developers and socket ones especially. On Monday 15 of January 2018 03:55:00 Philippe Mathieu-Daudé

Re: [Qemu-devel] qcow2 autoloading bitmaps

On 01/11/2018 10:15 AM, Vladimir Sementsov-Ogievskiy wrote: > 11.01.2018 17:43, Eric Blake wrote: >> On 01/11/2018 08:26 AM, Vladimir Sementsov-Ogievskiy wrote: >> >>> # @autoload: the bitmap will be automatically loaded when the image it >>> is stored >>> #    in is opened. This flag

[Qemu-devel] [PATCH] sun4u: implement power device

This inbuilt device contains a single 4-byte register, of which bit 24 is used to power down the machine on a real Ultra 5. The power device exists at offset 0x724000 on a real machine, but due to the current configuration of the BARs in QEMU it must be located lower in PCI IO space. For the

Re: [Qemu-devel] [PULL 09/27] migration: calculate vCPU blocktime on dst side

On 2018-01-15 12:52, Juan Quintela wrote: > From: Alexey Perevalov > > This patch provides blocktime calculation per vCPU, > as a summary and as a overlapped value for all vCPUs. > > This approach was suggested by Peter Xu, as an improvements of > previous approch where

[Qemu-devel] [PATCH v2] qemu: improve hugepage allocation failure message

Improve hugepage allocation failure message, indicating what is happening to the user. Signed-off-by: Marcelo Tosatti --- v2: move to allocate_system_memory_nonnuma (Paolo) s/whats/what is/ (Eric) diff --git a/numa.c b/numa.c index 7b9c33a..1f1aff1 100644 --- a/numa.c

Re: [Qemu-devel] [PATCH v5 08/15] qcow2: skip writing zero buffers to empty COW areas

On Mon 15 Jan 2018 07:21:01 PM CET, Anton Nefedov wrote: >>> /** >>> + * Indicates that both COW areas are empty (nb_bytes == 0) >>> + * or filled with zeroes and do not require any more copying >>> + */ >>> +bool zero_cow; [...] >>> -if (start->nb_bytes == 0 &&

Re: [Qemu-devel] [Bug 1743337] [NEW] OS/2 Warp 4 HPFS corruption

On Mon, 2018-01-15 at 09:48 +, MVoloshin wrote: > Public bug reported: > > How to reproduce: > Install OS/2 Warp 4 onto HPFS-formatted partition. After reboot there > will be messages about "missing" files and OS2.INI not found. Chkdsk > C: complains about FS corruption. Nothing changes even

[Qemu-devel] [PATCH v2] net: Allow hubports to connect to other netdevs

QEMU can emulate hubs to connect NICs and netdevs. This is currently primarily used for the mis-named 'vlan' feature of the networking subsystem. Now the 'vlan' feature has been marked as deprecated, since its name is rather confusing and the users often rather mis-configure their network when

[Qemu-devel] [Bug 1743337] Re: OS/2 Warp 4 HPFS corruption

** Description changed: How to reproduce: Install OS/2 Warp 4 onto HPFS-formatted partition. After reboot there will be messages about "missing" files and OS2.INI not found. Chkdsk C: complains about FS corruption. Nothing changes even after fixing errors and next reboot. If you install

[Qemu-devel] [Bug 1743337] Re: OS/2 Warp 4 HPFS corruption

** Attachment added: "warp4_2.PNG" https://bugs.launchpad.net/qemu/+bug/1743337/+attachment/5037538/+files/warp4_2.PNG -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1743337 Title: OS/2 Warp 4

[Qemu-devel] [Bug 1743337] Re: OS/2 Warp 4 HPFS corruption

** Attachment added: "warp4_3.PNG" https://bugs.launchpad.net/qemu/+bug/1743337/+attachment/5037539/+files/warp4_3.PNG -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1743337 Title: OS/2 Warp 4

[Qemu-devel] [Bug 1743337] Re: OS/2 Warp 4 HPFS corruption

** Attachment added: "warp4.PNG" https://bugs.launchpad.net/qemu/+bug/1743337/+attachment/5037537/+files/warp4.PNG -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1743337 Title: OS/2 Warp 4 HPFS

[Qemu-devel] [Bug 1743441] Re: OS/2 Warp 4.52 OS2LVM failure

** Description changed: - When I try to boot OS/2 Warp 4.51 (Merlin), 4.52 (Aurora) or eCS 1.2.5, etc. I always get an exception in OS2LVM (TRAP 000E). You can reproduce the bug using this disk image: https://drive.google.com/open?id=1zzjs9hTS0TK-Xb5hnon8SQ-2C1EmlYfy + When I try to boot OS/2

Re: [Qemu-devel] [PATCH] escc: introduce a selector for the register bit

On 02/01/18 18:33, Laurent Vivier wrote: From: Laurent Vivier On Sparc and PowerMac, the bit 0 of the address selects the register type (control or data) and bit 1 selects the channel (B or A). On m68k Macintosh, the bit 0 selects the channel and bit 1 the register type.

[Qemu-devel] [Bug 1743441] [NEW] OS/2 Warp 4.52 OS2LVM failure

Public bug reported: When I try to boot OS/2 Warp 4.51 (Merlin), 4.52 (Aurora) or eCS 1.2.5, etc. I always get an exception in OS2LVM (TRAP 000E). You can reproduce the bug using this disk image: https://drive.google.com/open?id=1zzjs9hTS0TK-Xb5hnon8SQ-2C1EmlYfy P.S. OS/2 Warp 4.0 boots OK (if

Re: [Qemu-devel] [PATCH v2 10/11] target/arm: Decode aa32 armv8.3 3-same

On 01/15/2018 10:46 AM, Peter Maydell wrote: > This doesn't seem to line up with the Arm ARM decode. Your > pattern and mask give > op0 = 0x, op1 = 100, op2 = 0 and also bit 8 = 0. > The ARM has 3reg-same decoded with > op0 = 0x, op1 = 1x0, op2 = x > > (and some insns in the 3reg-same group

Re: [Qemu-devel] [PATCH v1 1/1] s390x: fix storage attributes migration for non-small guests

CCing qemu-s390x. On 01/15/2018 05:52 PM, Claudio Imbrenda wrote: > Fix storage attribute migration so that it does not fail for guests > with more than a few GB of RAM. Migration itself was successful, but > storage attributes were not migrated completely. > > This patch fixes the migration of

Re: [Qemu-devel] [PATCH v2 11/11] target/arm: Decode aa32 armv8.3 2-reg-index

On 18 December 2017 at 17:24, Richard Henderson wrote: > Signed-off-by: Richard Henderson > --- > target/arm/translate.c | 51 > ++ > 1 file changed, 51 insertions(+) > > diff --git

Re: [Qemu-devel] [PATCH v2 10/11] target/arm: Decode aa32 armv8.3 3-same

On 18 December 2017 at 17:24, Richard Henderson wrote: > Signed-off-by: Richard Henderson > --- > target/arm/translate.c | 65 > ++ > 1 file changed, 65 insertions(+) > > diff --git

Re: [Qemu-devel] [PATCH v2 10/11] target/arm: Decode aa32 armv8.3 3-same

On 18 December 2017 at 17:24, Richard Henderson wrote: > Signed-off-by: Richard Henderson > --- > target/arm/translate.c | 65 > ++ > 1 file changed, 65 insertions(+) > > diff --git

Re: [Qemu-devel] [PATCH v2 4/7] target/m68k: add index parameter to gen_load()/gen_store() and Co.

On 01/12/2018 04:43 PM, Laurent Vivier wrote: > The instruction "moves" can select source and destination > address space (user or kernel). This patch modifies > all the load/store functions to be able to provide > the address space the caller wants to use instead > of using the current one. All

Re: [Qemu-devel] [PATCH v8 13/14] sdhci: fix the PCI device, using the PCI address space for DMA

On 01/15/2018 03:24 PM, Philippe Mathieu-Daudé wrote: > While SysBus devices can use the get_system_memory() address space, > PCI devices should use the bus master address space for DMA. > > Suggested-by: Peter Maydell > Signed-off-by: Philippe Mathieu-Daudé

Re: [Qemu-devel] [PATCH 00/11] sun4u: APB tidy-up/rename and tracepoint conversions

On 14/01/18 13:25, Philippe Mathieu-Daudé wrote: On 01/14/2018 08:21 AM, Mark Cave-Ayland wrote: On 14/01/18 11:15, no-re...@patchew.org wrote: Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id:

Re: [Qemu-devel] [PATCH 07/11] sun4u: rename apb variables and constants

On 14/01/18 13:20, Philippe Mathieu-Daudé wrote: Hi Mark, On 01/14/2018 07:47 AM, Mark Cave-Ayland wrote: In order to reflect the previous change of TYPE_APB to TYPE_SABRE, update the corresponding variable names to keep the terminology consistent. Signed-off-by: Mark Cave-Ayland

Re: [Qemu-devel] [PATCH v2 5/7] target/m68k: add moves

On 01/12/2018 04:43 PM, Laurent Vivier wrote: > index 1aadc622db..efe2bf90ee 100644 > --- a/target/m68k/qregs.def > +++ b/target/m68k/qregs.def > @@ -1,5 +1,7 @@ > DEFO32(PC, pc) > DEFO32(SR, sr) > +DEFO32(DFC, dfc) > +DEFO32(SFC, sfc) These are unused. No need to define or initialize. > #if

Re: [Qemu-devel] [PATCH 09/11] pci: add trace-events support for hw/pci-host

On 14/01/18 16:27, Marcel Apfelbaum wrote: On 14/01/2018 15:32, Philippe Mathieu-Daudé wrote: On 01/14/2018 07:47 AM, Mark Cave-Ayland wrote: Signed-off-by: Mark Cave-Ayland Not sure this is worth a separate commit (I'd squash it in the next patch), still: I

[Qemu-devel] [PATCH v8 13/14] sdhci: fix the PCI device, using the PCI address space for DMA

While SysBus devices can use the get_system_memory() address space, PCI devices should use the bus master address space for DMA. Suggested-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé --- include/hw/sd/sdhci.h | 1 + hw/sd/sdhci.c

Re: [Qemu-devel] [PATCH] m25p80: prevent buffer overflow during erasing

W dniu 15.01.2018 o 16:13, Aleksey Kuleshov pisze: memset is not checked, so it's possible to go beyond the storage. Add checks and truncate requested length. Signed-off-by: Aleksey Kuleshov Acked-by: Marcin Krzemiński --- hw/block/m25p80.c |

[Qemu-devel] [PATCH v8 14/14] sdhci: add a 'dma' property to the sysbus devices

Add a 'dma' property allowing machine creation to provide the address-space SDHCI DMA operates on. [based on a patch from Alistair Francis from qemu/xilinx tag xilinx-v2016.1] Signed-off-by: Philippe Mathieu-Daudé --- include/hw/sd/sdhci.h | 1 +

[Qemu-devel] [PATCH v8 11/14] sdhci: fix CAPAB/MAXCURR registers, both are 64bit and read-only

running qtests: $ make check-qtest-arm GTESTER check-qtest-arm SDHC rd_4b @0x44 not implemented SDHC wr_4b @0x40 <- 0x89abcdef not implemented SDHC wr_4b @0x44 <- 0x01234567 not implemented Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis

[Qemu-devel] [PATCH v8 10/14] sdhci: rename the SDHC_CAPAB register

Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis --- hw/sd/sdhci-internal.h | 2 +- hw/sd/sdhci.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/sd/sdhci-internal.h b/hw/sd/sdhci-internal.h

[Qemu-devel] [PATCH v8 12/14] sdhci: Implement write method of ACMD12ERRSTS register

From: Andrey Smirnov Signed-off-by: Andrey Smirnov Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis --- hw/sd/sdhci.c | 3

[Qemu-devel] [PATCH v8 09/14] sdhci: move MASK_TRNMOD with other SDHC_TRN* defines in "sd-internal.h"

Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis --- hw/sd/sdhci-internal.h | 1 + hw/sd/sdhci.c | 3 +-- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/sd/sdhci-internal.h b/hw/sd/sdhci-internal.h

Re: [Qemu-devel] [PATCH v2 6/6] iotest 201: new test for qmp nbd-server-remove

15.01.2018 18:05, Eric Blake wrote: On 01/15/2018 08:40 AM, Vladimir Sementsov-Ogievskiy wrote: And the list archives show several threads of people complaining that ./check failing with a diff that merely shows: -. +..E.. didn't see that. usually, for failed iotests I see -. +..E..

[Qemu-devel] [PATCH v8 05/14] sdhci: refactor common sysbus/pci realize() into sdhci_common_realize()

Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis --- hw/sd/sdhci.c | 30 +- 1 file changed, 21 insertions(+), 9 deletions(-) diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 15d0961ac7..cf0c079990

[Qemu-devel] [PATCH v8 07/14] sdhci: use qemu_log_mask(UNIMP) instead of fprintf()

Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis --- hw/sd/sdhci.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index bbe4570326..7ffb1dbec5 100644 --- a/hw/sd/sdhci.c

[Qemu-devel] [PATCH v8 02/14] sdhci: remove dead code

Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis --- include/hw/sd/sdhci.h | 2 -- hw/sd/sdhci.c | 2 -- 2 files changed, 4 deletions(-) diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h index

[Qemu-devel] [PATCH v8 08/14] sdhci: convert the DPRINT() calls into trace events

zero-initialize ADMADescr 'dscr' in sdhci_do_adma() to avoid: hw/sd/sdhci.c: In function ‘sdhci_do_adma’: hw/sd/sdhci.c:714:29: error: ‘dscr.addr’ may be used uninitialized in this function [-Werror=maybe-uninitialized] trace_sdhci_adma("link", s->admasysaddr);

[Qemu-devel] [PATCH v8 03/14] sdhci: use DEFINE_SDHCI_COMMON_PROPERTIES() for common sysbus/pci properties

Add common/sysbus/pci/sdbus comments to have clearer code blocks separation. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/sd/sdhci.h | 4 +++- hw/sd/sdhci.c | 25 + 2 files changed, 20 insertions(+), 9 deletions(-) diff --git

[Qemu-devel] [PATCH v8 06/14] sdhci: refactor common sysbus/pci unrealize() into sdhci_common_unrealize()

Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis --- hw/sd/sdhci.c | 22 ++ 1 file changed, 22 insertions(+) diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index cf0c079990..bbe4570326 100644 --- a/hw/sd/sdhci.c

[Qemu-devel] [PATCH v8 04/14] sdhci: refactor common sysbus/pci class_init() into sdhci_common_class_init()

Now both inherited classes appear as DEVICE_CATEGORY_STORAGE. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis --- hw/sd/sdhci.c | 18 +- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git

[Qemu-devel] [PATCH v8 00/14] SDHCI: housekeeping (part 1)

Since v7: - addressed Peter & Paolo reviews - do not use qdev_property_add_static() but move common properties into a new DEFINE_SDHCI_COMMON_PROPERTIES() - use _space_memory rather than create AS with address_space_init() Since v6: - addressed Peter reviews - do not use an unique

[Qemu-devel] [PATCH v8 01/14] sdhci: clean up includes

Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis --- hw/sd/sdhci-internal.h | 4 include/hw/sd/sdhci.h | 7 ++- hw/sd/sdhci.c | 1 + 3 files changed, 7 insertions(+), 5 deletions(-) diff --git

Re: [Qemu-devel] [PATCH v5 08/15] qcow2: skip writing zero buffers to empty COW areas

On 15/1/2018 6:31 PM, Alberto Garcia wrote: On Wed 01 Nov 2017 04:44:01 PM CET, Anton Nefedov wrote: If COW areas of the newly allocated clusters are zeroes on the backing image, efficient bdrv_write_zeroes(flags=BDRV_REQ_ALLOCATE) can be used on the whole cluster instead of writing explicit

Re: [Qemu-devel] [PATCH v2 09/11] target/arm: Decode aa64 armv8.3 fcmla

On 18 December 2017 at 17:24, Richard Henderson wrote: > Signed-off-by: Richard Henderson > --- > target/arm/helper.h | 11 > target/arm/advsimd_helper.c | 144 ++ >

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