[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/1488212
Title:
16bit appcr
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/1487264
Title:
Windows 8.1
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/1785308
Title:
0x8 excepti
Signed-off-by: Li Qiang
---
Change since v1:
-fix a typo in scsi_cd_info's name
hw/scsi/scsi-disk.c | 28
1 file changed, 16 insertions(+), 12 deletions(-)
diff --git a/hw/scsi/scsi-disk.c b/hw/scsi/scsi-disk.c
index c43163cef4..8e9fa5ca6b 100644
--- a/hw/scsi/scsi
Performance results for fp-bench:
1. Intel(R) Core(TM) i7-6700K CPU @ 4.00GHz
- before:
fma-single: 74.73 MFlops
fma-double: 74.54 MFlops
- after:
fma-single: 203.37 MFlops
fma-double: 169.37 MFlops
2. ARM Aarch64 A57 @ 2.4GHz
- before:
fma-single: 23.24 MFlops
fma-double: 23.70 MFlops
- after:
f
These microbenchmarks will allow us to measure the performance impact of
FP emulation optimizations. Note that we can measure both directly the impact
on the softfloat functions (with "-t soft"), or the impact on an
emulated workload (call with "-t host" and run under qemu user-mode).
Signed-off-b
Performance results for fp-bench:
1. Intel(R) Core(TM) i7-6700K CPU @ 4.00GHz
- before:
sqrt-single: 43.27 MFlops
sqrt-double: 24.81 MFlops
- after:
sqrt-single: 297.94 MFlops
sqrt-double: 210.46 MFlops
2. ARM Aarch64 A57 @ 2.4GHz
- before:
sqrt-single: 12.41 MFlops
sqrt-double: 6.22 MFlops
- aft
Performance results (single and double precision) for fp-bench:
1. Intel(R) Core(TM) i7-6700K CPU @ 4.00GHz
- before:
add-single: 135.07 MFlops
add-double: 131.60 MFlops
sub-single: 130.04 MFlops
sub-double: 133.01 MFlops
- after:
add-single: 443.04 MFlops
add-double: 301.95 MFlops
sub-single: 411
The appended paves the way for leveraging the host FPU for a subset
of guest FP operations. For most guest workloads (e.g. FP flags
aren't ever cleared, inexact occurs often and rounding is set to the
default [to nearest]) this will yield sizable performance speedups.
The approach followed here av
Performance results for fp-bench:
1. Intel(R) Core(TM) i7-6700K CPU @ 4.00GHz
- before:
cmp-single: 113.01 MFlops
cmp-double: 115.54 MFlops
- after:
cmp-single: 527.83 MFlops
cmp-double: 457.21 MFlops
2. ARM Aarch64 A57 @ 2.4GHz
- before:
cmp-single: 39.32 MFlops
cmp-double: 39.80 MFlops
- after:
Performance results for fp-bench:
1. Intel(R) Core(TM) i7-6700K CPU @ 4.00GHz
- before:
div-single: 34.84 MFlops
div-double: 34.04 MFlops
- after:
div-single: 275.23 MFlops
div-double: 216.38 MFlops
2. ARM Aarch64 A57 @ 2.4GHz
- before:
div-single: 9.33 MFlops
div-double: 9.30 MFlops
- after:
div
Performance results for fp-bench:
1. Intel(R) Core(TM) i7-6700K CPU @ 4.00GHz
- before:
mul-single: 126.91 MFlops
mul-double: 118.28 MFlops
- after:
mul-single: 258.02 MFlops
mul-double: 197.96 MFlops
2. ARM Aarch64 A57 @ 2.4GHz
- before:
mul-single: 37.42 MFlops
mul-double: 38.77 MFlops
- after:
This paves the way for upcoming work.
Reviewed-by: Bastian Koppelmann
Reviewed-by: Alex Bennée
Signed-off-by: Emilio G. Cota
---
include/fpu/softfloat.h | 20
1 file changed, 20 insertions(+)
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
index 8fd9f9bbae.
v4: https://lists.gnu.org/archive/html/qemu-devel/2018-06/msg02960.html
Changes since v4:
- Rebase on current master (a73549f99).
- Add a patch for fp-test to pick a specialization; this gets rid of
the muladd errors, since our default "no specialization" does not
raise invalid when one of t
This gets rid of the muladd errors due to not raising the invalid flag.
- Before:
Errors found in f64_mulAdd, rounding near_even, tininess before rounding:
+000.0 +7FF.0 +7FF.F
=> +7FF.F . expected -7FF.F v
[...]
- Aft
These will gain some users very soon.
Signed-off-by: Emilio G. Cota
---
include/fpu/softfloat.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
index 9eeccd88a5..38a5e99cf3 100644
--- a/include/fpu/softfloat.h
+++ b/include/fpu/so
Reviewed-by: Bastian Koppelmann
Signed-off-by: Emilio G. Cota
---
target/tricore/fpu_helper.c | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/target/tricore/fpu_helper.c b/target/tricore/fpu_helper.c
index df162902d6..31df462e4a 100644
--- a/target/tricore/fpu_helper
glibc >= 2.25 defines canonicalize in commit eaf5ad0
(Add canonicalize, canonicalizef, canonicalizel., 2016-10-26).
Given that we'll be including soon, prepare
for this by prefixing our canonicalize() with sf_ to avoid
clashing with the libc's canonicalize().
Reported-by: Bastian Koppelmann
Tes
On 10/13/18 8:08 AM, Li Qiang wrote:
> Signed-off-by: Li Qiang
Reviewed-by: Philippe Mathieu-Daudé
> ---
> hw/audio/ac97.c | 12
> 1 file changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/hw/audio/ac97.c b/hw/audio/ac97.c
> index 337402e9c6..d799533aa9 100644
> --- a/hw/a
On Sat, Oct 13, 2018 at 08:20:25PM +0200, Max Reitz wrote:
> On 13.10.18 07:02, Eduardo Habkost wrote:
> > Signed-off-by: Eduardo Habkost
> > ---
> > I'd like to do this in QEMU 3.1. I think it's time to drop
> > support for old systems that have only Python 2.
> >
> > We still have a few script
Hi Li,
On 10/13/18 8:31 AM, Li Qiang wrote:
> Signed-off-by: Li Qiang
> ---
> hw/net/ne2000.c | 15 +--
> 1 file changed, 9 insertions(+), 6 deletions(-)
>
> diff --git a/hw/net/ne2000.c b/hw/net/ne2000.c
> index 07d79e317f..ab71ad49cb 100644
> --- a/hw/net/ne2000.c
> +++ b/hw/net/n
Hello,
I'm trying to install OpenBSD 6.3 on Arch Linux.
This is the start script I'm using:
```
#!/bin/sh
qemu-system-x86_64 \
-enable-kvm \
-m 2048 \
-nic user,model=virtio \
-drive file=openbsd63.qcow2,media=disk,if=virtio \
-cdrom openbsd63.iso \
-display gtk
`
On 10/12/18 10:30 AM, Bastian Koppelmann wrote:
> return false in trans_* instructions is no longer used as a fallback to
> the old decoder. We can therefore now use 'return false' to indicate an
> illegal
> instruction.
>
> Signed-off-by: Bastian Koppelmann
> Signed-off-by: Peer Adelt
> ---
>
On 10/12/18 10:30 AM, Bastian Koppelmann wrote:
> if (!decode_insn32(ctx, ctx->opcode)) {
> -/* fallback to old decoder */
> -decode_RV32_64G(env, ctx);
> }
Still need gen_exception_illegal.
r~
On 10/12/18 10:30 AM, Bastian Koppelmann wrote:
> static bool trans_mulw(DisasContext *ctx, arg_mulw *a, uint32_t insn)
> {
> -gen_arith(ctx, OPC_RISC_MULW, a->rd, a->rs1, a->rs2);
> -return true;
> +return trans_arith(ctx, a, &tcg_gen_mul_tl);
> }
> static bool trans_divw(DisasCont
On 10/12/18 10:30 AM, Bastian Koppelmann wrote:
> with all 16 bit insns moved to decodetree no path is falling back to
> gen_system(), so we can remove it.
>
> Signed-off-by: Bastian Koppelmann
> Signed-off-by: Peer Adelt
> ---
> target/riscv/translate.c | 32
>
On 10/12/18 10:30 AM, Bastian Koppelmann wrote:
> +static bool trans_shift(DisasContext *ctx, arg_arith *a,
> +void(*func)(TCGv, TCGv, TCGv))
gen_shift. Otherwise,
Reviewed-by: Richard Henderson
r~
On 10/12/18 10:30 AM, Bastian Koppelmann wrote:
> +static bool trans_arith(DisasContext *ctx, arg_arith *a,
> +void(*func)(TCGv, TCGv, TCGv))
gen_arith. Otherwise,
Reviewed-by: Richard Henderson
r~
On 10/12/18 10:30 AM, Bastian Koppelmann wrote:
> static bool trans_slliw(DisasContext *ctx, arg_slliw *a, uint32_t insn)
> {
> -gen_arith_imm(ctx, OPC_RISC_SLLIW, a->rd, a->rs1, a->shamt);
> +TCGv source1;
> +source1 = tcg_temp_new();
> +gen_get_gpr(source1, a->rs1);
> +
> +t
On 10/12/18 10:30 AM, Bastian Koppelmann wrote:
> +static bool trans_store(DisasContext *ctx, arg_sb *a, int memop)
gen_store.
> {
> -gen_store(ctx, OPC_RISC_SB, a->rs1, a->rs2, a->imm);
> +TCGv t0 = tcg_temp_new();
> +TCGv dat = tcg_temp_new();
> +gen_get_gpr(t0, a->rs1);
> +
On 10/12/18 10:30 AM, Bastian Koppelmann wrote:
> +static bool trans_load(DisasContext *ctx, arg_lb *a, int memop)
Again, gen_load.
> {
> -gen_load(ctx, OPC_RISC_LB, a->rd, a->rs1, a->imm);
> +TCGv t0 = tcg_temp_new();
> +TCGv t1 = tcg_temp_new();
> +gen_get_gpr(t0, a->rs1);
> +
On 10/12/18 10:30 AM, Bastian Koppelmann wrote:
> +static bool trans_branch(DisasContext *ctx, arg_branch *a, TCGCond cond)
I think you should still call it gen_branch.
Reserve the trans_ prefix for things called from the decoder.
Otherwise,
Reviewed-by: Richard Henderson
r~
On 10/12/18 10:30 AM, Bastian Koppelmann wrote:
> trans_jalr() is the only caller, so move the code into
> trans_jalr().
>
> Signed-off-by: Bastian Koppelmann
> Signed-off-by: Peer Adelt
> ---
> target/riscv/insn_trans/trans_rvi.inc.c | 27 +-
> target/riscv/translate.c
On 10/12/18 10:30 AM, Bastian Koppelmann wrote:
> +@c_flwsp_ldsp ... . . . .. &c_flwsp_ldsp uimm_flwsp=%uimm_6bit_lw
> \
> +uimm_ldsp=%uimm_6bit_ld %rd
> +@c_fswsp_sdsp ... . . . .. &c_fswsp_sdsp uimm_fswsp=%uimm_6bit_sw
> \
> +uimm_sdsp=%uimm_6bit_sd rs2=%rs2_5
I'm
On 10/12/18 10:30 AM, Bastian Koppelmann wrote:
> +static bool trans_c_addi(DisasContext *ctx, arg_c_addi *a, uint16_t insn)
> +{
> +if (a->imm == 0) {
> +return true;
> +}
return false, I think.
> +static bool trans_c_jal_addiw(DisasContext *ctx, arg_c_jal_addiw *a,
> +ui
On 12/10/2018 21:02, Laurent Vivier wrote:
> On 09/10/2018 09:45, Kan Li wrote:
>> Summary:
>> This is to fix bug https://bugs.launchpad.net/qemu/+bug/1796754.
>> It is valid for ifc_buf to be NULL according to
>> http://man7.org/linux/man-pages/man7/netdevice.7.html.
>>
>> Signed-off-by: Kan Li
>
On 11/10/2018 00:36, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé
> Tested-By: Guido Günther
> ---
> linux-user/strace.c| 13 +
> linux-user/strace.list | 2 +-
> 2 files changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/linux-user/strace.c b/li
On 11.10.2018 23:20, Brad Smith wrote:
> On Thu, Oct 11, 2018 at 09:31:23PM +0200, Kamil Rytarowski wrote:
>> On 11.10.2018 16:25, Brad Smith wrote:
>>> On 10/11/2018 5:41 AM, Kamil Rytarowski wrote:
>>>
On 11.10.2018 11:36, Peter Maydell wrote:
> On 11 October 2018 at 00:55, Brad Smith w
On 13.10.18 07:02, Eduardo Habkost wrote:
> Signed-off-by: Eduardo Habkost
> ---
> I'd like to do this in QEMU 3.1. I think it's time to drop
> support for old systems that have only Python 2.
>
> We still have a few scripts that are not required for building
> QEMU that still work only with Pyt
On 10/12/18 10:30 AM, Bastian Koppelmann wrote:
> +# Argument sets:
> +&cl rs1 rd
> +&cl_dw uimm rs1 rd
> +&ciw nzuimm rd
> +&cs rs1 rs2
> +&cs_dw uimm rs1 rs2
I guess this is good enough for now.
What I'd like to see is something like
&i imm
On 10/12/18 10:30 AM, Bastian Koppelmann wrote:
> +static bool trans_sfence_vma(DisasContext *ctx, arg_sfence_vma *a,
> + uint32_t insn)
> +{
> +#ifndef CONFIG_USER_ONLY
> +gen_helper_tlb_flush(cpu_env);
> +return true;
> +#else
> +return false;
> +#endif
> +
On 10/12/18 10:30 AM, Bastian Koppelmann wrote:
> Signed-off-by: Bastian Koppelmann
> Signed-off-by: Peer Adelt
> ---
> target/riscv/insn32.decode | 8 +
> target/riscv/insn_trans/trans_rvd.inc.c | 94 +
> target/riscv/translate.c| 484 +---
On 10/12/18 10:30 AM, Bastian Koppelmann wrote:
> +static bool trans_fmadd_d(DisasContext *ctx, arg_fmadd_d *a, uint32_t insn)
> +{
> +gen_set_rm(ctx, a->rm);
> +gen_helper_fmadd_d(cpu_fpr[a->rd], cpu_env, cpu_fpr[a->rs1],
> + cpu_fpr[a->rs2], cpu_fpr[a->rs3]);
> +
On 10/12/18 10:30 AM, Bastian Koppelmann wrote:
> +static bool trans_fmadd_s(DisasContext *ctx, arg_fmadd_s *a, uint32_t insn)
> +{
> +gen_set_rm(ctx, a->rm);
> +gen_helper_fmadd_s(cpu_fpr[a->rd], cpu_env, cpu_fpr[a->rs1],
> + cpu_fpr[a->rs2], cpu_fpr[a->rs3]);
> +
On 10/12/18 10:30 AM, Bastian Koppelmann wrote:
> +static bool trans_fcvt_l_s(DisasContext *ctx, arg_fcvt_l_s *a, uint32_t insn)
> +{
> +#if defined(TARGET_RISCV64)
> +REQUIRE_FPU;
> +
> +TCGv t0 = tcg_temp_new();
> +gen_set_rm(ctx, a->rm);
> +gen_helper_fcvt_l_s(t0, cpu_env, cpu_fp
On 10/12/18 10:30 AM, Bastian Koppelmann wrote:
> +#define REQUIRE_FPU \
> +if (!(ctx->flags & TB_FLAGS_FP_ENABLE)) \
> +gen_exception_illegal(ctx)
Should wrap this in do { } while (0). And simply return true after the
exception; no need to generate the dead code that follows.
Otherwise,
Rev
On 10/12/18 10:30 AM, Bastian Koppelmann wrote:
> Signed-off-by: Bastian Koppelmann
> Signed-off-by: Peer Adelt
> ---
> target/riscv/insn32.decode | 13 +++
> target/riscv/insn_trans/trans_rva.inc.c | 99 +
> target/riscv/translate.c| 140 --
On 10/12/18 10:30 AM, Bastian Koppelmann wrote:
> @fence . ... . ... %pred %succ
> @csr . ... . ... %csr %rs1
> %rd
>
> +@atom_ld . aq:1 rl:1 . . ... &atomic rs2=0 %rs1
> %rd
rs2=0. T
On 10/12/18 10:30 AM, Bastian Koppelmann wrote:
> Signed-off-by: Bastian Koppelmann
> Signed-off-by: Peer Adelt
> ---
> target/riscv/insn32.decode | 17 +
> target/riscv/insn_trans/trans_rvm.inc.c | 87 +
> target/riscv/translate.c| 10 +--
On 10/12/18 10:30 AM, Bastian Koppelmann wrote:
> Signed-off-by: Bastian Koppelmann
> Signed-off-by: Peer Adelt
> ---
> target/riscv/insn32.decode | 8 +++
> target/riscv/insn_trans/trans_rvi.inc.c | 79 +
> target/riscv/translate.c| 43 +
Igor Mammedov writes:
> On Mon, 8 Oct 2018 19:31:08 +0200
> Markus Armbruster wrote:
>
>> Calling error_report() in a function that takes an Error ** argument
>> is suspicious. parse_numa_node() does that, and then exit()s. It
>> also passes &error_fatal to machine_set_cpu_numa_node(). Both
> >
> > This patch series has implementation for "fake DAX".
> > "fake DAX" is fake persistent memory(nvdimm) in guest
> > which allows to bypass the guest page cache. This also
> > implements a VIRTIO based asynchronous flush mechanism.
>
> Can we stop calling this 'fake DAX', because it is
On Fri, Oct 12, 2018 at 10:01 PM Pankaj Gupta wrote:
>
> This patch adds virtio-pmem driver for KVM guest.
>
> Guest reads the persistent memory range information from
> Qemu over VIRTIO and registers it on nvdimm_bus. It also
> creates a nd_region object with the persistent memory
> range informa
On Fri, Oct 12, 2018 at 10:00 PM Pankaj Gupta wrote:
>
> This patch series has implementation for "fake DAX".
> "fake DAX" is fake persistent memory(nvdimm) in guest
> which allows to bypass the guest page cache. This also
> implements a VIRTIO based asynchronous flush mechanism.
Can we stop
On 10/13/18 5:15 PM, Philippe Mathieu-Daudé wrote:
> Similar to the test_x86_64_pc test, this boots a Linux kernel on a
> R2D board (SH4 little-endian) and verify the serial is working.
>
> This test requires the dpkg-deb tool (apt/dnf install dpkg) to
> extract the kernel from the Debian package.
Similar to the test_x86_64_pc test, this boots a Linux kernel on a
R2D board (SH4 little-endian) and verify the usb is working by looking
at the usb trace events. Thus this test requires the QEMU binary to be
compiled with:
$ configure ... --enable-trace-backends=log
This test also requires the
Similar to the test_x86_64_pc test, this boots a Linux kernel on a
Malta board (MIPS 5Kc little-endian) and verify the serial is working.
This test requires the dpkg-deb tool (apt/dnf install dpkg) to
extract the kernel from the Debian package.
$ avocado run -p arch=mips64el tests/acceptance/bo
Hi,
Another neanderthal approach to add multi-arch acceptance tests using Avocado.
I couldn't figure how to use the R2D serial, the kernel boots using the sm501
display correctly, but I'm too console-oriented to write UI tests...
Magnus or Zoltan, any hint on this?
Thanks
Phil.
Since v2 (http
Similar to the test_x86_64_pc test, this boots a Linux kernel on a
R2D board (SH4 little-endian) and verify the serial is working.
This test requires the dpkg-deb tool (apt/dnf install dpkg) to
extract the kernel from the Debian package.
Note, due to a problem with the serial on this machine, thi
The board already instantiate the proper devices, we don't want to
add extra devices but connect the chardev to one of the serial already
available.
Signed-off-by: Philippe Mathieu-Daudé
---
scripts/qemu.py | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/scripts/qemu.py
Similar to the test_x86_64_pc test, this boots a Linux kernel on a
Malta board (MIPS 4Kc big-endian) and verify the serial is working.
This test requires the dpkg-deb tool (apt/dnf install dpkg) to
extract the kernel from the Debian package.
$ avocado --show=console run -p arch=mips
tests/acce
Signed-off-by: Philippe Mathieu-Daudé
---
tests/acceptance/boot_linux_console.py | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tests/acceptance/boot_linux_console.py
b/tests/acceptance/boot_linux_console.py
index ba3ac036da..3aa4dbe5f9 100644
--- a/tests/acceptance/boot
On 10/13/18 12:02 AM, Eduardo Habkost wrote:
Signed-off-by: Eduardo Habkost
---
Commit message is sparse; can you do something like commit e7b3af81
where you call out the availability of python 3 on all the platforms
that are currently supported per our platforms doc?
I'd like to do this
On 09.10.18 17:00, Vladimir Sementsov-Ogievskiy wrote:
> Add a new command, returning block nodes (and their users) graph.
>
> Signed-off-by: Vladimir Sementsov-Ogievskiy
> ---
> qapi/block-core.json | 108
> include/block/block.h | 1 +
> include/sy
On 10.10.18 18:59, Vladimir Sementsov-Ogievskiy wrote:
> 10.10.2018 19:55, Vladimir Sementsov-Ogievskiy wrote:
>> 10.10.2018 19:39, Vladimir Sementsov-Ogievskiy wrote:
>>> 17.08.2018 15:22, Vladimir Sementsov-Ogievskiy wrote:
Rewrite corrupted L2 table entry, which reference space out of
On 09.10.18 01:14, Vladimir Sementsov-Ogievskiy wrote:
>
>
> On 10/09/2018 01:21 AM, Max Reitz wrote:
>> On 09.10.18 00:14, Vladimir Sementsov-Ogievskiy wrote:
>>>
>>>
>>> On 10/09/2018 01:08 AM, Max Reitz wrote:
On 09.10.18 00:02, Vladimir Sementsov-Ogievskiy wrote:
>
>
> On 10/
Sources [1][2] indicate that the Emotion Engine was designed by Toshiba
and licensed to Sony. Others [3][4][5] claim it was a joint effort. It
therefore makes sense to refer to the CPU as "Toshiba/Sony R5900".
[1]
http://cs.nyu.edu/courses/spring02/V22.0480-002/projects/aldrich/emotionengine.ppt
The R5900 is taken to be MIPS III with certain modifications. From
MIPS IV it implements the instructions MOVN, MOVZ and PREF.
Signed-off-by: Fredrik Noring
Reviewed-by: Philippe Mathieu-Daudé
---
target/mips/translate.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/t
The Linux kernel traps certain reserved instruction exceptions to
emulate the corresponding instructions. QEMU is the kernel in user
mode, so those traps are emulated by accepting the instructions.
This change adds the function check_insn_opc_user_only to signal a
reserved instruction exception fo
This kind of ELF for the R5900 relies on an IEEE 754-1985 compliant FPU.
The R5900 FPU hardware is noncompliant and it is therefore emulated in
software by the Linux kernel. QEMU emulates a compliant FPU accordingly.
Signed-off-by: Fredrik Noring
Reviewed-by: Philippe Mathieu-Daudé
---
linux-us
The primary purpose of this change is to support programs compiled by
GCC for the R5900 target and thereby run R5900 Linux distributions, for
example Gentoo.
GCC in version 7.3, by itself, by inspection of the GCC source code
and inspection of the generated machine code, for the R5900 target,
only
The three-operand MULT and MULTU are the only R5900 specific
instructions emitted by GCC 7.3. The R5900 also implements the three-
operand MADD and MADDU instructions, but they are omitted in QEMU for
now since they are absent in programs compiled by current GCC versions.
Likewise, the R5900 speci
The R5900 implements the 64-bit MIPS III instruction set except DMULT,
DMULTU, DDIV, DDIVU, LL, SC, LLD and SCD. The MIPS IV instructions MOVN,
MOVZ and PREF are implemented. It has the R5900 specific three-operand
instructions MADD, MADDU, MULT and MULTU as well as pipeline 1 versions
MULT1, MULTU
The primary purpose of these changes is to support programs compiled
by GCC for the R5900 target and thereby run R5900 Linux distributions,
for example Gentoo.
GCC in version 7.3, by itself, by inspection of the GCC source code
and inspection of the generated machine code, for the R5900 target,
on
Hi Cleber,
On 10/10/18 1:26 AM, Cleber Rosa wrote:
> With the introduction of a variants file that can run the same
> tests on various architectures, it makes sense to make most tests
> to be reusable on those environments. The exception should be
> when a test is really testing a specific archit
If a command fails with a sense that scsi_sense_buf_to_errno converts to
ECANCELED/EAGAIN/ENOTCONN or with a unit attention, scsi_req_complete is
called twice. This caused a crash.
Reported-by: Wangguang
Signed-off-by: Paolo Bonzini
---
hw/scsi/scsi-disk.c | 24 +++-
1 file
The first was reported on the mailing list, the second was found by
inspection.
Paolo Bonzini (2):
scsi-disk: fix double completion of failing passthrough requests
scsi-disk: fix rerror/werror=ignore
hw/scsi/scsi-disk.c | 29 -
1 file changed, 16 insertions(+), 13
rerror=ignore was returning true from scsi_handle_rw_error but the callers were
not
calling scsi_req_complete when rerror=ignore returns true (this is the correct
thing
to do when true is returned after executing a passthrough command). Fix this by
calling it in scsi_handle_rw_error.
Signed-off
://github.com/0day-ci/linux/commits/Pankaj-Gupta/libnvdimm-nd_region-flush-callback-support/20181013-152624
base: https://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm.git
libnvdimm-for-next
config: x86_64-randconfig-g0-10131621 (attached as .config)
compiler: gcc-4.9 (Debian 4.9.4-2
Signed-off-by: Li Qiang
---
block/block-backend.c | 8
include/sysemu/block-backend.h | 6 +++---
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/block/block-backend.c b/block/block-backend.c
index dc0cd57724..2a8f3b55f8 100644
--- a/block/block-backend.c
+++ b/bl
Signed-off-by: Li Qiang
---
hw/scsi/scsi-disk.c | 28
1 file changed, 16 insertions(+), 12 deletions(-)
diff --git a/hw/scsi/scsi-disk.c b/hw/scsi/scsi-disk.c
index c43163cef4..15582fa0e2 100644
--- a/hw/scsi/scsi-disk.c
+++ b/hw/scsi/scsi-disk.c
@@ -55,6 +55,10 @@ d
://github.com/0day-ci/linux/commits/Pankaj-Gupta/libnvdimm-nd_region-flush-callback-support/20181013-152624
base: https://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm.git
libnvdimm-for-next
config: x86_64-randconfig-x017-201840 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
On 13/10/2018 07:51, Li Qiang wrote:
> Signed-off-by: Li Qiang
> ---
> hw/misc/edu.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/misc/edu.c b/hw/misc/edu.c
> index 0687ffd343..cdcf550dd7 100644
> --- a/hw/misc/edu.c
> +++ b/hw/misc/edu.c
> @@ -342,7 +342,7 @@
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