Use DeviceClass rather than SysBusDeviceClass in
milkymist_softusb_class_init().
Cc: mich...@walle.cc
Signed-off-by: Mao Zhongyi
Signed-off-by: Zhang Shengju
---
hw/input/milkymist-softusb.c | 16 +++-
1 file changed, 7 insertions(+), 9 deletions(-)
diff --git
Use DeviceClass rather than SysBusDeviceClass in
puv3_gpio_class_init().
Cc: g...@mprc.pku.edu.cn
Cc: peter.mayd...@linaro.org
Signed-off-by: Mao Zhongyi
Signed-off-by: Zhang Shengju
---
hw/gpio/puv3_gpio.c | 29 ++---
1 file changed, 14 insertions(+), 15 deletions(-)
Use DeviceClass rather than SysBusDeviceClass in
pl050_class_init().
Cc: peter.mayd...@linaro.org
Cc: qemu-...@nongnu.org
Signed-off-by: Mao Zhongyi
Signed-off-by: Zhang Shengju
---
hw/input/pl050.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git
Use DeviceClass rather than SysBusDeviceClass in
grlib_apbuart_class_init().
Cc: chout...@adacore.com
Cc: marcandre.lur...@redhat.com
Cc: pbonz...@redhat.com
Signed-off-by: Mao Zhongyi
Signed-off-by: Zhang Shengju
---
hw/char/grlib_apbuart.c | 12 +---
1 file changed, 5 insertions(+),
We no longer need any scratch registers for user-only memory ops.
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target.inc.c | 13 +
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c
index 19a0fa8a03..2815dd25a0
On 20/11/2018 12:04, David Hildenbrand wrote:
The callbacks are also called for cold plugged devices. Drop the "hot"
to better match the actual callback names.
Reviewed-by: David Gibson
Reviewed-by: Cornelia Huck
Reviewed-by: Igor Mammedov
Signed-off-by: David Hildenbrand
---
This can save a few rex prefixes for qemu_ld_i32.
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target.inc.c | 24 +---
1 file changed, 13 insertions(+), 11 deletions(-)
diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c
index 76235e90c9..5cad31cfe5
Letting the generic code emit any bswaps allows us to avoid reserving
an extra register for CONFIG_USER_ONLY. For SOFTMMU, where we have
free call-clobbered registers anyway, leaving the bswap in the out-of-line
thunk maximizes code sharing.
Signed-off-by: Richard Henderson
---
There ought be no reason they should ever fail. If we don't know
how to set a segment base register for user-only (NetBSD, OpenBSD?),
then error out if we cannot proceed.
This is one more step toward the removal of all scratch registers
during user-only guest memory operations.
Signed-off-by:
Always true for softmmu and when movbe is available. In the softmmu
case we always have call-clobbered scratch registers available, and
having the bswap in the softmmu thunk maximizes code sharing.
For user-only and without movbe, leave this to generic code.
Signed-off-by: Richard Henderson
When moving the qemu_ld/st arguments to the right place for
a function call, we'll need to move the temps out of the way.
Signed-off-by: Richard Henderson
---
tcg/ppc/tcg-target.inc.c | 40 ++--
1 file changed, 22 insertions(+), 18 deletions(-)
diff --git
This is one more step toward the removal of all scratch registers
during user-only guest memory operations.
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target.inc.c | 23 +--
1 file changed, 13 insertions(+), 10 deletions(-)
diff --git a/tcg/i386/tcg-target.inc.c
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target.inc.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c
index 79de8d0cd2..55c5a8516c 100644
--- a/tcg/i386/tcg-target.inc.c
+++ b/tcg/i386/tcg-target.inc.c
@@ -1818,6
Based on the only current user, Sparc:
New code uses 1 constant that takes 2 insns to create, plus 8.
Old code used 2 constants that took 2 insns to create, plus 9.
The result is a new total of 10 vs an old total of 13.
Signed-off-by: Richard Henderson
---
tcg/tcg-op.c | 54
Pass in a LK parameter, allowing us to create tail calls.
Signed-off-by: Richard Henderson
---
tcg/ppc/tcg-target.inc.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/tcg/ppc/tcg-target.inc.c b/tcg/ppc/tcg-target.inc.c
index 6e656cd41e..6377e3a829 100644
Signed-off-by: Richard Henderson
---
tcg/arm/tcg-target.h | 2 +-
tcg/arm/tcg-target.inc.c | 314 ---
2 files changed, 125 insertions(+), 191 deletions(-)
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
index 94b3578c55..02981abdcc 100644
---
This is an incremental step toward moving the qemu_ld/st
code sequence out of line.
Signed-off-by: Richard Henderson
---
tcg/arm/tcg-target.inc.c | 113 +--
1 file changed, 73 insertions(+), 40 deletions(-)
diff --git a/tcg/arm/tcg-target.inc.c
When moving the qemu_ld/st thunk out of line, we no longer have LR for
use as a temporary. In the worst case we must make do with 3 temps,
when dealing with a 64-bit guest address. This in turn imples that we
cannot use LDRD anymore, as there are not enough temps.
Signed-off-by: Richard
This is an incremental step toward moving the qemu_ld/st
code sequence out of line.
Signed-off-by: Richard Henderson
---
tcg/ppc/tcg-target.inc.c | 151 ---
1 file changed, 111 insertions(+), 40 deletions(-)
diff --git a/tcg/ppc/tcg-target.inc.c
Somehow we forgot these operations, once upon a time.
This will allow immediate stores to have their bswap
optimized away.
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 12
1 file changed, 12 insertions(+)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index
Based on the only current user, Sparc:
New code uses 2 constants that take 2 insns to load from constant pool,
plus 13. Old code used 6 constants that took 1 or 2 insns to create,
plus 21. The result is a new total of 17 vs an old total of 29.
Signed-off-by: Richard Henderson
---
For now, defined universally as true, since we previously required
backends to implement swapped memory operations. Future patches
may now remove that support where it is onerous.
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.h | 1 +
tcg/arm/tcg-target.h | 1 +
We cannot use TCG_REG_LR (aka TCG_REG_TMP) for tail calls.
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.inc.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
index c0ba9a6d50..ea5fe33fca
Signed-off-by: Richard Henderson
---
tcg/ppc/tcg-target.h | 2 +-
tcg/ppc/tcg-target.inc.c | 326 +--
2 files changed, 141 insertions(+), 187 deletions(-)
diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h
index be52ad1d2e..bbc49bb1be 100644
---
This allows us to remove some code from the backend, allowing
the generic code to emit any extra bswaps.
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.h | 2 +-
tcg/aarch64/tcg-target.inc.c | 51 +++-
2 files changed, 10 insertions(+), 43
Move the entire memory operation out of line.
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target.h | 2 +-
tcg/i386/tcg-target.inc.c | 391 --
2 files changed, 162 insertions(+), 231 deletions(-)
diff --git a/tcg/i386/tcg-target.h
This is an incremental step toward moving the qemu_ld/st
code sequence out of line.
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target.inc.c | 203 +++---
1 file changed, 169 insertions(+), 34 deletions(-)
diff --git a/tcg/i386/tcg-target.inc.c
When moving the qemu_ld/st arguments to the right place for
a function call, we'll need to move the temps out of the way.
Signed-off-by: Richard Henderson
---
tcg/arm/tcg-target.inc.c | 89 +---
1 file changed, 46 insertions(+), 43 deletions(-)
diff --git
Cleaner not to treat this as #ifdef.
Signed-off-by: Richard Henderson
---
tcg/ppc/tcg-target.inc.c | 14 +-
1 file changed, 5 insertions(+), 9 deletions(-)
diff --git a/tcg/ppc/tcg-target.inc.c b/tcg/ppc/tcg-target.inc.c
index 484d90ead2..f7c33f3b7f 100644
---
This moves the assert for success from inside patch_reloc
to outside patch_reloc. This touches all tcg backends.
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.inc.c | 44 ++---
tcg/arm/tcg-target.inc.c | 26 +---
This was a typo copying from tcg_out_call, apparently.
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.inc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
index ea5fe33fca..403f5caf14 100644
---
These are function call arguments that we will need soon.
Signed-off-by: Richard Henderson
---
tcg/arm/tcg-target.inc.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c
index 414c91c9ea..4339c472e8 100644
---
These are function call arguments that we will need soon.
Signed-off-by: Richard Henderson
---
tcg/ppc/tcg-target.inc.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/tcg/ppc/tcg-target.inc.c b/tcg/ppc/tcg-target.inc.c
index 6377e3a829..484d90ead2 100644
---
When moving the qemu_ld/st arguments to the right place for
a function call, we'll need to move the temps out of the way.
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.inc.c | 74 +++-
1 file changed, 40 insertions(+), 34 deletions(-)
diff --git
We will shortly be asking the hot path not to assume TCG_REG_L1
for the host base address.
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target.inc.c | 56 ---
1 file changed, 29 insertions(+), 27 deletions(-)
diff --git a/tcg/i386/tcg-target.inc.c
These are function call arguments that we will need soon.
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.inc.c | 12
1 file changed, 12 insertions(+)
diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
index 30091f6a69..148de0b7f2 100644
---
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.h | 2 +-
tcg/aarch64/tcg-target.inc.c | 191 +--
2 files changed, 93 insertions(+), 100 deletions(-)
diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h
index 9aea1d1771..d1bd77c41d
We will shortly be forcing qemu_ld/st arguments into registers
that match the function call abi of the host, which means that
the temps must be elsewhere.
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target.inc.c | 28 +++-
1 file changed, 19 insertions(+), 9
This variant of tcg-ldst.inc.c allows the entire thunk to be
moved out-of-line, with caching across TBs within a region.
Signed-off-by: Richard Henderson
---
tcg/tcg.h | 5 +++
accel/tcg/translate-all.c | 15 +--
tcg/tcg-ldst-ool.inc.c| 95
For x86_64, this can result in smaller code when manipulating
TCG_TYPE_I32, as we can omit a REX prefix.
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target.h | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
index
These are function call arguments for x86_64 we will need soon.
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target.inc.c | 8
1 file changed, 8 insertions(+)
diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c
index 4f66a0c5ae..8aef66e430 100644
---
This includes everything queued so far -- softmmu out-of-line
patches, bswap cleanups, and (new) eliminating all scratch
registers from x86 user-only memops.
This tree is now at
https://github.com/rth7680/qemu.git tcg-next-for-4.0
for future tcg/riscv/ rebasing.
r~
Richard Henderson (37):
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
index 7488c3d869..2441658865 100644
--- a/tcg/i386/tcg-target.h
+++ b/tcg/i386/tcg-target.h
@@ -86,10 +86,10 @@ typedef
Hi Peter,
Thanks for the comments and mail.
>
> On 22 November 2018 at 10:28, Peter Maydell wrote:
> > On 22 November 2018 at 03:05, gengdongjiu wrote:
> >>> >
> >>> Shouldn't there be something in here to say "only report this error to
> >>> the guest if we are actually reporting RAS
On Wed, 7 Nov 2018 16:36:46 +0400
Marc-André Lureau wrote:
> A step towards being able to call object_apply_global_props().
it also makes code more uniform as we don't have to deal with type
inform of GList.
maybe move it at the beginning of series and include accel part as well?
otherwise
On Wed, 7 Nov 2018 16:36:45 +0400
Marc-André Lureau wrote:
> Considering that CPU features are provided via command line, the
I can guess what it is about once I recall how -cpu foo,+-feat works,
but without that knowledge I don't get meaning behind the sentence.
Could you rephrase it?
>
On 22/11/2018 17:54, Cornelia Huck wrote:
A vfio-ccw device may provide an async command subregion for
issuing halt/clear subchannel requests. If it is present, use
it for sending halt/clear request to the device; if not, fall
back to emulation (as done today).
Signed-off-by: Cornelia Huck
---
On 22/11/2018 17:54, Cornelia Huck wrote:
To be replaced with a real linux-headers update.
Signed-off-by: Cornelia Huck
---
linux-headers/linux/vfio.h | 4
linux-headers/linux/vfio_ccw.h | 12
2 files changed, 16 insertions(+)
diff --git a/linux-headers/linux/vfio.h
Discards the block duplicated in an intermediate backing file
after the block have been copied into the active layer during
QMP block-stream operation.
It saves the disk space while merging external snapshots.
Signed-off-by: Andrey Shinkevich
---
block/stream.c | 428
Dear all,
The given feature discards blocks with copy-on-read operation while the
streaming process runs. Adding the 'discard' argument to the QMP block-stream
command allows dropping a block in the backing chain after it has been copied
to the active layer. That will elude the block duplication
The discard option for block-stream command requires insertion of the
filter to write into the backing chain. In that case, the job will not
resume by device name. So, the node name is specified.
Signed-off-by: Andrey Shinkevich
---
tests/qemu-iotests/030 | 20
1 file
From: Vladimir Sementsov-Ogievskiy
After node graph changes, we may not be able to resume_drive by device
name (backing files are not recursively searched). So, lets allow to
resume by node-name. Set constant name for breakpoints, to avoid
introducing extra parameters.
Signed-off-by: Vladimir
Adding a parameter to QMP block-stream command to allow discarding
blocks in the backing chain while blocks are being copied to the
active layer.
Signed-off-by: Andrey Shinkevich
---
block/stream.c| 3 +--
blockdev.c| 8 +++-
hmp-commands.hx | 4 ++--
The classes that set tests for the block-stream command with discard
option on are inherited from the existent classes in the 030 file.
Some QMP commands do not have the optional 'discard' argument because
the WRITE permission is not being granted when the filter is inserted.
For instance, it is
On Wed, 7 Nov 2018 16:36:40 +0400
Marc-André Lureau wrote:
> Interfaces don't have instance, let's make the interface type really
> abstract to avoid confusion.
>
> Signed-off-by: Marc-André Lureau
Reviewed-by: Igor Mammedov
> ---
> include/hw/acpi/acpi_dev_interface.h | 6 +-
>
On Wed, 7 Nov 2018 16:36:44 +0400
Marc-André Lureau wrote:
> Machine & Accel props are not provided by user. Let's not mix them
> with the global properties.
>
> Call a new helper function object_apply_global_props() during
> device_post_init().
>
> Add a stub for current_machine, so
Dear Peter,
Thank you for your response.
The 'discard' option is useful when pulling a huge file. That will save
a disk
space significantly.
The 'commit' operation would be useful as well but it is harder to implement
due to concurrent writes of a guest. Which command to use, 'pull' or
From: "Edgar E. Iglesias"
Don't assert on RX descriptor settings when the receiver is
disabled. This fixes an issue with incoming packets on an
unused GEM.
Reported-by: mbilal
Signed-off-by: Edgar E. Iglesias
---
hw/net/cadence_gem.c | 1 -
1 file changed, 1 deletion(-)
diff --git
From: "Edgar E. Iglesias"
This fixes an issue with the GEM models reported by Bilal.
If a GEM's receiver is disabled, we shouldn't be asserting on
descriptor processing.
Cheers,
Edgar
Edgar E. Iglesias (1):
net: cadence_gem: Remove incorrect assert()
hw/net/cadence_gem.c | 1 -
1 file
+/*
+ * Returns whether the event notification should be forwarded.
+ */
+static bool xive_source_lsi_trigger(XiveSource *xsrc, uint32_t
srcno)
>>>
>>> What exactly "trigger" means isn't entirely obvious for an LSI. Might
>>> be clearer to have "lsi_assert" and
On 23/11/2018 13:45, Cornelia Huck wrote:
On Fri, 23 Nov 2018 13:28:25 +0100
Pierre Morel wrote:
On 22/11/2018 17:54, Cornelia Huck wrote:
Allow to extend the regions used by vfio-ccw. The first user will be
handling of halt and clear subchannel.
Signed-off-by: Cornelia Huck
---
On Fri, Nov 23, 2018 at 02:59:32PM +0500, mbilal wrote:
> Hi,
>
> Thanks for reply.
>
> According to your suggestion I've tested with 3.1 rc2 release and problem is
> still exist in this release also.
>
> Here is my reproducible scenario.
Thanks,
I've had a look and the assert looks bogus to
On 22/11/2018 17:54, Cornelia Huck wrote:
Add a region to the vfio-ccw device that can be used to submit
asynchronous I/O instructions. ssch continues to be handled by the
existing I/O region; the new region handles hsch and csch.
Interrupt status continues to be reported through the same
On Fri, 23 Nov 2018 13:28:25 +0100
Pierre Morel wrote:
> On 22/11/2018 17:54, Cornelia Huck wrote:
> > Allow to extend the regions used by vfio-ccw. The first user will be
> > handling of halt and clear subchannel.
> >
> > Signed-off-by: Cornelia Huck
> > ---
> >
On 22/11/2018 17:54, Cornelia Huck wrote:
The vfio-ccw code will need this, and it matches treatment of ssch
and csch.
Signed-off-by: Cornelia Huck
---
drivers/s390/cio/ioasm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/s390/cio/ioasm.c b/drivers/s390/cio/ioasm.c
index
On 22/11/2018 17:54, Cornelia Huck wrote:
Allow to extend the regions used by vfio-ccw. The first user will be
handling of halt and clear subchannel.
Signed-off-by: Cornelia Huck
---
drivers/s390/cio/vfio_ccw_ops.c | 182
drivers/s390/cio/vfio_ccw_private.h
* Kirti Wankhede (kwankh...@nvidia.com) wrote:
>
>
> On 11/23/2018 12:24 AM, Dr. David Alan Gilbert wrote:
> > * Kirti Wankhede (kwankh...@nvidia.com) wrote:
> >> - Defined MIGRATION region type and sub-type.
> >> - Defined VFIO device states during migration process.
> >> - Defined
On Fri, Nov 23, 2018 at 7:21 AM Gerd Hoffmann wrote:
>
> On Thu, Nov 22, 2018 at 04:13:38PM +0100, Stefano Garzarella wrote:
> > On Thu, Nov 22, 2018 at 12:51 PM Gerd Hoffmann wrote:
> > >
> > > On Thu, Nov 22, 2018 at 12:08:55PM +0100, Stefano Garzarella wrote:
> > > > Hi,
> > > > I continued
On 23/11/18 11:56, BALATON Zoltan wrote:
> On Fri, 23 Nov 2018, Philippe Mathieu-Daudé wrote:
>> On 22/11/18 22:56, BALATON Zoltan wrote:
>>> While we're there, should I also add pc-bios/canyonlands.dts which is
>>> the device tree for sam460ex?
>>
>> Yes, I suggest this set:
>>
>>
On Thu, 22 Nov 2018 00:12:17 +0100
Samuel Ortiz wrote:
> Hi Igor,
>
> On Wed, Nov 14, 2018 at 11:55:37AM +0100, Igor Mammedov wrote:
> > On Mon, 5 Nov 2018 02:40:34 +0100
> > Samuel Ortiz wrote:
> >
> > > From: Yang Zhong
> > >
> > > The AML build routines for the PCI host bridge and the
* guangrong.x...@gmail.com (guangrong.x...@gmail.com) wrote:
> From: Xiao Guangrong
>
> This modules implements the lockless and efficient threaded workqueue.
>
> Three abstracted objects are used in this module:
> - Request.
> It not only contains the data that the workqueue fetches out
>
On 11/23/18 5:35 AM, David Gibson wrote:
> On Thu, Nov 22, 2018 at 10:47:44PM +0100, Cédric Le Goater wrote:
>> On 11/22/18 5:41 AM, David Gibson wrote:
>>> On Fri, Nov 16, 2018 at 11:56:58AM +0100, Cédric Le Goater wrote:
To complete the event routing, the IVRE sub-engine uses an internal
On Wed, 21 Nov 2018 16:43:12 +0100
Samuel Ortiz wrote:
> On Tue, Nov 13, 2018 at 04:59:18PM +0100, Igor Mammedov wrote:
> > On Mon, 5 Nov 2018 02:40:33 +0100
> > Samuel Ortiz wrote:
> >
> > > This is going to be needed by the hardware reduced implementation, so
> > > let's export it.
> > >
On Fri, 23 Nov 2018, Philippe Mathieu-Daudé wrote:
On 22/11/18 22:56, BALATON Zoltan wrote:
While we're there, should I also add pc-bios/canyonlands.dts which is
the device tree for sam460ex?
Yes, I suggest this set:
pc-bios/canyonlands.dt?
pc-bios/u-boot-sam460*
roms/u-boot-sam460ex
Well,
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20181122165417.23894-1-kw...@redhat.com
Type: series
Subject: [Qemu-devel] [PULL 00/13] Block layer patches
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$(git log --oneline
Hi,
This series failed docker-quick@centos7 build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
Message-id: 1542895581-10721-1-git-send-email-w...@redhat.com
Type: series
Subject: [Qemu-devel] [PATCH v1 00/16]
On 11/23/18 2:10 AM, David Gibson wrote:
> On Thu, Nov 22, 2018 at 05:50:07PM +1100, Benjamin Herrenschmidt wrote:
>> On Thu, 2018-11-22 at 15:44 +1100, David Gibson wrote:
>>>
>>> Sorry, didn't think of this in my first reply.
>>>
>>> 1) Does the hardware ever actually write back to the EAS? I
>>> On 23.11.18 at 11:19, wrote:
> Adding Jan in case he has an opinion on my reply below.
I agree, fwiw.
Jan
> On Fri, Nov 23, 2018 at 12:04:51AM -0500, Zhao Yan wrote:
>> On Thu, Nov 22, 2018 at 03:18:05PM +0100, Roger Pau Monné wrote:
>> > On Thu, Nov 22, 2018 at 08:11:20AM -0500, Zhao Yan
* guangrong.x...@gmail.com (guangrong.x...@gmail.com) wrote:
> From: Xiao Guangrong
>
> It will be used by threaded workqueue
>
> Signed-off-by: Xiao Guangrong
Reviewed-by: Dr. David Alan Gilbert
> ---
> include/qemu/bitops.h | 13 +
> 1 file changed, 13 insertions(+)
>
> diff
Adding Jan in case he has an opinion on my reply below.
On Fri, Nov 23, 2018 at 12:04:51AM -0500, Zhao Yan wrote:
> On Thu, Nov 22, 2018 at 03:18:05PM +0100, Roger Pau Monné wrote:
> > On Thu, Nov 22, 2018 at 08:11:20AM -0500, Zhao Yan wrote:
> > > On Thu, Oct 18, 2018 at 03:56:36PM +0100, Roger
* Andrey Shinkevich (andrey.shinkev...@virtuozzo.com) wrote:
> Adding a parameter to QMP block-stream command to allow discarding
> blocks in the backing chain while blocks are being copied to the
> active layer.
>
> Signed-off-by: Andrey Shinkevich
> ---
> block/stream.c| 3 +--
>
On 23/11/18 10:01, Roman Kagan wrote:
> elf2dmp is keyed on "$posix" = "yes", but "$posix" doesn't seem to be
> set anywhere.
>
> The original intent was presumably to skip building it on Windows, so
> check for "$mingw32" = "no" instead.
>
> Signed-off-by: Roman Kagan
Reviewed-by: Philippe
Hi Bharat,
On 11/23/18 10:14 AM, Bharat Bhushan wrote:
> Hi Eric,
>
>> -Original Message-
>> From: Auger Eric
>> Sent: Friday, November 23, 2018 1:23 PM
>> To: Bharat Bhushan ;
>> eric.auger@gmail.com; qemu-devel@nongnu.org; qemu-
>> a...@nongnu.org; peter.mayd...@linaro.org;
On 22 November 2018 at 18:45, Kevin Wolf wrote:
> The following changes since commit 47c1cc30e440860aa695358f7c2dd0b9d7b53d16:
>
> Update version for v3.1.0-rc2 release (2018-11-20 18:10:26 +)
>
> are available in the Git repository at:
>
> git://repo.or.cz/qemu/kevin.git
On Thu, Nov 22, 2018 at 05:26:52PM +0100, Igor Mammedov wrote:
> On Wed, 21 Nov 2018 15:42:11 +0100
> Samuel Ortiz wrote:
>
> > Hi Igor,
> >
> > On Thu, Nov 08, 2018 at 03:16:23PM +0100, Igor Mammedov wrote:
> > > On Mon, 5 Nov 2018 02:40:28 +0100
> > > Samuel Ortiz wrote:
> > >
> > > >
On 11/23/18 5:02 PM, Peter Maydell wrote:
On 23 November 2018 at 03:10, maozy wrote:
In order to void the subclasses whose parent_realize field is
set to NULL, the k->realize function must be retained even
though it doesn't do anything practical. Just like this:
-/* TODO remove once all
Add a couple of helper functions to cope with GDB threads and processes.
The gdb_get_process() function looks for a process given a pid.
The gdb_get_cpu() function returns the CPU corresponding to the (pid,
tid) pair given as parameters.
The read_thread_id() function parses the thread-id sent
Change the thread info related packets handling to support multiprocess
extension.
Add the CPUs class name in the extra info to help differentiate
them in multiprocess mode.
Signed-off-by: Luc Michel
Reviewed-by: Philippe Mathieu-Daudé
---
gdbstub.c | 37 +++--
Create two separate CPU clusters for APUs and RPUs.
Signed-off-by: Luc Michel
Reviewed-by: Edgar E. Iglesias
---
include/hw/arm/xlnx-zynqmp.h | 3 +++
hw/arm/xlnx-zynqmp.c | 21 +
2 files changed, 20 insertions(+), 4 deletions(-)
diff --git
Add multiprocess extension support by enabling multiprocess mode when
the peer requests it, and by replying that we actually support it in the
qSupported reply packet.
Signed-off-by: Luc Michel
Reviewed-by: Philippe Mathieu-Daudé
Acked-by: Alistair Francis
Reviewed-by: Edgar E. Iglesias
---
Add the gdb_first_attached_cpu() and gdb_next_attached_cpu() to iterate
over all the CPUs in currently attached processes.
Add the gdb_first_cpu_in_process() and gdb_next_cpu_in_process() to
iterate over CPUs of a given process.
Use them to add multiprocess extension support to vCont packets.
Add support for the '!' extended mode packet. This is required for the
multiprocess extension.
Signed-off-by: Luc Michel
Reviewed-by: Edgar E. Iglesias
Acked-by: Alistair Francis
---
gdbstub.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/gdbstub.c b/gdbstub.c
index
'D' packets are used by GDB to detach from a process. In multiprocess
mode, the PID to detach from is sent in the request.
Signed-off-by: Luc Michel
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Edgar E. Iglesias
Acked-by: Alistair Francis
---
gdbstub.c | 60
Add support for the vAttach packets. In multiprocess mode, GDB sends
them to attach to additional processes.
Signed-off-by: Luc Michel
Reviewed-by: Edgar E. Iglesias
Acked-by: Alistair Francis
---
gdbstub.c | 35 +++
1 file changed, 35 insertions(+)
diff --git
When a new connection is established, we set the first process to be
attached, and the others detached. The first CPU of the first process
is selected as the current CPU.
Signed-off-by: Luc Michel
Reviewed-by: Alistair Francis
Reviewed-by: Edgar E. Iglesias
---
gdbstub.c | 20
When gdb_set_stop_cpu() is called with a CPU associated to a process
currently not attached by the GDB client, return without modifying the
stop CPU. Otherwise, GDB gets confused if it receives packets with a
thread-id it does not know about.
Signed-off-by: Luc Michel
Acked-by: Alistair Francis
changes since v6:
- patch 4Fix a refactoring issue in gdb_get_cpu [Edgar]
- patch 5Renamed gdb_first_cpu/gdb_next_cpu to
gdb_first_attached_cpu/gdb_next_attached_cpu [Edgar]
- patch 7Added the CPU name and removed the CPU index in the
ThreadInfo
Add a structure GDBProcess that represent processes from the GDB
semantic point of view.
CPUs can be split into different processes, by grouping them under
different cpu-cluster objects. Each occurrence of a cpu-cluster object
implies the existence of the corresponding process in the GDB stub.
This commit adds the cpu-cluster type. It aims at gathering CPUs from
the same cluster in a machine.
For now it only has a `cluster-id` property.
Signed-off-by: Luc Michel
Reviewed-by: Alistair Francis
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Edgar
Change the Xfer:features:read: packet handling to support the
multiprocess extension. This packet is used to request the XML
description of the CPU. In multiprocess mode, different descriptions can
be sent for different processes.
This function now takes the process to send the description for as
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