Hello!
> From: Dr. David Alan Gilbert (git) [mailto:dgilb...@redhat.com]
> The reset notifiers kept a 'last' counter to notice jumps;
> now that we've remove the notifier we don't need to keep 'last'.
> replay used to save/restore 'last' (presumably to avoid triggering
> the notifier); make it
On 23/07/2019 13:53, David Gibson wrote:
On Sat, Jul 20, 2019 at 11:28:49AM +1000, Alexey Kardashevskiy wrote:
Since day 1 QEMU implemented RTAS as a custom hypercall wrapped into
a small 20 bytes blob which guest would call to enter RTAS. Although
it works fine, it is still a separate
On 23/07/2019 13:52, David Gibson wrote:
On Sat, Jul 20, 2019 at 11:28:48AM +1000, Alexey Kardashevskiy wrote:
The pseries kernel can do either usual prom-init boot or kexec style boot.
We always did the prom-init which relies on the completeness of
the device tree (for example, PCI BARs
On 23/07/2019 13:49, David Gibson wrote:
On Sat, Jul 20, 2019 at 11:28:47AM +1000, Alexey Kardashevskiy wrote:
Useful for the debugging purposes.
Am I correct in understanding this isn't actually necessary for the
rest of the series to work, just useful for debugging?
Correct. When I
Am 22.07.2019 um 22:06 schrieb Philippe Mathieu-Daudé:
> On 7/17/19 8:23 PM, Stefan Weil wrote:
>> Am 17.07.2019 um 15:43 schrieb Alex Bennée:
>>> From: Philippe Mathieu-Daudé
>>>
>>> Various firmwares has been added in the pc-bios/ directory:
>>>
>>> - CCW (since commit 0c1fecdd523)
>>> -
Hi Palmer,
On Sat, Jul 20, 2019 at 9:47 AM Palmer Dabbelt wrote:
>
> On Fri, 14 Jun 2019 08:15:51 PDT (-0700), bmeng...@gmail.com wrote:
> > This adds a reset opcode for sifive_test device to trigger a system
> > reset for testing purpose.
> >
> > Signed-off-by: Bin Meng
> > ---
> >
> >
On Mon, Jul 22, 2019 at 07:02:51AM +, Liu, Yi L wrote:
> > From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org] On Behalf
> > Of David Gibson
> > Sent: Wednesday, July 17, 2019 11:07 AM
> > To: Liu, Yi L
> > Subject: Re: [RFC v1 05/18] vfio/pci: add pasid alloc/free
On Sat, Jul 20, 2019 at 11:28:48AM +1000, Alexey Kardashevskiy wrote:
> The pseries kernel can do either usual prom-init boot or kexec style boot.
> We always did the prom-init which relies on the completeness of
> the device tree (for example, PCI BARs have to be assigned beforehand) and
> the
On Sat, Jul 20, 2019 at 11:28:47AM +1000, Alexey Kardashevskiy wrote:
> Useful for the debugging purposes.
Am I correct in understanding this isn't actually necessary for the
rest of the series to work, just useful for debugging?
>
> Signed-off-by: Alexey Kardashevskiy
> ---
>
On Mon, Jul 22, 2019 at 03:41:08PM +0200, David Hildenbrand wrote:
> We still have multiple issues in the current code
> - The PBP is not freed during unrealize()
> - The PBP is not reset on device resets: After a reset, the PBP is stale.
> - We are not indicating VIRTIO_BALLOON_F_MUST_TELL_HOST,
On Mon, Jul 22, 2019 at 03:41:07PM +0200, David Hildenbrand wrote:
> Using the address of a RAMBlock to test for a matching pbp is not really
> safe. Instead, let's use the guest physical address of the base page
> along with the page size (via the number of subpages).
>
> Also, let's allocate
On Sat, Jul 20, 2019 at 11:28:49AM +1000, Alexey Kardashevskiy wrote:
> Since day 1 QEMU implemented RTAS as a custom hypercall wrapped into
> a small 20 bytes blob which guest would call to enter RTAS. Although
> it works fine, it is still a separate binary image which requires signing
> at no
On Mon, Jul 22, 2019 at 01:20:08PM +0200, Paolo Bonzini wrote:
> On 22/07/19 10:39, David Gibson wrote:
> > On Mon, Jul 22, 2019 at 03:32:12PM +1000, Nicholas Piggin wrote:
> >> Hi, this series is rebased on top of the qmp event fix, and takes
> >> Paolo's suggestion to implement ->wakeup for i386
On Mon, Jul 22, 2019 at 03:41:03PM +0200, David Hildenbrand wrote:
> If we directly cast from int to uint64_t, we will first sign-extend to
> an int64_t, which is wrong. We actually want to treat the PFNs like
> unsigned values.
>
> As far as I can see, this dates back to the initial
On Mon, Jul 22, 2019 at 08:23:47PM +0200, Cédric Le Goater wrote:
> Make the current "powernv" machine an abstract type and derive from it
> new machines with specific CPU models: power8, power8e, power8nvl,
> power9.
>
> The "powernv" machine is now an alias on the "powernv9" machine.
>
>
On 2019/7/20 上午2:52, Oleinik, Alexander wrote:
Virtual devices should not try to send zero-sized packets. The caller
should check the size prior to calling qemu_sendv_packet_async.
Signed-off-by: Alexander Oleinik
---
net/net.c | 3 +++
1 file changed, 3 insertions(+)
diff --git
On 2019/7/23 上午2:38, Zhang, Chen wrote:
-Original Message-
From: Peter Maydell [mailto:peter.mayd...@linaro.org]
Sent: Tuesday, July 23, 2019 1:25 AM
To: Zhang, Chen
Cc: Li Zhijian ; Jason Wang ;
qemu-dev ; Zhang Chen
Subject: Re: [PATCH V5] net/colo-compare.c: Fix memory leak and
The log line I've got is the following:
➜ vms ~/dev/qemu/x86_64-softmmu/qemu-system-x86_64 -accel hvf -m 2G -cdrom
~/Downloads/ubuntu-18.04.2-desktop-amd64.iso -hda ubuntu.qc
ow2
qemu-system-x86_64: warning: host doesn't support requested feature:
CPUID.8001H:ECX.svm [bit 2]
For the triage of the issue we need the following VMCS fields:
* instruction error
* exit reason
* exit qualification
On my machine (with macOS 10.14.5) each time QEMU exits with HV_ERROR, AppleHV
spills the following error into system log:
2019-07-06 10:38:56.148547+0300 0x1e3ee4 Default
On Fri, 2019-07-19 at 06:40 -0700, Guenter Roeck wrote:
> Add support for loading initrd with "-initrd "
> to the sifive_u machine. This lets us boot into Linux without
> disk drive.
>
> Signed-off-by: Guenter Roeck
Reviewed-by: Alistair Francis
Alistair
> ---
> hw/riscv/sifive_u.c | 20
On Tue, Jul 23, 2019 at 03:07:13AM +0800, Alex Williamson wrote:
> On Sun, 21 Jul 2019 23:20:28 -0400
> Yan Zhao wrote:
>
> > On Fri, Jul 19, 2019 at 03:00:13AM +0800, Kirti Wankhede wrote:
> > >
> > >
> > > On 7/12/2019 8:22 AM, Yan Zhao wrote:
> > > > On Tue, Jul 09, 2019 at 05:49:17PM
From: Zhengui li
commit a6f230c move blockbackend back to main AioContext on unplug. It set the
AioContext of
SCSIDevice to the main AioContex, but s->ctx is still the iothread
AioContex（if the scsi controller
is configure with iothread）. So if there are having in-flight requests during
After reading change logs, I believe USB support for raspi2/raspi3 is
not added yet. Which means host internet network can't be accessed by
emulated machine.
I would be glad to help in documentation of differences between real
Raspberry Pi devices and QEMU emulated raspi2/raspi3 since I have seen
On Mon, Jul 22, 2019 at 12:09 PM Palmer Dabbelt wrote:
>
> On Mon, 22 Jul 2019 11:22:43 PDT (-0700), alistai...@gmail.com wrote:
> > On Sat, Jul 20, 2019 at 2:30 AM Philippe Mathieu-Daudé
> > wrote:
> >>
> >> On 7/19/19 8:05 PM, Alistair Francis wrote:
> >> > Fix a typo in the warning message
Fix a typo in the warning message displayed to users, don't print the
message when running inside qtest and don't mention a specific QEMU
version for the deprecation.
Signed-off-by: Alistair Francis
Reviewed-by: Philippe Mathieu-Daudé
---
hw/riscv/boot.c | 12
1 file changed, 8
On 7/17/19 8:23 PM, Stefan Weil wrote:
> Am 17.07.2019 um 15:43 schrieb Alex Bennée:
>> From: Philippe Mathieu-Daudé
>>
>> Various firmwares has been added in the pc-bios/ directory:
>>
>> - CCW (since commit 0c1fecdd523)
>> - Skiboot (since commit bcad45de6a0)
>> - EDK2(since commit
On 7/17/19 3:43 PM, Alex Bennée wrote:
> Commit 97fd1ea8c1 broke the build for --without-default-devices as
> VMMOUSE depends on VMPORT.
>
> Fixes: 97fd1ea8c1
> Signed-off-by: Alex Bennée
> ---
> hw/i386/Kconfig | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git
Hi Alex,
On 7/17/19 3:43 PM, Alex Bennée wrote:
> We have some flaky tests and usually the test passes on a retry.
> Enable travis_retry for the test phase and see if that helps keep
> things green.
>
> Signed-off-by: Alex Bennée
> ---
> .travis.yml | 2 +-
> 1 file changed, 1 insertion(+), 1
On 7/17/19 3:43 PM, Alex Bennée wrote:
> From: Thomas Huth
>
> People often forget to run the iotests before submitting patches or pull
> requests - this is likely due to the fact that we do not run the tests
> during our mandatory "make check" tests yet. Now that we've got a proper
> "auto"
On Thu, Jul 18, 2019 at 03:34:05PM +0800, Tao Xu wrote:
> Denverton is the Atom Processor of Intel Harrisonville platform.
>
> For more information:
> https://ark.intel.com/content/www/us/en/ark/products/\
> codename/63508/denverton.html
>
> Signed-off-by: Tao Xu
Queued for 4.2, thanks.
--
On Mon, 22 Jul 2019 11:22:43 PDT (-0700), alistai...@gmail.com wrote:
On Sat, Jul 20, 2019 at 2:30 AM Philippe Mathieu-Daudé
wrote:
On 7/19/19 8:05 PM, Alistair Francis wrote:
> Fix a typo in the warning message displayed to users, don't print the
> message when running inside qtest and don't
On Sun, 21 Jul 2019 23:20:28 -0400
Yan Zhao wrote:
> On Fri, Jul 19, 2019 at 03:00:13AM +0800, Kirti Wankhede wrote:
> >
> >
> > On 7/12/2019 8:22 AM, Yan Zhao wrote:
> > > On Tue, Jul 09, 2019 at 05:49:17PM +0800, Kirti Wankhede wrote:
> > >> Flow during _RESUMING device state:
> > >> -
On 7/22/19 9:28 AM, tony.ngu...@bt.com wrote:
> Do you prefer the v1 implementation of making TCGMemOp -> MemOp?
Yes, I did prefer moving the entire enum.
The use of MO_8 etc instead of MO_UB often emphasized that we were dealing only
with a size without a sign.
r~
> -Original Message-
> From: Peter Maydell [mailto:peter.mayd...@linaro.org]
> Sent: Tuesday, July 23, 2019 1:25 AM
> To: Zhang, Chen
> Cc: Li Zhijian ; Jason Wang ;
> qemu-dev ; Zhang Chen
> Subject: Re: [PATCH V5] net/colo-compare.c: Fix memory leak and code style
> issue.
>
> On
Alex Bennée writes:
> Hi,
>
> This is my current queue for testing/next which I shall submit a PR
> for on Tuesday in time for rc2. This update adds:
Ping, any more comments or reviews before I tag up a PR?
--
Alex Bennée
On Mon, Jul 22, 2019 at 2:29 AM KONRAD Frederic
wrote:
>
> Hi Philippe,
>
> Le 7/20/19 à 11:50 AM, Philippe Mathieu-Daudé a écrit :
> > Cc'ing Stefan
> >
> > On 7/20/19 11:44 AM, Philippe Mathieu-Daudé wrote:
> >> Hi Frederic,
> >>
> >> On 7/20/19 8:18 AM, KONRAD Frederic wrote:
> >>> There are
On Sat, Jul 20, 2019 at 2:30 AM Philippe Mathieu-Daudé
wrote:
>
> On 7/19/19 8:05 PM, Alistair Francis wrote:
> > Fix a typo in the warning message displayed to users, don't print the
> > message when running inside qtest and don't mention a specific QEMU
> > version for the deprecation.
> >
> >
On 22/07/2019 10:32, David Gibson wrote:
> On Thu, Jul 18, 2019 at 03:03:09PM +0200, Cédric Le Goater wrote:
>> On 18/07/2019 08:16, David Gibson wrote:
>>> On Thu, Jul 18, 2019 at 03:12:17PM +0930, Joel Stanley wrote:
Currently we fail to boot a qemu powernv machine with a Power9
Make the current "powernv" machine an abstract type and derive from it
new machines with specific CPU models: power8, power8e, power8nvl,
power9.
The "powernv" machine is now an alias on the "powernv9" machine.
Signed-off-by: Cédric Le Goater
---
hw/ppc/pnv.c | 97
On Mon, 22 Jul 2019 at 17:17, Paolo Bonzini wrote:
>
> From: Zhengui li
>
> commit a6f230c move blockbackend back to main AioContext on unplug. It set
> the AioContext of
> SCSIDevice to the main AioContex, but s->ctx is still the iothread
> AioContex（if the scsi controller
> is configure
On Mon, 22 Jul 2019 at 17:17, Paolo Bonzini wrote:
>
> The following changes since commit 23da9e297b4120ca9702cabec91599a44255fe96:
>
> Merge remote-tracking branch
> 'remotes/pmaydell/tags/pull-target-arm-20190722' into staging (2019-07-22
> 15:16:48 +0100)
>
>
* Yury Kotov (yury-ko...@yandex-team.ru) wrote:
> Signed-off-by: Yury Kotov
This looks OK to me, but have you tried it on a really really overloaded
host?
I worry that you might skip some of the percentage steps or not hit the
bandwidth on the small overloaded VMs we get in CI.
Dave
> ---
>
bdrv_set_aio_context_ignore() can only work in the main loop:
bdrv_drained_begin() only works in the main loop and the node's (old)
AioContext; and bdrv_drained_end() really only works in the main loop
and the node's (new) AioContext (contrary to its current comment, which
is just wrong).
The following changes since commit 23da9e297b4120ca9702cabec91599a44255fe96:
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20190722'
into staging (2019-07-22 15:16:48 +0100)
are available in the Git repository at:
https://github.com/XanClic/qemu.git tags/pull-block
Decrementing drained_end_counter after bdrv_dec_in_flight() (which in
turn invokes bdrv_wakeup() and thus aio_wait_kick()) is not very clever.
We should decrement it beforehand, so that any waiting aio_poll() that
is woken by bdrv_dec_in_flight() sees the decremented
drained_end_counter.
Because
From: Maxim Levitsky
Currently the driver hardcodes the sector size to 512,
and doesn't check the underlying device. Fix that.
Also fail if underlying nvme device is formatted with metadata
as this needs special support.
Signed-off-by: Maxim Levitsky
Message-id:
From: Maxim Levitsky
Completion entries are meant to be only read by the host and written by the
device.
The driver is supposed to scan the completions from the last point where it
left,
and until it sees a completion with non flipped phase bit.
Signed-off-by: Maxim Levitsky
Reviewed-by: Max
From: Maxim Levitsky
Fix the math involving non standard doorbell stride
Signed-off-by: Maxim Levitsky
Reviewed-by: Max Reitz
Message-id: 20190716163020.13383-2-mlevi...@redhat.com
Signed-off-by: Max Reitz
---
block/nvme.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On Mon, 22 Jul 2019 at 18:23, Zhang Chen wrote:
>
> From: Zhang Chen
>
> This patch to fix the origin "char *data" memory leak, code style issue
> and add necessary check here.
> Reported-by: Coverity (CID 1402785)
>
> Signed-off-by: Zhang Chen
> ---
> net/colo-compare.c | 27
From: Zhang Chen
This patch to fix the origin "char *data" memory leak, code style issue
and add necessary check here.
Reported-by: Coverity (CID 1402785)
Signed-off-by: Zhang Chen
---
net/colo-compare.c | 27 ---
1 file changed, 20 insertions(+), 7 deletions(-)
diff
On 7/22/19 8:17 AM, Fabian Grünbichler wrote:
> On Tue, Jul 09, 2019 at 07:25:32PM -0400, John Snow wrote:
>> This series adds a new "BITMAP" sync mode that is meant to replace the
>> existing "INCREMENTAL" sync mode.
>>
>> This mode can have its behavior modified by issuing any of three bitmap
On 22.07.19 15:30, Max Reitz wrote:
> Hi,
>
> I noted that test-bdrv-drain sometimgs hangs (very rarely, though), and
> tried to write a test that triggers the issue. I failed to do so (there
> is a good reason for that, see patch 1), but on my way I noticed that
> calling
> -Original Message-
> From: Peter Maydell [mailto:peter.mayd...@linaro.org]
> Sent: Monday, July 22, 2019 9:19 PM
> To: Zhang, Chen
> Cc: Li Zhijian ; Jason Wang ;
> qemu-dev ; Zhang Chen
> Subject: Re: [PATCH V4] net/colo-compare.c: Fix memory leak and code style
> issue.
>
> On
On 7/22/19 6:16 PM, Paolo Bonzini wrote:
> The following changes since commit 23da9e297b4120ca9702cabec91599a44255fe96:
>
> Merge remote-tracking branch
> 'remotes/pmaydell/tags/pull-target-arm-20190722' into staging (2019-07-22
> 15:16:48 +0100)
>
> are available
On Mon, 22 Jul 2019 at 17:51, Laszlo Ersek wrote:
>
> On 07/19/19 18:19, Philippe Mathieu-Daudé wrote:
> > Hi Laszlo,
> >
> > On 7/18/19 9:35 PM, Philippe Mathieu-Daudé wrote:
> >> On 7/18/19 8:38 PM, Laszlo Ersek wrote:
> >>> Regression-tested-by: Laszlo Ersek
> >
> > Patchwork doesn't
Hi Paolo,
On 7/22/19 6:16 PM, Paolo Bonzini wrote:
> From: Zhengui li
>
> commit a6f230c move blockbackend back to main AioContext on unplug. It set
> the AioContext of
> SCSIDevice to the main AioContex, but s->ctx is still the iothread
> AioContex（if the scsi controller
> is configure
To avoid incoherent states when the machine resets (see bug report
below), add the device reset callback.
A "system reset" sets the device state machine in READ_ARRAY mode
and, after some delay, set the SR.7 READY bit.
Since we do not model timings, we set the SR.7 bit directly.
Fixes:
GCC9 is confused by this comment when building with CFLAG
-Wimplicit-fallthrough=2:
hw/block/pflash_cfi02.c: In function ‘pflash_write’:
hw/block/pflash_cfi02.c:574:16: error: this statement may fall through
[-Werror=implicit-fallthrough=]
574 | if (boff == 0x55 && cmd ==
The following changes since commit 9d2e1fcd14c2bae5be1992214a03c0ddff714c80:
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
(2019-07-22 13:20:49 +0100)
are available in the Git repository at:
https://gitlab.com/philmd/qemu.git tags/pflash-next-20190722
On 7/18/19 12:48 PM, Philippe Mathieu-Daudé wrote:
> To avoid incoherent states when the machine resets (see but report
> below), add the device reset callback.
>
> A "system reset" sets the device state machine in READ_ARRAY mode
> and, after some delay, set the SR.7 READY bit.
>
> Since we do
On 7/22/19 6:51 PM, Laszlo Ersek wrote:
> On 07/19/19 18:19, Philippe Mathieu-Daudé wrote:
>> Hi Laszlo,
>>
>> On 7/18/19 9:35 PM, Philippe Mathieu-Daudé wrote:
>>> On 7/18/19 8:38 PM, Laszlo Ersek wrote:
On 07/18/19 17:03, Laszlo Ersek wrote:
> On 07/18/19 12:48, Philippe Mathieu-Daudé
Hi Peter,
On Mon, Jul 22, 2019 at 04:18:02PM +0100, Peter Maydell wrote:
> In commit e6b2b20d9735d4ef we made the boot loader code try to avoid
> putting the initrd on top of the kernel. However the expression used
> to calculate the start of the initrd:
>
> info->initrd_start =
On 07/19/19 18:19, Philippe Mathieu-Daudé wrote:
> Hi Laszlo,
>
> On 7/18/19 9:35 PM, Philippe Mathieu-Daudé wrote:
>> On 7/18/19 8:38 PM, Laszlo Ersek wrote:
>>> On 07/18/19 17:03, Laszlo Ersek wrote:
On 07/18/19 12:48, Philippe Mathieu-Daudé wrote:
> To avoid incoherent states when the
On 22/07/19 17:07, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> Timers have a mechanism for detecting host clock jumps; this relied
> on noticing if the time had gone backwards or if it had gone forward
> more than 60s since we last read it. This had assumed that we
On 7/22/19 8:59 AM, Richard Henderson wrote:
>On 7/22/19 8:34 AM, tony.ngu...@bt.com wrote:
>> Tony Nguyen (20):
>> tcg: Replace MO_8 with MO_UB alias
>> tcg: Replace MO_16 with MO_UW alias
>> tcg: Replace MO_32 with MO_UL alias
>> tcg: Replace MO_64 with MO_UQ alias
>> tcg: Move
From: Aleksandar Markovic
Fix emulation of MSA pack instructions on big endian hosts.
Signed-off-by: Aleksandar Markovic
Reviewed-by: Aleksandar Rikalo
---
target/mips/msa_helper.c | 74
1 file changed, 74 insertions(+)
diff --git
From: Aleksandar Markovic
This was found by GCC 8.3 static analysis.
Missed in commit fb32f8c8560.
Signed-off-by: Aleksandar Markovic
Reviewed-by: Aleksandar Rikalo
Reviewed-by: Philippe Mathieu-Daudé
---
target/mips/translate.c | 2 ++
1 file changed, 2 insertions(+)
diff --git
From: Aleksandar Markovic
This includes fixes for a problems in switch statements found by GCC
8.3 improved code analysis features, and one big endian host fix.
v5->v6:
- corrected the title to say 'rc2', not 'rc1'
- amended commit message for patch #1 per Philippe's
comments
- added
On 22/07/19 17:59, Richard Henderson wrote:
> On 7/22/19 8:34 AM, tony.ngu...@bt.com wrote:
>> Tony Nguyen (20):
>> tcg: Replace MO_8 with MO_UB alias
>> tcg: Replace MO_16 with MO_UW alias
>> tcg: Replace MO_32 with MO_UL alias
>> tcg: Replace MO_64 with MO_UQ alias
>> tcg: Move
From: Zhengui li
commit a6f230c move blockbackend back to main AioContext on unplug. It set the
AioContext of
SCSIDevice to the main AioContex, but s->ctx is still the iothread
AioContex（if the scsi controller
is configure with iothread）. So if there are having in-flight requests during
The following changes since commit 23da9e297b4120ca9702cabec91599a44255fe96:
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20190722'
into staging (2019-07-22 15:16:48 +0100)
are available in the Git repository at:
git://github.com/bonzini/qemu.git tags/for-upstream
From: Jan Kiszka
Writing the nested state e.g. after a vmport access can invalidate
important parts of the kernel-internal state, and it is not needed as
well. So leave this out from KVM_PUT_RUNTIME_STATE.
Suggested-by: Paolo Bonzini
Signed-off-by: Jan Kiszka
Message-Id:
Signed-off-by: Paolo
On Thu, 7 Mar 2019 at 17:05, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> @@ -1182,16 +1194,19 @@ static void arm_cpu_realizefn(DeviceState *dev, Error
> **errp)
> init_cpreg_list(cpu);
>
> #ifndef CONFIG_USER_ONLY
> +cs->num_ases = 1;
> if (cpu->has_el3
On 7/22/19 8:34 AM, tony.ngu...@bt.com wrote:
> Tony Nguyen (20):
> tcg: Replace MO_8 with MO_UB alias
> tcg: Replace MO_16 with MO_UW alias
> tcg: Replace MO_32 with MO_UL alias
> tcg: Replace MO_64 with MO_UQ alias
> tcg: Move size+sign+endian from TCGMemOp to MemOp
I don't like any
This bit configures endianness of PCI MMIO devices. It is used by
Solaris and OpenBSD sunhme drivers.
Tested working on OpenBSD.
Unfortunately Solaris 10 had a unrelated keyboard issue blocking
testing... another inch towards Solaris 10 on SPARC64 =)
Signed-off-by: Tony Nguyen
---
Append MemTxAttrs to interfaces so we can pass along up coming Invert
Endian TTE bit on SPARC64.
Signed-off-by: Tony Nguyen
---
target/sparc/mmu_helper.c | 32 ++--
1 file changed, 18 insertions(+), 14 deletions(-)
diff --git a/target/sparc/mmu_helper.c
Notice new attribute, byte swap, and force the transaction through the
memory slow path.
Required by architectures that can invert endianness of memory
transaction, e.g. SPARC64 has the Invert Endian TTE bit.
Signed-off-by: Tony Nguyen
---
accel/tcg/cputlb.c | 11 +++
The fast path is taken when TLB_FLAGS_MASK is all zero.
TLB_FORCE_SLOW is simply a TLB_FLAGS_MASK bit to force the slow path,
there are no other side effects.
Signed-off-by: Tony Nguyen
---
include/exec/cpu-all.h | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git
Now that MemOp has been pushed down into the memory API, we can
collapse the two byte swaps adjust_endianness and handle_bswap into
the former.
Collapsing byte swaps along the I/O path enables additional endian
inversion logic, e.g. SPARC64 Invert Endian TTE bit, with redundant
byte swaps
Signed-off-by: Tony Nguyen
---
accel/tcg/cputlb.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 184fc54..97d7a64 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -906,8 +906,8 @@ static uint64_t
To convert interfaces of MemoryRegion access, MEMOP_SIZE and
SIZE_MEMOP no-op stubs were introduced to change syntax while keeping
the existing semantics.
Now with interfaces converted, we fill the stubs and use MemOp
semantics.
Signed-off-by: Tony Nguyen
---
include/exec/memop.h | 5 ++---
1
Signed-off-by: Tony Nguyen
---
exec.c| 6 --
memory_ldst.inc.c | 18 +-
2 files changed, 13 insertions(+), 11 deletions(-)
diff --git a/exec.c b/exec.c
index 3e78de3..5013864 100644
--- a/exec.c
+++ b/exec.c
@@ -3334,7 +3334,8 @@ static MemTxResult
Signed-off-by: Tony Nguyen
---
hw/vfio/pci-quirks.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/hw/vfio/pci-quirks.c b/hw/vfio/pci-quirks.c
index b35a640..3240afa 100644
--- a/hw/vfio/pci-quirks.c
+++ b/hw/vfio/pci-quirks.c
@@ -1071,7 +1071,7 @@ static void
On 7/22/19 8:28 AM, Alex Bennée wrote:
>> -static void vmsa_ttbr_write(CPUARMState *env, const ARMCPRegInfo *ri,
>> -uint64_t value)
>> +static void vmsa_ttbr_el1_write(CPUARMState *env, const ARMCPRegInfo *ri,
>> +uint64_t value)
>
>
Signed-off-by: Tony Nguyen
---
target/mips/op_helper.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c
index 9e2e02f..dccb8df 100644
--- a/target/mips/op_helper.c
+++ b/target/mips/op_helper.c
@@ -24,6 +24,7 @@
#include
On 17/07/19 08:06, Paolo Bonzini wrote:
> My main concern is that MO_BE/MO_LE/MO_TE do not really apply to the
> memory.c paths. MO_BSWAP is never passed into the MemOp, even if target
> endianness != host endianness.
>
> Therefore, you could return MO_TE | MO_{8,16,32,64} from this function,
>
Signed-off-by: Tony Nguyen
---
hw/intc/armv7m_nvic.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
index 9f8f0d3..25bb88a 100644
--- a/hw/intc/armv7m_nvic.c
+++ b/hw/intc/armv7m_nvic.c
@@ -18,6 +18,7 @@
#include
Signed-off-by: Tony Nguyen
---
hw/s390x/s390-pci-inst.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/hw/s390x/s390-pci-inst.c b/hw/s390x/s390-pci-inst.c
index 0023514..c126bcc 100644
--- a/hw/s390x/s390-pci-inst.c
+++ b/hw/s390x/s390-pci-inst.c
@@ -15,6 +15,7 @@
Replacing size with size+sign+endianness (MemOp) will enable us to
collapse the two byte swaps, adjust_endianness and handle_bswap, along
the I/O path.
While interfaces are converted, callers will have existing unsigned
size coerced into a MemOp, and the callee will use this MemOp as an
unsigned
Correct naming as there is now both MemOp and TCGMemOp.
Signed-off-by: Tony Nguyen
---
accel/tcg/cputlb.c | 6 +++---
tcg/aarch64/tcg-target.inc.c | 8
tcg/arm/tcg-target.inc.c | 8
tcg/i386/tcg-target.inc.c| 8
tcg/mips/tcg-target.inc.c| 10
Preparation for modifying the memory API to take size+sign+endianness
instead of just size.
Accelerator independent MemOp enum is extended by TCGMemOp enum.
Signed-off-by: Tony Nguyen
---
MAINTAINERS | 1 +
include/exec/memop.h | 27 +++
tcg/tcg.h|
Preparation for splitting MO_64 out from TCGMemOp into new accelerator
independent MemOp.
As MO_64 will be a value of MemOp, existing TCGMemOp comparisons and
coercions will trigger -Wenum-compare and -Wenum-conversion.
Signed-off-by: Tony Nguyen
---
target/arm/sve_helper.c | 2
Preparation for splitting MO_32 out from TCGMemOp into new accelerator
independent MemOp.
As MO_32 will be a value of MemOp, existing TCGMemOp comparisons and
coercions will trigger -Wenum-compare and -Wenum-conversion.
Signed-off-by: Tony Nguyen
---
target/arm/sve_helper.c | 6
Preparation for splitting MO_16 out from TCGMemOp into new accelerator
independent MemOp.
As MO_16 will be a value of MemOp, existing TCGMemOp comparisons and
coercions will trigger -Wenum-compare and -Wenum-conversion.
Signed-off-by: Tony Nguyen
---
target/arm/sve_helper.c | 4
Preparation for splitting MO_16 out from TCGMemOp into new accelerator
independent MemOp.
As MO_16 will be a value of MemOp, existing TCGMemOp comparisons and
coercions will trigger -Wenum-compare and -Wenum-conversion.
Signed-off-by: Tony Nguyen
---
target/arm/sve_helper.c | 4
Preparation for splitting MO_8 out from TCGMemOp into new accelerator
independent MemOp.
As MO_8 will be a value of MemOp, existing TCGMemOp comparisons and
coercions will trigger -Wenum-compare and -Wenum-conversion.
Signed-off-by: Tony Nguyen
---
target/arm/sve_helper.c | 4 +-
This patchset implements the IE (Invert Endian) bit in SPARCv9 MMU TTE.
It is an attempt of the instructions outlined by Richard Henderson to Mark
Cave-Ayland.
Tested with OpenBSD on sun4u. Solaris 10 is my actual goal, but unfortunately a
separate keyboard issue remains in the way.
On 01/11/17
Richard Henderson writes:
> In addition to providing the core with the current ASID, this minimizes
> both the number of flushes due to non-changing ASID as well as the set
> of mmu_idx that are affected by each flush.
>
> In particular, updates to the secure mode registers flushes only the
>
In commit e6b2b20d9735d4ef we made the boot loader code try to avoid
putting the initrd on top of the kernel. However the expression used
to calculate the start of the initrd:
info->initrd_start = info->loader_start +
MAX(MIN(info->ram_size / 2, 128 * 1024 * 1024), kernel_size);
Rename the elf_low_addr and elf_high_addr variables to image_low_addr
and image_high_addr -- in the next commit we will extend them to
be set for other kinds of image file and not just ELF files.
Signed-off-by: Peter Maydell
---
hw/arm/boot.c | 20 +++-
1 file changed, 11
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