On 10/1/19 11:31 PM, Laurent Vivier wrote:
Le 11/09/2019 à 05:31, Mao Zhongyi a écrit :
‘data’ has the possibility of memory leaks， so use the
glic macros g_autofree recommended by CODING_STYLE.rst
to automatically release the memory that returned from
g_malloc().
Cc: arm...@redhat.com
Cc:
On Thu, Oct 03, 2019 at 08:31:11AM +1000, David Gibson wrote:
> On Wed, Oct 02, 2019 at 12:20:35PM +0200, Greg Kurz wrote:
> > On Wed, 2 Oct 2019 12:52:08 +1000
> > David Gibson wrote:
> >
> > > The only thing remaining in this structure are the flags to allow either
> > > XICS or XIVE to be
On Wed, Sep 18, 2019 at 06:06:39PM +0200, Cédric Le Goater wrote:
> When PC_TCTXT_CHIPID_OVERRIDE is configured, the PC_TCTXT_CHIPID field
> overrides the hardwired chip ID in the Powerbus operations and for CAM
> compares. This is typically used in the one block-per-chip configuration
> to
On Wed, Sep 18, 2019 at 06:06:38PM +0200, Cédric Le Goater wrote:
> We try to loop on the full table skipping empty indirect pages which
> are not necessarily allocated. This is useful to dump the contexts of
> the KVM vCPUs.
I think this patch can be merged into the previous one. They're both
On Wed, Sep 18, 2019 at 06:06:36PM +0200, Cédric Le Goater wrote:
> pnv_xive_vst_size() tries to compute the size of a VSD table from the
> information given by FW. The number of entries of the table are
> deduced from the result and the MMIO regions of the ESBs and the ENDS
> are also resized
On Wed, Sep 18, 2019 at 06:06:44PM +0200, Cédric Le Goater wrote:
> The trigger definition is used for triggers both for HW source
> interrupts, PHB, PSI, as well as for rerouting interrupts between
> Interrupt Controller.
>
> HW source controllers set bit0 of word0 to ‘0’ as they provide EAS
>
On Wed, Sep 18, 2019 at 06:06:42PM +0200, Cédric Le Goater wrote:
> The OS CAM line has a special encoding exploited by the HW. Provide a
> helper routine to hide the details to the TIMA command handlers. This
> also clarifies the endian ness of different variables : 'qw1w2' is
> big-endian and
On Wed, Sep 18, 2019 at 06:06:31PM +0200, Cédric Le Goater wrote:
> This also removes the need of the get_tctx() XiveRouter handler in the
> core XIVE framework.
In general these commit messages could really do with more context.
What exactly is the "controller model"? Where were the TIMA
On Wed, Sep 18, 2019 at 06:06:34PM +0200, Cédric Le Goater wrote:
> The NVT space is 19 bits wide, giving a maximum of 512K per chip. When
> dispatched on a HW thread, the NVT identifier of a vCPU is pushed/stored
> in the CAM line (word2) of the thread interrupt context.
Ok, that's interesting,
On Wed, Sep 18, 2019 at 06:06:33PM +0200, Cédric Le Goater wrote:
> We will use it to resend missed interrupts when a vCPU context is
> pushed a HW thread.
>
> Signed-off-by: Cédric Le Goater
> ---
> include/hw/ppc/xive.h | 1 +
> hw/intc/xive.c| 15 +++
> 2 files changed,
On Wed, Sep 18, 2019 at 06:06:23PM +0200, Cédric Le Goater wrote:
> As there is now easy way to loop on the CPUs belonging to a chip, add
> a helper to filter out external CPUs.
This seems a somewhat odd way to go about it, given that the chip does
have a cores array and the cores then have a
On Wed, Sep 18, 2019 at 06:06:27PM +0200, Cédric Le Goater wrote:
> The CAM line matching sequence in the pseries machine does not change
> much apart from the use of the new QOM interfaces. There is an extra
> indirection because of the sPAPR IRQ backend of the machine. Only the
> XIVE backend
On Wed, Sep 18, 2019 at 06:06:26PM +0200, Cédric Le Goater wrote:
> The CAM line matching on the PowerNV machine now scans all chips of
> the system and all CPUs of a chip to find a dispatched NVT in the
> thread contexts.
>
> Signed-off-by: Cédric Le Goater
> ---
> hw/ppc/pnv.c | 32
On Wed, Sep 18, 2019 at 06:06:24PM +0200, Cédric Le Goater wrote:
> and use this helper to exclude CPUs which were not enabled by the XIVE
> controller.
>
> Signed-off-by: Cédric Le Goater
Reviewed-by: David Gibson
> ---
> hw/intc/pnv_xive.c | 12
> 1 file changed, 12
On Wed, Sep 18, 2019 at 06:06:25PM +0200, Cédric Le Goater wrote:
> The XiveFabric QOM interface should be implemented by the machine. It
> acts as the PowerBUS interface between the interrupt controller and
> the system. On HW, the XIVE sub-engine is responsible for the
> communication with the
On Wed, Oct 02, 2019 at 11:29:08AM +0200, Greg Kurz wrote:
> On Wed, 2 Oct 2019 12:52:04 +1000
> David Gibson wrote:
>
> > It turns out that all the logic in the SpaprIrq::reset hooks (and some in
> > the SpaprIrq::post_load hooks) isn't really related to resetting the irq
> > backend (that's
On Wed, Oct 2, 2019 at 10:51 PM Jonathan Behrens wrote:
>
> This patch enables a debugger to read and write the current privilege level
> via
> a special "priv" register. When compiled with CONFIG_USER_ONLY the register is
> still visible but is hardwired to zero.
>
> Signed-off-by: Jonathan
Public bug reported:
I'm seeing massive corruption of qcow2 images with qemu 4.1.0 and git
master as of 7f21573c822805a8e6be379d9bcf3ad9effef3dc after a few
savevm/quit/loadvm cycles. I've narrowed it down to the following
reproducer (further notes below):
# qemu-img check debian.qcow2
No errors
On Thu, Oct 3, 2019 at 5:38 AM Alistair Francis
wrote:
>
> Coverity (CID 1405786) thinks that there is a possible memory leak as
> we don't guarentee that the memory allocatd from riscv_find_firmware()
> is freed. This is a false positive, but let's tidy up the code to fix
> the warning.
>
>
On 10/2/19 7:00 AM, Max Reitz wrote:
> On 02.10.19 01:20, John Snow wrote:
>>
>>
>> On 10/1/19 3:46 PM, Max Reitz wrote:
>>> Python tests should use these two new functions instead of
>>> qemu_img('create', ...) + os.remove(), so that user-supplied image
>>> options are interpreted and handled
The current code uses getcchar() and setcchar() to handle the cchar_t
values, which is correct, however it incorrectly deconstructs the chtype
value that it then passes to setcchar():
1. The bit mask 0xff against the chtype is not guaranteed to be
correct. curses provides the
On 10/1/19 2:44 PM, Max Reitz wrote:
> On 28.09.19 01:35, John Snow wrote:
>>
>>
>> On 9/23/19 9:09 AM, Max Reitz wrote:
>>> On 18.09.19 01:45, John Snow wrote:
verify_platform will check an explicit whitelist and blacklist instead.
The default will now be assumed to be allowed to run
On Fri, 23 Aug 2019 16:38:44 PDT (-0700), Alistair Francis wrote:
Respect the contents of MSTATUS.MPRV and HSTATUS.SPRV when performing
floating point operations when V=0.
I'm confused as to what this has to do with floating point.
Signed-off-by: Alistair Francis
---
On 10/2/19 11:50 AM, Max Reitz wrote:
> On 02.10.19 17:10, Thomas Huth wrote:
>> On 02/10/2019 17.03, Daniel P. Berrangé wrote:
>>> On Wed, Oct 02, 2019 at 04:21:46PM +0200, Thomas Huth wrote:
Running the iotests during "make check" is causing more headaches than
benefits for the
This parameter has been deprecated since 2.12.0 and is eligible for
removal. Remove this parameter as it is actually completely ignored;
let's not give false hope.
Signed-off-by: John Snow
Reviewed-by: Eric Blake
Reviewed-by: Vladimir Sementsov-Ogievskiy
---
V2: Change 2.12.0 -> 4.2.0 in
This parameter has been deprecated since 2.12.0 and is eligible for
removal. Remove this parameter as it is actually completely ignored;
let's not give false hope.
Signed-off-by: John Snow
Reviewed-by: Eric Blake
Reviewed-by: Vladimir Sementsov-Ogievskiy
---
V2: Change 2.12.0 -> 4.2.0 in
On 10/2/19 7:22 PM, John Snow wrote:
> This parameter has been deprecated since 2.12.0 and is eligible for
> removal. Remove this parameter as it is actually completely ignored;
> let's not give false hope.
>
> Signed-off-by: John Snow
> Reviewed-by: Eric Blake
> Reviewed-by: Vladimir
On 10/2/19 2:34 PM, Alistair Francis wrote:
> Coverity (CID 1405786) thinks that there is a possible memory leak as
> we don't guarentee that the memory allocatd from riscv_find_firmware()
> is freed. This is a false positive, but let's tidy up the code to fix
> the warning.
>
> Signed-off-by:
On Wed, Oct 02, 2019 at 04:47:56PM +0200, Cédric Le Goater wrote:
> On 02/10/2019 16:21, Greg Kurz wrote:
> > On Wed, 2 Oct 2019 11:02:45 +1000
> > David Gibson wrote:
> >
> >> On Tue, Oct 01, 2019 at 06:56:28PM +0200, Greg Kurz wrote:
> >>> On Tue, 1 Oct 2019 13:56:10 +0200
> >>> Cédric Le
On Wed, Oct 02, 2019 at 12:20:35PM +0200, Greg Kurz wrote:
> On Wed, 2 Oct 2019 12:52:08 +1000
> David Gibson wrote:
>
> > The only thing remaining in this structure are the flags to allow either
> > XICS or XIVE to be present. These actually make more sense as spapr
> > capabilities - that
On Wed, Oct 02, 2019 at 09:31:08AM +0200, Cédric Le Goater wrote:
> On 02/10/2019 08:40, David Gibson wrote:
> > On Wed, Oct 02, 2019 at 08:13:55AM +0200, Cédric Le Goater wrote:
> @@ -527,6 +471,30 @@ static int spapr_irq_check(SpaprMachineState
> *spapr, Error **errp)
> /*
>
On Wed, Oct 02, 2019 at 09:59:25AM +0200, Greg Kurz wrote:
> On Wed, 2 Oct 2019 12:51:57 +1000
> David Gibson wrote:
>
> > These methods, like cpu_intc_create, really belong to the interrupt
> > controller, but need to be called on all possible intcs.
> >
> > Like cpu_intc_create, therefore,
On Tue, Sep 24, 2019 at 3:18 AM Peter Maydell wrote:
>
> On Wed, 18 Sep 2019 at 16:35, Palmer Dabbelt wrote:
> >
> > From: Bin Meng
> >
> > At present when "-bios image" is supplied, we just use the straight
> > path without searching for the configured data directories. Like
> > "-bios
Coverity (CID 1405786) thinks that there is a possible memory leak as
we don't guarentee that the memory allocatd from riscv_find_firmware()
is freed. This is a false positive, but let's tidy up the code to fix
the warning.
Signed-off-by: Alistair Francis
---
hw/riscv/boot.c | 11 ---
1
On 10/2/19 6:46 AM, Peter Krempa wrote:
[ * poof * ]
>
> I'd like to re-iterate that the necessity to keep node names same on
> both sides of migration is unexpected, undocumented and in some cases
> impossible.
>
> If you want to mandate that they must be kept the same please document
> it
Thanks for testing. I think that some of those problems might be issues
of the Intel HAXM driver, so I suggest to report them at
https://github.com/intel/haxm/issues.
As stated on https://qemu.weilnetz.de/FAQ, I consider HAXM support as
experimental and suggest to try WHPX which is also
On 10/2/19 2:40 PM, Richard Henderson wrote:
> On 10/2/19 10:38 AM, Alex Bennée wrote:
>> Is the denbcdq instruction exposed in any standard float operations?
>> Once this is fixed it would be worth adding a testcase (either ppc64
>> specific or multiarch) so protect it from regression in the
On 10/2/19 10:38 AM, Alex Bennée wrote:
> Is the denbcdq instruction exposed in any standard float operations?
> Once this is fixed it would be worth adding a testcase (either ppc64
> specific or multiarch) so protect it from regression in the future.
Not standard float operations -- this is
On 10/2/19 9:47 AM, Richard Henderson wrote:
> There is still the special case of EXECUTE of MVCL, which I suspect must have
> some failure mode that we're not considering -- the setting and clearing of
> ex_value can't help. I have a suspicion that we need to special case that
> within
** Description changed:
In most scenarios when turning on HAX, QEMU will exit, printing "VCPU
shutdown request" to the console.
This is on Windows 8.1 with Intel HAXM 7.5.2.
QEMU's -version prints v4.1.0-11789-g013a2ecf4f-dirty .
I've used an installer from qemu.weilnetz.de.
The
Public bug reported:
In most scenarios when turning on HAX, QEMU will exit, printing "VCPU
shutdown request" to the console.
This is on Windows 8.1 with Intel HAXM 7.5.2.
QEMU's -version prints v4.1.0-11789-g013a2ecf4f-dirty .
I've used an installer from qemu.weilnetz.de.
The host CPU is an
Max Reitz writes:
> On 02.10.19 17:35, Vladimir Sementsov-Ogievskiy wrote:
>> Hi,
>>
>> 02.10.2019 18:07, no-re...@patchew.org wrote:
>>> Patchew URL:
>>> https://patchew.org/QEMU/1570026166-748566-1-git-send-email-andrey.shinkev...@virtuozzo.com/
>>>
>>>
>>>
>>> Hi,
>>>
>>> This series failed
Stefan Hajnoczi writes:
> On Fri, Aug 30, 2019 at 09:19:02AM -0300, vandersonmr wrote:
>> This commit adds support to Linux Perf in order
>> to be able to analyze qemu jitted code and
>> also to able to see the TBs PC in it.
>>
>> When using "-perf" qemu creates a jitdump file in
>> the
On 01.10.19 15:14, Vladimir Sementsov-Ogievskiy wrote:
> Split block_copy_set_callbacks out of block_copy_state_new. It's needed
> for further commit: block-copy will use BdrvChildren of backup-top
> filter, so it will be created from backup-top filter creation function.
> But callbacks will still
On 01.10.19 15:14, Vladimir Sementsov-Ogievskiy wrote:
> This is logic-less refactoring, which simplifies further patch, as
> we'll need write_flags for backup-top filter creation and backup-top
> should be created before block job creation.
>
> Signed-off-by: Vladimir Sementsov-Ogievskiy
> ---
Patchew URL:
https://patchew.org/QEMU/1570035113-56848-1-git-send-email-pbonz...@redhat.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 1570035113-56848-1-git-send-email-pbonz...@redhat.com
Subject: [PULL 00/30]
On 02.10.19 18:47, Richard Henderson wrote:
> On 10/2/19 2:58 AM, Alex Bennée wrote:
>>
>> David Hildenbrand writes:
>>
>>> MVCL is interruptible and we should check for interrupts and process
>>> them after writing back the variables to the registers. Let's check
>>> for any exit requests and
On 10/2/19 12:40 PM, Max Reitz wrote:
Linux 5.3 has made 0.0.0.0/8 a working IPv4 subnet. As such, "42" is
now a valid host, and the connection to it will (hopefully) time out
over a long period rather than quickly return with EINVAL.
So let us use a negative integer for testing that NBD will
On 01.10.19 15:14, Vladimir Sementsov-Ogievskiy wrote:
> Move synchronization mechanism to block-copy, to be able to use one
> block-copy instance from backup job and backup-top filter in parallel.
>
> Signed-off-by: Vladimir Sementsov-Ogievskiy
> ---
> include/block/block-copy.h | 8 ++
>
So, this turned out to be much more complicated than I initially expected.
The current linux-user signal-handling implementation makes the assumption
that there is a 1:1 correspondence between host signals, and target (guest)
signals in a whole bunch of places. Breaking this assumption breaks a
On 10/2/19 1:52 AM, no-re...@patchew.org wrote:
> Patchew URL: https://patchew.org/QEMU/20191001235552.17790-1-js...@redhat.com/
>
>
>
> Hi,
>
> This series seems to have some coding style problems. See output below for
> more information:
>
> Type: series
> Message-id:
On 02/10/2019 18.44, Kevin Wolf wrote:
> Not sure where in this thread to reply, but since my name is mentioned
> in this mail, it might at least be not the worst one.
>
> Am 02.10.2019 um 13:57 hat Max Reitz geschrieben:
>> On 02.10.19 06:46, Thomas Huth wrote:
>>> On 01/10/2019 20.44, Max Reitz
On 02.10.19 18:44, Kevin Wolf wrote:
> Not sure where in this thread to reply, but since my name is mentioned
> in this mail, it might at least be not the worst one.
>
> Am 02.10.2019 um 13:57 hat Max Reitz geschrieben:
>> On 02.10.19 06:46, Thomas Huth wrote:
>>> On 01/10/2019 20.44, Max Reitz
On 02/10/2019 19.32, Alex Bennée wrote:
>
> Daniel P. Berrangé writes:
>
>> On Wed, Oct 02, 2019 at 04:21:46PM +0200, Thomas Huth wrote:
>>> Running the iotests during "make check" is causing more headaches than
>>> benefits for the block layer maintainers, so let's disable the iotests
>>>
Linux 5.3 has made 0.0.0.0/8 a working IPv4 subnet. As such, "42" is
now a valid host, and the connection to it will (hopefully) time out
over a long period rather than quickly return with EINVAL.
So let us use a negative integer for testing that NBD will not crash
when it receives integer
Mark Cave-Ayland writes:
> On 28/09/2019 18:45, Aleksandar Markovic wrote:
>
> Hi Aleksandar,
>
> Thanks for taking a look at this!
>
>> Mark and Paul (and Stefan),
>>
>> Thanks for spotting this and pinpointing the culprit commit. I guess Stefan
>> is going
>> to respond soon, but, in the
Daniel P. Berrangé writes:
> On Wed, Oct 02, 2019 at 04:21:46PM +0200, Thomas Huth wrote:
>> Running the iotests during "make check" is causing more headaches than
>> benefits for the block layer maintainers, so let's disable the iotests
>> during "make check" again.
>>
>> Signed-off-by:
Patchew URL: https://patchew.org/QEMU/20191002161851.1016-1-kw...@redhat.com/
Hi,
This series failed the docker-quick@centos7 build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
From: Marc-André Lureau
Commit 05e514b1d4d5bd4209e2c8bbc76ff05c85a235f3 introduced an AIO
context optimization to avoid calling event_notifier_test_and_clear() on
ctx->notifier. On Windows, the same notifier is being used to wakeup the
wait on socket events (see commit
-fsanitize=undefined is not the same thing as --enable-sanitizers. After
commit 47c823e ("tests/docker: add sanitizers back to clang build", 2019-09-11)
test-clang is almost duplicating the asan (test-debug) test, so
partly revert commit 47c823e5b while leaving ubsan enabled.
Signed-off-by:
From: Marc-André Lureau
Serial test is currently hard-coded to /dev/null.
On Windows, serial chardev expect a COM: device, which may not be
availble.
Signed-off-by: Marc-André Lureau
Signed-off-by: Paolo Bonzini
---
tests/test-char.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
From: Eric Auger
Currently, when a notifier is attempted to be registered and its
flags are not supported (especially the MAP one) by the IOMMU MR,
we generally abruptly exit in the IOMMU code. The failure could be
handled more nicely in the caller and especially in the VFIO code.
So let's
Bottom halves and ptimers are malloced, but nothing in these
files is freeing memory allocated by instance_init. Since
these are sysctl devices that are never unrealized, just moving
the allocations to realize is enough to avoid the leak in
practice (and also to avoid upsetting asan when running
From: Dmitry Poletaev
There is a problem, that you don't have access to the data using
cpu_memory_rw_debug() function when in SMM. You can't remotely debug SMM mode
program because of that for example.
Likely attrs version of get_phys_page_debug should be used to get correct asidx
at the end
The array returned by qemu_allocate_irqs is malloced, free it.
Signed-off-by: Paolo Bonzini
Reviewed-by: Thomas Huth
---
hw/m68k/mcf5208.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/m68k/mcf5208.c b/hw/m68k/mcf5208.c
index 012710d..60c5802 100644
--- a/hw/m68k/mcf5208.c
+++
Use a stack-allocated struct to avoid a memory leak.
Signed-off-by: Paolo Bonzini
---
disas/cris.c | 59 +--
1 file changed, 29 insertions(+), 30 deletions(-)
diff --git a/disas/cris.c b/disas/cris.c
index 2f43c9b..0b0a3fb 100644
---
From: Eric Auger
The container error integer field is currently used to store
the first error potentially encountered during any
vfio_listener_region_add() call. However this fails to propagate
detailed error messages up to the vfio_connect_container caller.
Instead of using an integer, let's
The array returned by qemu_allocate_irqs is malloced, free it.
Signed-off-by: Paolo Bonzini
Reviewed-by: Thomas Huth
---
hw/ide/cmd646.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/ide/cmd646.c b/hw/ide/cmd646.c
index f3ccd11..19984d2 100644
--- a/hw/ide/cmd646.c
+++
From: Alex Bennée
Some of the cross compilers rightly complain there are cases where ret
may not be set. 0 seems to be the reasonable default unless particular
slot explicitly returns -1.
Signed-off-by: Alex Bennée
Signed-off-by: Paolo Bonzini
---
accel/kvm/kvm-all.c | 6 +++---
1 file
The device tree blob returned by load_device_tree is malloced.
Free it before returning.
Signed-off-by: Paolo Bonzini
Reviewed-by: Philippe Mathieu-Daudé
---
hw/microblaze/boot.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/microblaze/boot.c b/hw/microblaze/boot.c
index
From: Sebastian Andrzej Siewior
The CPUID bits CLZERO and XSAVEERPTR are availble on AMD's ZEN platform
and could be passed to the guest.
Signed-off-by: Sebastian Andrzej Siewior
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 2 +-
target/i386/cpu.h | 2 ++
2 files changed, 3
From: Thomas Huth
When running "make distclean" we currently leave a lot of generated
files in the build directory. Fix that.
Signed-off-by: Thomas Huth
Reviewed-by: John Snow
Signed-off-by: Paolo Bonzini
---
Makefile | 6 +++---
tests/Makefile.include | 12 +++-
2
From: Marc-André Lureau
In general, WSAEWOULDBLOCK can be mapped to EAGAIN as done by
socket_error() (or EWOULDBLOCK). But for connect() with non-blocking
sockets, it actually means the operation is in progress:
https://docs.microsoft.com/en-us/windows/win32/api/winsock2/nf-winsock2-connect
From: Pavel Dovgalyuk
Commit 9458a9a1df1a4c719e24512394d548c1fc7abd22 added synchronization
of vCPU and migration operations through calling run_on_cpu operation.
However, in replay mode this synchronization is unneeded, because
I/O and vCPU threads are already synchronized.
This patch disables
From: Maxim Levitsky
The 'r' variable was accidently shadowed, and because of this
we were always passing 0 to mpath_generic_sense, instead of original
return value, which triggers an abort()
This is an attempt to fix the
https://bugzilla.redhat.com/show_bug.cgi?id=1720047
although there might
They are not a big deal, but they upset asan.
Signed-off-by: Paolo Bonzini
Reviewed-by: Thomas Huth
---
hw/mips/mips_int.c | 1 +
hw/mips/mips_jazz.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/hw/mips/mips_int.c b/hw/mips/mips_int.c
index 5ebc961..863ed45 100644
---
There are just too many leaks in device-introspect-test (especially for
the plethora of arm and aarch64 boards) to make LeakSanitizer useful;
disable it for now.
Whoever is interested in debugging leaks can also use valgrind like this:
QTEST_QEMU_BINARY=aarch64-softmmu/qemu-system-aarch64 \
From: Thomas Huth
When I run QEMU with KVM under Valgrind, I currently get this warning:
Syscall param ioctl(generic) points to uninitialised byte(s)
at 0x95BA45B: ioctl (in /usr/lib64/libc-2.28.so)
by 0x429DC3: kvm_ioctl (kvm-all.c:2365)
by 0x51B249:
From: Thomas Huth
Currently, isa-superio.c is always compiled as soon as CONFIG_ISA_BUS
is enabled. But there are also machines that have an ISA BUS without
any of the superio chips attached to it, so we should not compile
isa-superio.c in case we only compile a QEMU for such a machine.
Thus add
memory_region_init_* takes care of copying the name into memory it owns.
Free it in the caller.
Signed-off-by: Paolo Bonzini
Reviewed-by: Philippe Mathieu-Daudé
---
hw/hppa/dino.c| 1 +
hw/hppa/machine.c | 4 +++-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/hw/hppa/dino.c
VMX requires 64-bit feature words for the IA32_VMX_EPT_VPID_CAP
and IA32_VMX_BASIC MSRs. (The VMX control MSRs are 64-bit wide but
actually have only 32 bits of information).
Signed-off-by: Paolo Bonzini
---
include/sysemu/kvm.h | 2 +-
target/i386/cpu.c| 71
These will be used to compile the list of VMX features for named
CPU models, and/or by the code that sets up the VMX MSRs.
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.h | 130 ++
1 file changed, 130 insertions(+)
diff --git
The low bits are 1 if the control must be one, the high bits
are 1 if the control can be one. Correct the variable names
as they are very confusing.
Signed-off-by: Paolo Bonzini
---
scripts/kvm/vmxcap | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git
Add code to convert the VMX feature words back into MSR values,
allowing the user to enable/disable VMX features as they wish. The same
infrastructure enables support for limiting VMX features in named
CPU models.
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 225
From: Yury Kotov
Signed-off-by: Yury Kotov
Reviewed-by: Dr. David Alan Gilbert
Message-Id: <20190909131335.16848-4-yury-ko...@yandex-team.ru>
[Reorganize check_migration_status for rebase. - Paolo]
Signed-off-by: Paolo Bonzini
---
tests/migration-test.c | 157
Sometimes a CPU feature does not make sense unless another is
present. In the case of VMX features, KVM does not even allow
setting the VMX controls to some invalid combinations.
Therefore, this patch adds a generic mechanism that looks for bits
that the user explicitly cleared, and uses them to
Some secondary controls are automatically enabled/disabled based on the CPUID
values that are set for the guest. However, they are still available at a
global level and therefore should be present when KVM_GET_MSRS is sent to
/dev/kvm.
Unfortunately KVM forgot to include those, so fix that.
The following changes since commit 7f21573c822805a8e6be379d9bcf3ad9effef3dc:
Merge remote-tracking branch
'remotes/huth-gitlab/tags/pull-request-2019-10-01' into staging (2019-10-01
13:13:38 +0100)
are available in the git repository at:
git://github.com/bonzini/qemu.git
The next patch will add a different reason for filtering features, unrelated
to host feature support. Extract a new function that takes care of disabling
the features and optionally reporting them.
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 87
On 10/2/19 2:58 AM, Alex Bennée wrote:
>
> David Hildenbrand writes:
>
>> MVCL is interruptible and we should check for interrupts and process
>> them after writing back the variables to the registers. Let's check
>> for any exit requests and exit to the main loop.
>>
>> When booting Fedora 30,
Not sure where in this thread to reply, but since my name is mentioned
in this mail, it might at least be not the worst one.
Am 02.10.2019 um 13:57 hat Max Reitz geschrieben:
> On 02.10.19 06:46, Thomas Huth wrote:
> > On 01/10/2019 20.44, Max Reitz wrote:
> > [...]
> >> As I have said, the
On 02/10/19 16:58, Torvald Riegel wrote:
> This example looks like Dekker synchronization (if I get the intent right).
It is the same pattern. However, one of the two synchronized variables
is a counter rather than just a flag.
> Two possible implementations of this are either (1) with all
Running iotests is not required to build QEMU, so we can have stricter
version requirements for Python here and can make use of new features
and drop compatibility code earlier.
This makes qemu-iotests skip all Python tests if a Python version before
3.6 is used for the build.
Suggested-by:
Nodes involved in internal snapshots were those that were returned by
bdrv_next(), inserted and not read-only. bdrv_next() in turn returns all
nodes that are either the root node of a BlockBackend or monitor-owned
nodes.
With the typical -drive use, this worked well enough. However, in the
Some scripts check the Python version number and have two code paths to
accomodate both Python 2 and 3. Remove the code specific to Python 2 and
assert the minimum version of 3.6 instead (check skips Python tests in
this case, so the assertion would only ever trigger if a Python script
is executed
The following changes since commit 7f21573c822805a8e6be379d9bcf3ad9effef3dc:
Merge remote-tracking branch
'remotes/huth-gitlab/tags/pull-request-2019-10-01' into staging (2019-10-01
13:13:38 +0100)
are available in the Git repository at:
git://repo.or.cz/qemu/kevin.git tags/for-upstream
Signed-off-by: Kevin Wolf
Reviewed-by: Peter Krempa
Tested-by: Peter Krempa
---
tests/qemu-iotests/267 | 168
tests/qemu-iotests/267.out | 182 +++
tests/qemu-iotests/common.filter | 11 +-
tests/qemu-iotests/group
On 02/10/19 18:13, Christian Borntraeger wrote:
> Does
>
> diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
> index aabe097c410f..e2605da22e7e 100644
> --- a/accel/kvm/kvm-all.c
> +++ b/accel/kvm/kvm-all.c
> @@ -712,7 +712,7 @@ static int kvm_physical_log_clear(KVMMemoryListener *kml,
>
Eric Blake writes:
> On 10/2/19 10:16 AM, Markus Armbruster wrote:
>> Eric Blake writes:
>>
>>> On 10/1/19 2:15 PM, Markus Armbruster wrote:
The QAPI code generator clocks in at some 3100 SLOC in 8 source files.
Almost 60% of the code is in qapi/common.py. Split it into more
On 02.10.19 18:01, Kevin Wolf wrote:
> Am 30.09.2019 um 15:19 hat Christian Borntraeger geschrieben:
>> From: Paolo Bonzini
>>
>> Currently MemoryRegionSection has 1:1 mapping to KVMSlot.
>> However next patch will allow splitting MemoryRegionSection into
>> several KVMSlot-s, make sure that
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