I discovered that the following directory is not installed when the
"Desktop icons" component is unchecked during installation:
qemu\share\icons
Such directory contains two subdirectories: "Adwaita" and "hicolor".
When they're present, the bug does not occur.
--
You received this bug
On 10/4/19 9:07 AM, Eric Blake wrote:
> On 10/4/19 4:24 AM, Vladimir Sementsov-Ogievskiy wrote:
>
>>> The way I see it, we know an auto-generated node name will never be
>>> correct, but an explicitly specified one represents an explicit user
>>> configuration.
>>>
>>> It's wrong to use
On 10/4/19 4:33 AM, Peter Krempa wrote:
> On Thu, Oct 03, 2019 at 19:34:56 -0400, John Snow wrote:
>> On 10/3/19 6:14 AM, Vladimir Sementsov-Ogievskiy wrote:
>>> 03.10.2019 0:35, John Snow wrote:
On 10/2/19 6:46 AM, Peter Krempa wrote:
>>>
>
> [...]
>
> (I'm sorry if I ignored
On Fri, Oct 04, 2019 at 01:52:41PM -0500, Paul Clarke wrote:
> On 10/4/19 8:43 AM, Stefan Brankovic wrote:
> > In previous implementation, invocation of TCG shift function could request
> > shift of TCG variable by 64 bits when variable 'sh' is 0, which is not
> > supported in TCG (values can be
On Fri, Oct 04, 2019 at 08:51:19AM +0200, Greg Kurz wrote:
> On Fri, 4 Oct 2019 14:07:25 +1000
> David Gibson wrote:
>
> > On Thu, Oct 03, 2019 at 02:01:13PM +0200, Greg Kurz wrote:
> > > The sPAPR XIVE object has an nr_ends field which happens to be a
> > > multiple of
On Fri, Oct 04, 2019 at 10:37:47AM +0200, Greg Kurz wrote:
> Some device types of the XICS model are exposed to the QEMU command
> line:
>
> $ ppc64-softmmu/qemu-system-ppc64 -device help | grep ic[sp]
> name "icp"
> name "ics"
> name "ics-spapr"
> name "pnv-icp", desc "PowerNV ICP"
>
> These
On Fri, Oct 04, 2019 at 09:38:50AM +0200, Greg Kurz wrote:
65;5603;1c> Some device types of the XIVE model are exposed to the QEMU command
> line:
>
> $ ppc64-softmmu/qemu-system-ppc64 -device help | grep xive
> name "xive-end-source", desc "XIVE END Source"
> name "xive-source", desc "XIVE
There are two places to call function postcopy_ram_incoming_cleanup()
postcopy_ram_listen_thread on migration success
loadvm_postcopy_handle_listen one setup failure
On success, the vm will never accept another migration. On failure,
PostcopyState is transited from LISTENING to END and
After previous cleanup, postcopy thread is running only when
PostcopyState is LISTENNING or RUNNING. This means it is not necessary
to spare a variable have_listen_thread to represent the state.
Replace the check on have_listen_thread with PostcopyState and remove
the variable.
Signed-off-by:
If mis->have_listen_thread is true, this means current PostcopyState
must be LISTENING or RUNNING. While the check at the beginning of the
function makes sure the state transaction happens when its previous
PostcopyState is ADVISE or DISCARD.
This means we would never touch this check.
have_listen_thread is used to be a indication of whether postcopy thread is
running. Since we use PostcopyState to record state and the postcopy thread
only runs when postcopy_is_running(), we can leverage the PostcopyState to
replace the meaning of have_listen_thread.
To do so, two preparation
This patch set contains several cleanup and refine for migration.
simplify some calculation
reuse the result
fix typo in comment
provide error message when failed
Wei Yang (4):
migration/ram: only possible bit set in invalid_flags is
RAM_SAVE_FLAG_COMPRESS_PAGE
On Fri, Oct 04, 2019 at 11:37:42AM +0200, Sergio Lopez wrote:
> Microvm is a machine type inspired by Firecracker and constructed
> after the its machine model.
>
> It's a minimalist machine type without PCI nor ACPI support, designed
> for short-lived guests. Microvm also establishes a baseline
This provides helpful information on which entry failed.
Signed-off-by: Wei Yang
---
migration/savevm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/migration/savevm.c b/migration/savevm.c
index 9f0122583d..feb757de79 100644
--- a/migration/savevm.c
+++ b/migration/savevm.c
@@ -1215,6
Signed-off-by: Michael S. Tsirkin
---
tests/bios-tables-test-allowed-diff.h | 16
tests/data/acpi/virt/APIC.memhp | Bin 0 -> 168 bytes
tests/data/acpi/virt/APIC.numamem | Bin 0 -> 168 bytes
tests/data/acpi/virt/DSDT | Bin 18476 -> 18470 bytes
Not necessary to do the check again.
Signed-off-by: Wei Yang
---
migration/migration.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/migration/migration.c b/migration/migration.c
index c8eaa85867..56031305e3 100644
--- a/migration/migration.c
+++ b/migration/migration.c
An empty expected file is a handy way to seed the files
without creating merge conflicts.
Signed-off-by: Michael S. Tsirkin
---
tests/bios-tables-test.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/tests/bios-tables-test.c b/tests/bios-tables-test.c
index
Looks like no one understands how to do it.
Document the process.
Signed-off-by: Michael S. Tsirkin
---
tests/bios-tables-test.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/tests/bios-tables-test.c b/tests/bios-tables-test.c
index 652a78773f..0b33fb265f
From: Shameer Kolothum
This is in preparation to add numamem and memhp tests to
arm/virt platform. The bios-tables-test-allowed-diff.h
is updated with a list of expected ACPI tables that needs to be
present in tests/data/acpi/virt folder.
Signed-off-by: Shameer Kolothum
Message-Id:
Signed-off-by: Wei Yang
---
migration/postcopy-ram.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/migration/postcopy-ram.c b/migration/postcopy-ram.c
index d2bdd21ae3..a394c7c3a6 100644
--- a/migration/postcopy-ram.c
+++ b/migration/postcopy-ram.c
@@ -768,9 +768,11
From: Shameer Kolothum
This adds numamem and memhp tests for arm/virt platform.
Signed-off-by: Shameer Kolothum
Reviewed-by: Igor Mammedov
Message-Id: <20190918130633.4872-12-shameerali.kolothum.th...@huawei.com>
Acked-by: Peter Maydell
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael
Needed to make tests pass. Will replace with actual files.
Signed-off-by: Michael S. Tsirkin
---
tests/data/acpi/virt/APIC.memhp | 0
tests/data/acpi/virt/APIC.numamem | 0
tests/data/acpi/virt/DSDT.memhp | 0
tests/data/acpi/virt/DSDT.numamem | 0
tests/data/acpi/virt/FACP.memhp | 0
From: Shameer Kolothum
For machines 4.2 or higher with ACPI boot use GED for system_powerdown
event instead of GPIO. Guest boot with DT still uses GPIO.
Signed-off-by: Shameer Kolothum
Reviewed-by: Eric Auger
Reviewed-by: Igor Mammedov
Message-Id:
The only possible bit set in invalid_flags is
RAM_SAVE_FLAG_COMPRESS_PAGE at the beginning of function
ram_load_precopy(), which means it is not necessary to do
another check for RAM_SAVE_FLAG_COMPRESS_PAGE bit.
Signed-off-by: Wei Yang
---
migration/ram.c | 5 +
1 file changed, 1
From: Shameer Kolothum
Documents basic concepts of ACPI Generic Event device(GED)
and interface between QEMU and the ACPI BIOS.
Signed-off-by: Shameer Kolothum
Reviewed-by: Eric Auger
Message-Id: <20190918130633.4872-10-shameerali.kolothum.th...@huawei.com>
Acked-by: Peter Maydell
From: Shameer Kolothum
Generate Memory Affinity Structures for PC-DIMM ranges.
Also, Linux and Windows need ACPI SRAT table to make memory hotplug
work properly, however currently QEMU doesn't create SRAT table if
numa options aren't present on CLI. Hence add support(>=4.2) to
create numa node
From: Eric Auger
This patch adds the memory hot-plug/hot-unplug infrastructure
in machvirt. The device memory is not yet exposed to the Guest
either through DT or ACPI and hence both cold/hot plug of memory
is explicitly disabled for now.
Signed-off-by: Eric Auger
Signed-off-by: Kwangwoo Lee
From: Shameer Kolothum
This is in preparation of using GED device for
system_powerdown event. Make the powerdown notifier
registration independent of create_gpio() fn.
Signed-off-by: Shameer Kolothum
Reviewed-by: Eric Auger
Reviewed-by: Igor Mammedov
Message-Id:
From: Shameer Kolothum
This initializes the GED device with base memory and irq, configures
ged memory hotplug event and builds the corresponding aml code. With
this, both hot and cold plug of device memory is enabled now for Guest
with ACPI boot. Memory cold plug support with Guest DT boot is
From: Samuel Ortiz
The ACPI Generic Event Device (GED) is a hardware-reduced specific
device[ACPI v6.1 Section 5.6.9] that handles all platform events,
including the hotplug ones. This patch generates the AML code that
defines GEDs.
Platforms need to specify their own GED Event bitmap to
A couple of tweaks to the bios table test weren't
reviewed yet but as they are really helpful to
the arm tests I'm pushing, and affecting only the
test so fairly benign (dropped assert + a comment),
I cut a corner and pushed them straight away.
Will be easy to tweak with a patch on top or revert.
From: Shameer Kolothum
This is in preparation for adding support for ARM64 platforms
where it doesn't use port mapped IO for ACPI IO space. We are
making changes so that MMIO region can be accommodated
and board can pass the base address into the aml build function.
Also move few MEMORY_*
From: Samuel Ortiz
With Hardware-reduced ACPI, the GED device will manage ACPI
hotplug entirely. As a consequence, make the memory specific
events AML generation optional. The code will only be added
when the method name is not NULL.
Signed-off-by: Samuel Ortiz
Signed-off-by: Shameer Kolothum
On Mon, Sep 30, 2019 at 01:04:51PM +0800, qi1.zh...@intel.com wrote:
> From: "Zhang, Qi"
>
> When dt is supported, TM field should not be Reserved(0).
>
> Refer to VT-d Spec 9.8
>
> Signed-off-by: Zhang, Qi
> Signed-off-by: Qi, Yadong
I am guessing this is really a 2 patch series right?
So
On Thu, Sep 26, 2019 at 05:17:22PM +0200, Philippe Mathieu-Daudé wrote:
> Hi.
>
> Following the thread discussion between Peter/Markus/Damien about
> reset handlers:
> https://www.mail-archive.com/qemu-devel@nongnu.org/msg617103.html
> I started to remove qemu_register_reset() calls from few
Looks like no one understands how to do it.
Document the process.
Signed-off-by: Michael S. Tsirkin
---
tests/bios-tables-test.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/tests/bios-tables-test.c b/tests/bios-tables-test.c
index 652a78773f..0b33fb265f
I already try to make sure all bitmaps patches have been reviewed by both
Red Hat and Virtuozzo anyway, so this formalizes the arrangement.
Fam meanwhile is no longer as active, so I am removing him as a co-maintainer
simply to reflect the current practice.
Signed-off-by: John Snow
---
Hi; I'll be going away on an extended trip this November and have made
arrangements for reviews to be handled in my absence. I've asked Vladimir
to take point on any reviews for patches he didn't author, and have asked
Eric to take point on reviewing any of Vladimir's patches for this tree.
On Sat, 5 Oct 2019 at 18:13, John Snow wrote:
> I'm not clear on the particulars of mail delivery protocols or what
> lists.sr.ht is, but we indeed do not like HTML mail sent to this list.
I suspect the lists.sr.ht address is just some subscriber to the
QEMU mailing list -- the list server sent
Hi John,
On Sun, Oct 6, 2019 at 2:12 AM John Snow wrote:
> On 10/5/19 7:55 AM, Lucien Murray-Pitts wrote:
> > The last message I sent came back with a weird reply from
[snip]
>
> I'm not clear on the particulars of mail delivery protocols or what
> lists.sr.ht is, but we indeed do not like HTML
On 10/5/19 7:55 AM, Lucien Murray-Pitts wrote:
> Hey folks,
>
> The last message I sent came back with a weird reply from
> *mai...@lists.sr.ht*, claiming the list didnt support "HTML" formatted
> mail (which is the default) for gmail, and then saying it couldnt be
> delivered.
>
> Thats a
This test boots a Linux kernel on a smdkc210 board and verify
the serial output is working.
The cpio image used comes from the linux-build-test project:
https://github.com/groeck/linux-build-test
Since this test is not reliable due to clock timing issues,
it is disabled with the 'skip' property.
This test boots a Linux kernel on a smdkc210 board and verify
the serial output is working.
The cpio image used comes from the linux-build-test project:
https://github.com/groeck/linux-build-test
If ARM is a target being built, "make check-acceptance" will
automatically include this test by the
The Exynos SoC has specific SDHCI registers. Use the s3c SDHCI
model which handle these specific registers.
This silents the following "SDHC ... not implemented" warnings so
we can focus on the important registers missing:
$ qemu-system-arm ... -d unimp \
-append "... root=/dev/mmcblk0
Hi all,
Yesterday Peter Maydell asked on IRC if I had any working Exynos4
image. I looked at some old backuped notes and could boot Guenter
initrd with BusyBox.
I'll use this cover letter to share my notes, they might help to
have this board fully usable again.
This board is listed as "Odd
The Linux kernel access few S3C-specific registers [1] to set some
clock. We don't care about this part for device emulation [2]. Add
a dummy device to properly ignore these accesses, so we can focus
on the important registers missing.
[1]
This file keeps the various QDev blocks separated by comments.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sdhci.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index e08ec3e398..82ec5c1b4a 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
On Sat, 5 Oct 2019 at 16:04, Philippe Mathieu-Daudé wrote:
>
> This device implementation is clearly restricted to 32-bit
> accesses. Set the MemoryRegionOps::impl min/max access_size
> fields to simplify the code, and remove the hw_error() call.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
>
This device implementation is clearly restricted to 32-bit
accesses. Set the MemoryRegionOps::impl min/max access_size
fields to simplify the code, and remove the hw_error() call.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/dma/etraxfs_dma.c | 25 -
1 file changed, 4
postcopy_ram_incoming_setup() and postcopy_ram_incoming_cleanup() are
counterpart. It is reasonable to map/unmap large zero page in these two
functions respectively.
Signed-off-by: Wei Yang
---
migration/postcopy-ram.c | 34 +-
1 file changed, 17 insertions(+),
During migration, a tmp page is allocated so that we could place a whole
host page during postcopy.
Currently the page is allocated during load stage, this is a little bit
late. And more important, if we failed to allocate it, the error is not
checked properly. Even it is NULL, we would still use
Currently we map these page when we want to use it, while this may be a
little late.
To make the code consistency, these two patches move the map into
postcopy_ram_incoming_setup.
Wei Yang (2):
migration/postcopy: allocate tmp_page in setup stage
migration/postcopy: map large zero page in
On Sat, 5 Oct 2019 at 11:21, Lucien Murray-Pitts
wrote:
> Whilst working on a m68k patch I noticed that the capstone in use
> today (3.0) doesnt support the M68K and thus a hand turned disasm
> function is used.
>
> The newer capstone (5.0) appears to support a few more CPU, inc. m68k.
>
> Why we
Document the qemu command-line and qmp commands for continuous replication
Signed-off-by: Lukas Straub
---
docs/COLO-FT.txt | 213 +++--
docs/block-replication.txt | 28 +++--
2 files changed, 174 insertions(+), 67 deletions(-)
diff --git
Hello Everyone,
These Patches add support for continuous replication to colo. This means
that after the Primary fails and the Secondary did a failover, the Secondary
can then become Primary and resume replication to a new Secondary.
Regards,
Lukas Straub
v6:
- properly documented the position=
To switch the Secondary to Primary, we need to insert new filters
before the filter-rewriter.
Add the options insert= and position= to be able to insert filters
anywhere in the filter list.
position should be "head" or "tail" to insert at the head or
tail of the filter list or it should be "id="
After failover the Secondary side of replication shouldn't change state, because
it now functions as our primary disk.
In replication_start, replication_do_checkpoint, replication_stop, ignore
the request if current state is BLOCK_REPLICATION_DONE (sucessful failover) or
This simulates the case that happens when we resume COLO after failover.
Signed-off-by: Lukas Straub
---
tests/test-replication.c | 52
1 file changed, 52 insertions(+)
diff --git a/tests/test-replication.c b/tests/test-replication.c
index
On Fri, Oct 4, 2019 at 11:18 PM Jonathan Behrens wrote:
>
> This patch enables a debugger to read and write the current privilege level
> via
> a special "priv" register. When compiled with CONFIG_USER_ONLY the register is
> still visible but is hardwired to zero.
>
> Signed-off-by: Jonathan
Hey folks,
The last message I sent came back with a weird reply from
*mai...@lists.sr.ht*, claiming the list didnt support "HTML" formatted
mail (which is the default) for gmail, and then saying it couldnt be
delivered.
Thats a confusing mail as it would imply failure in delivery.Was I
Hi folks,
Whilst working on a m68k patch I noticed that the capstone in use
today (3.0) doesnt support the M68K and thus a hand turned disasm
function is used.
The newer capstone (5.0) appears to support a few more CPU, inc. m68k.
Why we move to this newer capstone?
Furthermore, if making a
Hi folks,
Whilst working on a m68k patch I noticed that the capstone in use today
(3.0) doesnt support the M68K and thus a hand turned disasm function is
used.
The newer capstone (5.0) appears to support a few more CPU, inc. m68k.
Why we move to this newer capstone?
Furthermore, if making a
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