From: Philippe Mathieu-Daudé
The Exynos SoC has specific SDHCI registers. Use the s3c SDHCI
model which handle these specific registers.
This silents the following "SDHC ... not implemented" warnings so
we can focus on the important registers missing:
$ qemu-system-arm ... -d unimp \
From: Philippe Mathieu-Daudé
This file keeps the various QDev blocks separated by comments.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Cleber Rosa
Message-id: 20191005154748.21718-3-f4...@amsat.org
Signed-off-by: Peter Maydell
---
hw/sd/sdhci.c | 3 ++-
1 file changed, 2
From: Richard Henderson
We do not need to compute any of these values for M-profile.
Further, XSCALE_CPAR overlaps VECSTRIDE so obviously the two
sets must be mutually exclusive.
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
Message-id:
From: Richard Henderson
There are 3 conditions that each enable this flag. M-profile always
enables; A-profile with EL1 as AA64 always enables. Both of these
conditions can easily be cached. The final condition relies on the
FPEXC register which we are not prepared to cache.
Reviewed-by:
From: Richard Henderson
Continue setting, but not relying upon, env->hflags.
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
Message-id: 20191018174431.1784-19-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/op_helper.c | 3 +++
1 file changed, 3
From: Richard Henderson
Continue setting, but not relying upon, env->hflags.
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
Message-id: 20191018174431.1784-21-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/m_helper.c | 6 ++
target/arm/translate.c |
From: Richard Henderson
Create a function to compute the values of the TBFLAG_ANY bits
that will be cached, and are used by A-profile.
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
Message-id: 20191018174431.1784-9-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
From: Richard Henderson
Create a function to compute the values of the TBFLAG_A32 bits
that will be cached, and are used by all profiles.
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
Message-id: 20191018174431.1784-4-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
From: Richard Henderson
Create a function to compute the values of the TBFLAG_A32 bits
that will be cached, and are used by M-profile.
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
Message-id: 20191018174431.1784-6-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
From: Richard Henderson
Continue setting, but not relying upon, env->hflags.
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
Message-id: 20191018174431.1784-18-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/translate-a64.c | 13 +++--
From: Richard Henderson
Create a function to compute the values of the TBFLAG_A64 bits
that will be cached. For now, the env->hflags variable is not
used, and the results are fed back to cpu_get_tb_cpu_state.
Note that not all BTI related flags are cached, so we have to
test the BTI feature
From: Richard Henderson
Currently a trivial wrapper for rebuild_hflags_common_32.
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
Message-id: 20191018174431.1784-8-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/helper.c | 8 +++-
1 file changed, 7
From: Richard Henderson
Set TBFLAG_ANY.BE_DATA in rebuild_hflags_common_32 and
rebuild_hflags_a64 instead of rebuild_hflags_common, where we do
not need to re-test is_a64() nor re-compute the various inputs.
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
Message-id:
Switch the mcf5208 code away from bottom-half based ptimers to
the new transaction-based ptimer API. This just requires adding
begin/commit calls around the various places that modify the ptimer
state, and using the new ptimer_init() function to create the timer.
Signed-off-by: Peter Maydell
From: Richard Henderson
Create a function to compute the values of the TBFLAG_ANY bits
that will be cached. For now, the env->hflags variable is not
used, and the results are fed back to cpu_get_tb_cpu_state.
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
Message-id:
Switch the sh_timer code away from bottom-half based ptimers to the
new transaction-based ptimer API. This just requires adding
begin/commit calls around the various places that modify the ptimer
state, and using the new ptimer_init() function to create the timer.
Signed-off-by: Peter Maydell
From: Richard Henderson
Hoist the computation of some TBFLAG_A32 bits that only apply to
M-profile under a single test for ARM_FEATURE_M.
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
Message-id: 20191018174431.1784-7-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
Switch the altera_timer code away from bottom-half based ptimers to
the new transaction-based ptimer API. This just requires adding
begin/commit calls around the various places that modify the ptimer
state, and using the new ptimer_init() function to create the timer.
Signed-off-by: Peter
Switch the etraxfs_timer code away from bottom-half based ptimers to
the new transaction-based ptimer API. This just requires adding
begin/commit calls around the various places that modify the ptimer
state, and using the new ptimer_init() function to create the timer.
Signed-off-by: Peter
Switch the puv3_ost code away from bottom-half based ptimers to the
new transaction-based ptimer API. This just requires adding
begin/commit calls around the various places that modify the ptimer
state, and using the new ptimer_init() function to create the timer.
Signed-off-by: Peter Maydell
Switch the lm32_timer code away from bottom-half based ptimers to the
new transaction-based ptimer API. This just requires adding
begin/commit calls around the various places that modify the ptimer
state, and using the new ptimer_init() function to create the ytimer.
Signed-off-by: Peter Maydell
From: Guenter Roeck
When booting a recent Linux kernel, the qemu message "Timer with delta
zero, disabling" is seen, apparently because a ptimer is started before
being initialized. Fix the problem by initializing the offending ptimer
before starting it.
The bug is effectively harmless in the
In commit b01422622b we did an automated rename of the ptimer_init()
function to ptimer_init_with_bh(). Unfortunately this caught the
unrelated arm_mptimer_init() function. Undo that accidental
renaming.
Fixes: b01422622b7c7293196fdaf1dbb4f495af44ecf9
Signed-off-by: Peter Maydell
Reviewed-by:
-22
12:03:03 +0100)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20191022
for you to fetch changes up to 833043a060f7d0e95ded88e61e992466305c0345:
hw/arm/digic4: Inline digic4_board_setup_ram() function (2019-10-22 14:21:57
From: Cédric Le Goater
Define the board with 1 GiB of RAM but some boards can have up to 2
GiB.
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Message-id: 20191016090745.15334-1-...@kaod.org
Signed-off-by: Peter Maydell
---
include/hw/arm/aspeed.h | 1 +
hw/arm/aspeed.c
From: Richard Henderson
The 32-bit product should be sign-extended, not zero-extended.
Fixes: ea96b374641b
Reported-by: Laurent Desnogues
Signed-off-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Laurent Desnogues
Message-id:
Thomas Huth writes:
> As discussed here:
>
> https://lists.gnu.org/archive/html/qemu-devel/2019-10/msg00697.html
>
> and here:
>
> https://lists.gnu.org/archive/html/qemu-devel/2019-10/msg01388.html
Queued to testing/next, thanks.
>
> it would be good to have some more valuable iotests
On 22.10.2019 16:18, Max Reitz wrote:
> On 22.10.19 14:53, Denis Plotnikov wrote:
>> On 22.10.2019 14:05, Max Reitz wrote:
>>> On 21.10.19 08:50, Denis Plotnikov wrote:
On 18.10.2019 18:02, Max Reitz wrote:
> On 18.10.19 14:09, Denis Plotnikov wrote:
>> The modification is useful to
On 22.10.19 14:53, Denis Plotnikov wrote:
>
> On 22.10.2019 14:05, Max Reitz wrote:
>> On 21.10.19 08:50, Denis Plotnikov wrote:
>>> On 18.10.2019 18:02, Max Reitz wrote:
On 18.10.19 14:09, Denis Plotnikov wrote:
> The modification is useful to workaround exclusive file access
>
Le 22/10/2019 à 14:21, Philippe Mathieu-Daudé a écrit :
> Hi Laurent,
>
> On 10/22/19 1:17 PM, Laurent Vivier wrote:
>> There is no DMA in Quadra 800, so the CPU reads/writes the data from the
>> PDMA register (offset 0x100, ESP_PDMA in hw/m68k/q800.c) and copies them
>> to/from the memory.
>>
>>
Thomas Huth writes:
> On 22/10/2019 13.39, Alex Bennée wrote:
>>
>> Thomas Huth writes:
>>
>>> On 22/10/2019 09.21, Thomas Huth wrote:
As discussed here:
https://lists.gnu.org/archive/html/qemu-devel/2019-10/msg00697.html
and here:
Eduardo Habkost, le ven. 18 oct. 2019 13:41:43 -0300, a ecrit:
> On Fri, Oct 18, 2019 at 06:00:19PM +0200, Samuel Thibault wrote:
> > It was implemented at the time of introduction of IPv6 in SLIRP. Perhaps
> > NetBSD has a slightly different behavior which makes the implementation
> > fail to
On Mon, 21 Oct 2019 at 20:07, Philippe Mathieu-Daudé wrote:
>
> Hi Peter,
>
> This series contains the ARM patches extracted from the
> "Let the machine be the owner of the system memory" series [1]
> reviewed by Richard.
>
> These are cleanups moving the creation of the system ram at
> the board
On 22.10.2019 15:16, Samuel Thibault wrote:
> Eduardo Habkost, le ven. 18 oct. 2019 13:41:43 -0300, a ecrit:
>> On Fri, Oct 18, 2019 at 06:00:19PM +0200, Samuel Thibault wrote:
>>> It was implemented at the time of introduction of IPv6 in SLIRP. Perhaps
>>> NetBSD has a slightly different behavior
Use bdrv_dirty_bitmap_next_dirty_area for bitmap_to_extents. Since
bdrv_dirty_bitmap_next_dirty_area is very accurate in its interface,
we'll never exceed requested region with last chunk. So, we don't need
dont_fragment, and bitmap_to_extents() interface becomes clean enough
to not require any
Hi!
The main feature here is improvement of _next_dirty_area API, which I'm
going to use then for backup / block-copy.
v2:
01: just use INT64_MAX instead of adding new constant
08: add separate function nbd_extent_array_convert_to_be and converted
state of NBDExtentArray, to make these
We have bdrv_dirty_bitmap_next_zero, let's add corresponding
bdrv_dirty_bitmap_next_dirty, which is more comfortable to use than
bitmap iterators in some cases.
For test modify test_hbitmap_next_zero_check_range to check both
next_zero and next_dirty and add some new checks.
Signed-off-by:
We are going to introduce bdrv_dirty_bitmap_next_dirty so that same
variable may be used to store its return value and to be its parameter,
so it would int64_t.
Similarly, we are going to refactor hbitmap_next_dirty_area to use
hbitmap_next_dirty together with hbitmap_next_zero, therefore we want
Introduce NBDExtentArray class, to handle extents list creation in more
controlled way and with less OUT parameters in functions.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
nbd/server.c | 201 ---
1 file changed, 109 insertions(+), 92
Firstly, _next_dirty_area is for scenarios when we may contiguously
search for next dirty area inside some limited region, so it is more
comfortable to specify "end" which should not be recalculated on each
iteration.
Secondly, mirror wants to limit resulting are, and for this thing it
limits
> But isn't that "if" at the core of this problem? What happens if the
> detection misfires?
The information that a block driver must give is just whether the given
block is allocated by the image or whether it is taken from the backing
file. Almost everything else is just a hint that can be
The function is definitely internal (it's not used by third party and
it has complicated interface). Move it to .c file.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
include/qemu/hbitmap.h | 30 --
util/hbitmap.c | 29 +
2 files
Function is internal and even commented as internal. Drop its
definition from .h file.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
include/qemu/hbitmap.h | 7 ---
util/hbitmap.c | 2 +-
2 files changed, 1 insertion(+), 8 deletions(-)
diff --git a/include/qemu/hbitmap.h
store_bitmap_data() loop does bdrv_set_dirty_iter() on each iteration,
which means that we actually don't need iterator itself and we can use
simpler bitmap API.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
block/qcow2-bitmap.c | 11 +--
1 file changed, 5 insertions(+), 6
We have APIs which returns signed int64_t, to be able to return error.
Therefore we can't handle bitmaps with absolute size larger than
(INT64_MAX+1). Still, keep maximum to be INT64_MAX which is a bit
safer.
Note, that bitmaps are used to represent disk images, which can't
exceed INT64_MAX
Samuel Thibault, le ven. 18 oct. 2019 18:00:19 +0200, a ecrit:
> Philippe Mathieu-Daudé, le ven. 18 oct. 2019 16:58:00 +0200, a ecrit:
> > On 10/18/19 4:29 PM, Eduardo Habkost wrote:
> > > In addition to that, the connect() error should be generating a
> > > ICMP6_UNREACH message, and I'd expect
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
include/qemu/hbitmap.h | 21
tests/test-hbitmap.c | 115 -
util/hbitmap.c | 16 --
3 files changed, 152 deletions(-)
diff --git a/include/qemu/hbitmap.h b/include/qemu/hbitmap.h
On 22.10.19 14:23, Vladimir Sementsov-Ogievskiy wrote:
> 22.10.2019 14:31, Max Reitz wrote:
>> On 22.10.19 12:46, Vladimir Sementsov-Ogievskiy wrote:
>>> 22.10.2019 13:21, Andrey Shinkevich wrote:
On 22/10/2019 12:28, Max Reitz wrote:
> On 20.10.19 22:37, Andrey Shinkevich wrote:
On Fri, 18 Oct 2019 at 15:48, Philippe Mathieu-Daudé wrote:
>
> Hi Peter,
>
> On 10/5/19 5:47 PM, Philippe Mathieu-Daudé wrote:
> > Philippe Mathieu-Daudé (5):
> >tests/boot_linux_console: Add initrd test for the Exynos4210
> >hw/sd/sdhci: Add a comment to distinct the i.MX eSDHC
On 22.10.2019 14:05, Max Reitz wrote:
> On 21.10.19 08:50, Denis Plotnikov wrote:
>> On 18.10.2019 18:02, Max Reitz wrote:
>>> On 18.10.19 14:09, Denis Plotnikov wrote:
The modification is useful to workaround exclusive file access
restrictions,
e.g. to implement VM migration with
On 10/22/19 8:18 AM, Markus Armbruster wrote:
Han Han writes:
Since ee5d0f89d, -1 is not valid for the value of reboot-timeout. Update
that in qemu-options doc.
Signed-off-by: Han Han
---
qemu-options.hx | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
On Fri, 18 Oct 2019 at 18:44, Richard Henderson
wrote:
>
> Changes since v7:
> * Rebuild hflags for all successful nvic writes (Peter).
> * Rebuild hflags for Xscale sctlr writes (Peter).
>
> Changes since v6:
> * Regen hflags in two more places for m-profile (patch 19).
>
> Changes since
On Tue, 22 Oct 2019 at 09:27, Laurent Vivier wrote:
>
> The following changes since commit e9d42461920f6f40f4d847a5ba18e90d095ed0b9:
>
> Merge remote-tracking branch
> 'remotes/kraxel/tags/audio-20191018-pull-request' into staging (2019-10-18
> 14:13:11 +0100)
>
> are available in the Git
On 10/21/19 15:06, Laszlo Ersek wrote:
> On 10/18/19 18:18, Igor Mammedov wrote:
>> On Thu, 10 Oct 2019 16:56:18 +0200
>> Laszlo Ersek wrote:
[...]
>>> Can I use the following sequence to detect whether the interface is
>>> available?
>>>
>>> 1. Store 0x0 to command register.
>>> 2. Store 0x0
The following changes since commit e9d42461920f6f40f4d847a5ba18e90d095ed0b9:
Merge remote-tracking branch
'remotes/kraxel/tags/audio-20191018-pull-request' into staging (2019-10-18
14:13:11 +0100)
are available in the Git repository at:
git://repo.or.cz/qemu/armbru.git
22.10.2019 14:31, Max Reitz wrote:
> On 22.10.19 12:46, Vladimir Sementsov-Ogievskiy wrote:
>> 22.10.2019 13:21, Andrey Shinkevich wrote:
>>>
>>> On 22/10/2019 12:28, Max Reitz wrote:
On 20.10.19 22:37, Andrey Shinkevich wrote:
> To inform the block layer about writing all the data
Hi Laurent,
On 10/22/19 1:17 PM, Laurent Vivier wrote:
There is no DMA in Quadra 800, so the CPU reads/writes the data from the
PDMA register (offset 0x100, ESP_PDMA in hw/m68k/q800.c) and copies them
to/from the memory.
There is a nice assembly loop in the kernel to do that, see
On Tue, 22 Oct 2019 at 04:30, Jason Wang wrote:
>
>
> On 2019/10/20 上午1:38, Sven Schnelle wrote:
> > This adds the basic functionality to emulate a Tulip NIC.
> >
> > Implemented are:
> >
> > - RX and TX functionality
> > - Perfect Frame Filtering
> > - Big/Little Endian descriptor support
> > -
On Sat, 19 Oct 2019 at 18:40, Sven Schnelle wrote:
>
> This adds the basic functionality to emulate a Tulip NIC.
>
> Implemented are:
>
> - RX and TX functionality
> - Perfect Frame Filtering
> - Big/Little Endian descriptor support
> - 93C46 EEPROM support
> - LXT970 PHY
>
> Not implemented,
On Tuesday, October 22, 2019, Michael Rolnik wrote:
> This includes:
> - CPU data structures
> - object model classes and functions
> - migration functions
> - GDB hooks
>
> Co-developed-by: Michael Rolnik
> Co-developed-by: Sarah Harris
> Signed-off-by: Michael Rolnik
> Signed-off-by: Sarah
On Tuesday, October 22, 2019, Michael Rolnik wrote:
> This includes:
> - CPU data structures
> - object model classes and functions
> - migration functions
> - GDB hooks
>
> Co-developed-by: Michael Rolnik
> Co-developed-by: Sarah Harris
> Signed-off-by: Michael Rolnik
> Signed-off-by: Sarah
On 22/10/2019 13.39, Alex Bennée wrote:
>
> Thomas Huth writes:
>
>> On 22/10/2019 09.21, Thomas Huth wrote:
>>> As discussed here:
>>>
>>> https://lists.gnu.org/archive/html/qemu-devel/2019-10/msg00697.html
>>>
>>> and here:
>>>
>>>
On 22/10/2019 11:08, Philippe Mathieu-Daudé wrote:
> Hi Cédric,
>
> On 10/22/19 9:22 AM, Cédric Le Goater wrote:
>> On the sPAPR machine and PowerNV machine, the interrupt presenters are
>> created by a machine handler at the core level and are reseted
>
> Typo "reset"
>
>> independently. This
this revision has a bug, flag C is not calculated correctly.
On Tue, Oct 22, 2019 at 1:37 AM Michael Rolnik wrote:
>
> This series of patches adds 8bit AVR cores to QEMU.
> All instruction, except BREAK/DES/SPM/SPMX, are implemented. Not fully tested
> yet.
> However I was able to execute
On 21/10/2019 16.06, Peter Maydell wrote:
> Switch the mcf5206 code away from bottom-half based ptimers to
> the new transaction-based ptimer API. This just requires adding
> begin/commit calls around the various places that modify the ptimer
> state, and using the new ptimer_init() function to
Thomas Huth writes:
> On 22/10/2019 09.21, Thomas Huth wrote:
>> As discussed here:
>>
>> https://lists.gnu.org/archive/html/qemu-devel/2019-10/msg00697.html
>>
>> and here:
>>
>> https://lists.gnu.org/archive/html/qemu-devel/2019-10/msg01388.html
>>
>> it would be good to have some more
Alex Bennée writes:
> Hi,
>
> This is the latest iteration of the TCG plugins series. From the
> documentation:
>
> QEMU TCG plugins provide a way for users to run experiments taking
> advantage of the total system control emulation can have over a guest.
> It provides a mechanism for
I just stumbled over this series. It touches the QAPI visitors and even
the generator, without cc'ing its maintainers. Such changes require
review. There's precious little time until the soft freeze now. I'll
try, but no promises.
Please cc me and Michael Roth on future
revisions.
In
This patch adds basic support for the NuBus bus. This is used by 680x0
Macintosh.
Co-developed-by: Mark Cave-Ayland
Signed-off-by: Mark Cave-Ayland
Signed-off-by: Laurent Vivier
Reviewed-by: Thomas Huth
---
include/hw/nubus/mac-nubus-bridge.h | 24
include/hw/nubus/nubus.h|
From: Philippe Mathieu-Daudé
This test boots a Linux kernel on a Quadra 800 board
and verify the serial is working.
Example:
$ avocado --show=app,console run -t machine:q800
tests/acceptance/boot_linux_console.py
console: ABCFGHIJK
console: Linux version 5.2.0-2-m68k
Hi Philippe,
On Tue, Oct 22, 2019 at 11:50:14AM +0200, Philippe Mathieu-Daudé wrote:
> On 10/22/19 7:54 AM, Sven Schnelle wrote:
> > HP-UX sends both the 'Set key make and break (0xfc) and
> > 'Set all key typematic make and break' (0xfa). QEMU response
> > with 'Resend' as it doesn't handle
Inside the 680x0 Macintosh, VIA (Versatile Interface Adapter) is used
to interface the keyboard, Mouse, and real-time clock. It also provides
control line for the floppy disk driver, video interface, sound circuitry
and serial interface.
This implementation is based on the MOS6522 object.
On 22.10.19 12:46, Vladimir Sementsov-Ogievskiy wrote:
> 22.10.2019 13:21, Andrey Shinkevich wrote:
>>
>> On 22/10/2019 12:28, Max Reitz wrote:
>>> On 20.10.19 22:37, Andrey Shinkevich wrote:
To inform the block layer about writing all the data compressed, we
introduce the 'compress'
There is no DMA in Quadra 800, so the CPU reads/writes the data from the
PDMA register (offset 0x100, ESP_PDMA in hw/m68k/q800.c) and copies them
to/from the memory.
There is a nice assembly loop in the kernel to do that, see
linux/drivers/scsi/mac_esp.c:MAC_ESP_PDMA_LOOP().
The start of the
On 22/10/2019 12.41, Alex Bennée wrote:
>
> Thomas Huth writes:
>
>> Travis now features an arm64 build host, so let's check compilation
>> there, too.
>>
>> Unfortunately, there are some quirks:
>> - block/ssh.c does not compile properly in this environment, so we have
>> to use
On Tue, 22 Oct 2019 09:22:46 +0200
Cédric Le Goater wrote:
> When a Virtual Processor is scheduled to run on a HW thread, the
> hypervisor pushes its identifier in the OS CAM line. When running with
> kernel_irqchip=off, QEMU needs to emulate the same behavior.
>
> Set the OS CAM line when the
Large copy range may imply memory allocation and large io effort, so
using 2G copy range request may be bad idea. Let's limit it to 16 MiB.
It also helps the following patch to refactor copy-with-offload
fallback to copy-with-bounce-buffer.
Note, that total memory usage of backup is still not
If you want to test the machine, it doesn't yet boot a MacROM, but you can
boot a linux kernel from the command line.
You can install your own disk using debian-installer with:
./qemu-system-m68k \
-M q800 \
-serial none -serial mon:stdio \
-m 1000M -drive
On Tue, 22 Oct 2019 09:22:45 +0200
Cédric Le Goater wrote:
> On the sPAPR machine and PowerNV machine, the interrupt presenters are
> created by a machine handler at the core level and are reseted
> independently. This is not consistent and it raises issues when it
> comes to handle hot-plugged
This is needed by Quadra 800, this card can run on little-endian
or big-endian bus.
Signed-off-by: Laurent Vivier
Tested-by: Hervé Poussineau
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Hervé Poussineau
---
hw/net/dp8393x.c | 88 +++-
1 file
Merge copying code into one function block_copy_do_copy, which only
calls bdrv_ io functions and don't do any synchronization (like dirty
bitmap set/reset).
Refactor block_copy() function so that it takes full decision about
size of chunk to be copied and does all the synchronization (checking
SWIM (Sander-Wozniak Integrated Machine) is the floppy controller of
the 680x0 Macintosh.
This patch introduces only the basic support: it allows to switch from
IWM (Integrated WOZ Machine) mode to the SWIM mode and makes the linux
driver happy.
It cannot read any floppy image.
Co-developed-by:
Introduce an API for some shared splittable resource, like memory.
It's going to be used by backup. Backup uses both read/write io and
copy_range. copy_range may consume memory implictly, so the new API is
abstract: it doesn't allocate any real memory but only hands out
tickets.
The idea is that
VIA needs to be able to poll the ADB interface and to read/write data
from/to the bus.
This patch adds functions allowing that.
Co-developed-by: Mark Cave-Ayland
Signed-off-by: Mark Cave-Ayland
Signed-off-by: Laurent Vivier
Reviewed-by: Hervé Poussineau
Reviewed-by: Thomas Huth
---
This patch adds support for a graphic framebuffer device.
This device can be added as a sysbus device or as a NuBus device.
It is accessed as a framebuffer but the color palette can be set.
Co-developed-by: Mark Cave-Ayland
Signed-off-by: Mark Cave-Ayland
Signed-off-by: Laurent Vivier
No reason to limit buffered copy to one cluster. Let's allow up to 1
MiB.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Max Reitz
---
include/block/block-copy.h | 2 +-
block/block-copy.c | 48 +-
2 files changed, 33 insertions(+), 17
Currently total allocation for parallel requests to block-copy instance
is unlimited. Let's limit it to 128 MiB.
For now block-copy is used only in backup, so actually we limit total
allocation for backup job.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Max Reitz
---
Move bounce_buffer allocation block_copy_with_bounce_buffer. This
commit simplifies further work on implementing copying by larger chunks
(of different size) and further asynchronous handling of block_copy
iterations (with help of block/aio_task API).
Allocation works fast, a lot faster than disk
I'm rebasing some of these patches for seven years now,
too many years...
if you want to test the machine, I'm sorry, it doesn't boot
a MacROM, but you can boot a linux kernel from the command line.
You can install your own disk using debian-installer, with:
...
-M q800 \
-serial
I'm going to bring block-status driven, async copying process to
block-copy, to make it fast. The first step is to limit memory usage of
backup, here is it.
v3:
03: add Max's r-b
04: fix commit message and include guards, add Max's r-b
05-06: add Max's r-b
v2: [mostly by Max's comments]
Now
* Marc-André Lureau (marcandre.lur...@gmail.com) wrote:
> On Mon, Oct 21, 2019 at 1:26 PM Dr. David Alan Gilbert (git)
> wrote:
> >
> > From: "Dr. David Alan Gilbert"
> >
> > Processes incoming requests on the vhost-user fd.
>
> Is there a reason to avoid using glib & its main loop?
Not
On 17/10/19 12:18, Laurent Vivier wrote:
> Trying to reboot a VM while a migration is running can
> move to the prelaunch state (because of the reset) while
> the runstate is in finish migrate state.
> As the logical step after the finish migrate is postmigrate,
> this can create an invalid state
On 21.10.19 08:50, Denis Plotnikov wrote:
>
> On 18.10.2019 18:02, Max Reitz wrote:
>> On 18.10.19 14:09, Denis Plotnikov wrote:
>>> The modification is useful to workaround exclusive file access restrictions,
>>> e.g. to implement VM migration with shared disk stored on a storage with
>>> the
On Tue, 22 Oct 2019 at 09:20, Laurent Vivier wrote:
>
> The following changes since commit e9d42461920f6f40f4d847a5ba18e90d095ed0b9:
>
> Merge remote-tracking branch
> 'remotes/kraxel/tags/audio-20191018-pull-request' into staging (2019-10-18
> 14:13:11 +0100)
>
> are available in the Git
"Dr. David Alan Gilbert" writes:
> * Paolo Bonzini (pbonz...@redhat.com) wrote:
>> On 17/10/19 12:18, Laurent Vivier wrote:
>> > Trying to reboot a VM while a migration is running can
>> > move to the prelaunch state (because of the reset) while
>> > the runstate is in finish migrate state.
>> >
22.10.2019 13:23, Max Reitz wrote:
> On 16.10.19 19:09, Vladimir Sementsov-Ogievskiy wrote:
>> Introduce an API for some shared splittable resource, like memory.
>> It's going to be used by backup. Backup uses both read/write io and
>> copy_range. copy_range may consume memory implictly, so the
Peter Maydell writes:
> On Tue, 22 Oct 2019 at 09:11, Markus Armbruster wrote:
>>
>> The following changes since commit e9d42461920f6f40f4d847a5ba18e90d095ed0b9:
>>
>> Merge remote-tracking branch
>> 'remotes/kraxel/tags/audio-20191018-pull-request' into staging (2019-10-18
>> 14:13:11
22.10.2019 13:21, Andrey Shinkevich wrote:
>
> On 22/10/2019 12:28, Max Reitz wrote:
>> On 20.10.19 22:37, Andrey Shinkevich wrote:
>>> To inform the block layer about writing all the data compressed, we
>>> introduce the 'compress' command line option. Based on that option, the
>>> written data
Thomas Huth writes:
> Travis now features an arm64 build host, so let's check compilation
> there, too.
>
> Unfortunately, there are some quirks:
> - block/ssh.c does not compile properly in this environment, so we have
> to use --disable-libssh until that problem is fixed.
> -
On 16.10.19 19:09, Vladimir Sementsov-Ogievskiy wrote:
> No reason to limit buffered copy to one cluster. Let's allow up to 1
> MiB.
>
> Signed-off-by: Vladimir Sementsov-Ogievskiy
> ---
> include/block/block-copy.h | 2 +-
> block/block-copy.c | 48
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