On Wed, Nov 06, 2019 at 06:36:01AM -0500, Michael S. Tsirkin wrote:
>
> On Tue, Oct 29, 2019 at 05:38:02PM -0400, Raphael Norwitz wrote:
> > Add a VHOST_USER_RESET_DEVICE message which will reset the vhost user
> > backend. Disabling all rings, and resetting all internal state, ready
> > for the
On Fri, 13 Dec 2019, at 18:03, Cédric Le Goater wrote:
> On 13/12/2019 05:28, Andrew Jeffery wrote:
> > Hello,
> >
> > The AST2600 has an additional SDHCI intended for use as an eMMC boot source.
> > These two patches rework the existing ASPEED SDHCI model to accommodate the
> > single-slot
On 13/12/2019 05:28, Andrew Jeffery wrote:
> Hello,
>
> The AST2600 has an additional SDHCI intended for use as an eMMC boot source.
> These two patches rework the existing ASPEED SDHCI model to accommodate the
> single-slot nature of the eMMC controller and wire it into the AST2600 SoC.
>
> v2
On 18.11.2019 13:50, Denis Plotnikov wrote:
>
>
> On 10.11.2019 22:08, Denis Plotnikov wrote:
>>
>> On 10.11.2019 22:03, Denis Plotnikov wrote:
>>> This allows to change (replace) the file on a block device and is
>>> useful
>>> to workaround exclusive file access restrictions, e.g. to
On 13/12/2019 05:28, Andrew Jeffery wrote:
> Initialise another SDHCI model instance for the AST2600's eMMC
> controller and use the SDHCI's num_slots value introduced previously to
> determine whether we should create an SD card instance for the new slot.
>
> Signed-off-by: Andrew Jeffery
On 13/12/2019 05:28, Andrew Jeffery wrote:
> The AST2600 includes a second cut-down version of the SD/MMC controller
> found in the AST2500, named the eMMC controller. It's cut down in the
> sense that it only supports one slot rather than two, but it brings the
> total number of slots supported
On Fri, Dec 13, 2019 at 05:05:05PM +1100, Alexey Kardashevskiy wrote:
> Hi!
>
> I am having an issue with capabilities (hopefully the chunk formatting
> won't break).
>
> The problem is that when virtio_pci_find_capability() reads
> pci_find_capability(dev, PCI_CAP_ID_VNDR), 0 is returned; if
> This can be done efficiently as follows:
> 1. kata-runtime listens on a vsock port
> 2. kata-agent-port=PORT is added to the kernel command-line options
> 3. kata-agent parses the port number and connects to the host
>
> This eliminates the reconnection attempts.
There will be an additional
On Thu, Dec 12, 2019 at 04:24:19PM -0300, Eduardo Habkost wrote:
> On Thu, Dec 12, 2019 at 06:33:16PM +0100, Andrew Jones wrote:
> > Add 5.0 machine types for arm/i440fx/q35/s390x/spapr.
> >
> > Signed-off-by: Andrew Jones
> >
> > ---
> >
> > Hi Eduardo,
> >
> > If we need to do something
Hi!
I am having an issue with capabilities (hopefully the chunk formatting
won't break).
The problem is that when virtio_pci_find_capability() reads
pci_find_capability(dev, PCI_CAP_ID_VNDR), 0 is returned; if repeated,
it returns a valid number (0x84). Timing seems to matter. pci_cfg_read
trace
This matches the configuration set by u-boot on the AST2600.
Signed-off-by: Andrew Jeffery
Reviewed-by: Richard Henderson
Reviewed-by: Cédric Le Goater
Reviewed-by: Philippe Mathieu-Daudé
---
hw/arm/aspeed_ast2600.c | 3 +++
1 file changed, 3 insertions(+)
diff --git
65;5803;1cOn Fri, Dec 13, 2019 at 09:34:38AM +0530, Bharata B Rao wrote:
> On Thu, Dec 12, 2019 at 01:27:23PM +0100, Greg Kurz wrote:
> > > diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> > > index f11422fc41..25e1a3446e 100644
> > > --- a/hw/ppc/spapr.c
> > > +++ b/hw/ppc/spapr.c
> > > @@ -1597,6
On Thu, Dec 12, 2019 at 08:34:57AM +0100, Cédric Le Goater wrote:
> Hello Bharata,
>
>
> On 12/12/2019 06:50, Bharata B Rao wrote:
> > A pseries guest can be run as a secure guest on Ultravisor-enabled
> > POWER platforms. When such a secure guest is reset, we need to
> > release/reset a few
The ASPEED AST2600 clocks the generic timer at the rate of HPLL. On
recent firmwares this is at 1125MHz, which is considerably quicker than
the assumed 62.5MHz of the current generic timer implementation. The
delta between the value as read from CNTFRQ and the true rate of the
underlying QEMUTimer
The corner-case codepath was adjusting nexttick such that overflow
wouldn't occur when timer_mod() scaled the value back up. Remove a use
of GTIMER_SCALE and avoid unnecessary operations by calling
timer_mod_ns() directly.
Signed-off-by: Andrew Jeffery
Reviewed-by: Richard Henderson
Hello,
This is a v3 of the belated follow-up from a few of my earlier attempts to fix
up the ARM generic timer for correct behaviour on the ASPEED AST2600 SoC. The
AST2600 clocks the generic timer at the rate of HPLL, which is configured to
1125MHz. This is significantly quicker than the
Prepare for SoCs such as the ASPEED AST2600 whose firmware configures
CNTFRQ to values significantly larger than the static 62.5MHz value
currently derived from GTIMER_SCALE. As the OS potentially derives its
timer periods from the CNTFRQ value the lack of support for running
QEMUTimers at the
On Thu, Dec 12, 2019 at 03:24:26PM -0500, Stefan Berger wrote:
> Implement support for TPM on ppc64 by implementing the vTPM CRQ interface
> as a frontend. It can use the tpm_emulator driver backend with the external
> swtpm.
>
> The Linux vTPM driver for ppc64 works with this emulation.
>
>
On Thu, Dec 12, 2019 at 06:33:16PM +0100, Andrew Jones wrote:
> Add 5.0 machine types for arm/i440fx/q35/s390x/spapr.
>
> Signed-off-by: Andrew Jones
ppc parts
Acked-by: David Gibson
>
> ---
>
> Hi Eduardo,
>
> If we need to do something special for i440fx and q35, as
> 9aec2e52ce9d ("hw:
On Thu, Dec 12, 2019 at 03:24:28PM -0500, Stefan Berger wrote:
> Extend the tpm_spapr frontend with VM suspend and resume support.
>
> Signed-off-by: Stefan Berger
>
> diff --git a/hw/tpm/tpm_spapr.c b/hw/tpm/tpm_spapr.c
> index c4a67e2403..8f5a142bd4 100644
> --- a/hw/tpm/tpm_spapr.c
> +++
Hello,
The AST2600 has an additional SDHCI intended for use as an eMMC boot source.
These two patches rework the existing ASPEED SDHCI model to accommodate the
single-slot nature of the eMMC controller and wire it into the AST2600 SoC.
v2 contains some minor refactorings in response to issues
Initialise another SDHCI model instance for the AST2600's eMMC
controller and use the SDHCI's num_slots value introduced previously to
determine whether we should create an SD card instance for the new slot.
Signed-off-by: Andrew Jeffery
---
v2:
* Extract instantiation of SD cards to helper
The AST2600 includes a second cut-down version of the SD/MMC controller
found in the AST2500, named the eMMC controller. It's cut down in the
sense that it only supports one slot rather than two, but it brings the
total number of slots supported by the AST2600 to three.
The existing code assumed
In init_guest_space, we need to mmap guest space. If the return address
of first mmap is not aligned with align, which was set to MAX(SHMLBA,
qemu_host_page_size), we need unmap and a new mmap(space is larger than
first size). The new size is named real_size, which is aligned_size +
On Thu, Dec 12, 2019 at 01:27:23PM +0100, Greg Kurz wrote:
> > diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> > index f11422fc41..25e1a3446e 100644
> > --- a/hw/ppc/spapr.c
> > +++ b/hw/ppc/spapr.c
> > @@ -1597,6 +1597,21 @@ static void spapr_machine_reset(MachineState
> > *machine)
> > void
On Thu, Dec 12, 2019 at 10:40:44AM -0600, Wayne Li wrote:
> Dear David Gibson,
>
> I know you are under no obligation to respond, but if it's possible for you
> to find the time to respond to my question, I would be extremely grateful.
> My team at Boeing has been stuck trying to get KVM working
On Thu, Dec 12, 2019 at 08:43:59PM +0100, Laurent Vivier wrote:
> Register addr 1 is defined as buffer A with handshake (vBufAH),
> register addr 15 is also defined as buffer A without handshake (vBufA).
>
> Linux kernel has a big "DON'T USE!" next to the register 1 addr
> definition (vBufAH),
> > > Without buffer sharing support the driver importing a virtio-gpu dma-buf
> > > can send the buffer scatter list to the host. So both virtio-gpu and
> > > the other device would actually access the same guest pages, but they
> > > are not aware that the buffer is shared between devices.
> >
On 12/12/2019 8:48 PM, Igor Mammedov wrote:
Commit aa57020774b, by mistake used MachineClass::numa_mem_supported
to check if NUMA is supported by machine and also as unrelated change
set it to true for sbsa-ref board.
Luckily change didn't break machines that support NUMA, as the field
is set
From: Liu Jingqi
This structure describes memory side cache information for memory
proximity domains if the memory side cache is present and the
physical device forms the memory side cache.
The software could use this information to effectively place
the data in memory to maximize the
From: Liu Jingqi
This structure describes the memory access latency and bandwidth
information from various memory access initiator proximity domains.
The latency and bandwidth numbers represented in this structure
correspond to rated latency and bandwidth for the platform.
The software could use
Check configuring HMAT usecase
Acked-by: Markus Armbruster
Suggested-by: Igor Mammedov
Signed-off-by: Tao Xu
---
Changes in v20:
- Fix the wrong target in pc_hmat_erange_cfg
- Use g_assert_true and g_assert_false to replace g_assert
(Thomas and Markus)
Changes in v19:
- Add
From: Liu Jingqi
Add -numa hmat-cache option to provide Memory Side Cache Information.
These memory attributes help to build Memory Side Cache Information
Structure(s) in ACPI Heterogeneous Memory Attribute Table (HMAT).
Before using hmat-cache option, enable HMAT with -machine hmat=on.
ACPI table HMAT has been introduced, QEMU now builds HMAT tables for
Heterogeneous Memory with boot option '-numa node'.
Add test cases on PC and Q35 machines with 2 numa nodes.
Because HMAT is generated when system enable numa, the
following tables need to be added for this test:
In ACPI 6.3 chapter 5.2.27 Heterogeneous Memory Attribute Table (HMAT),
The initiator represents processor which access to memory. And in 5.2.27.3
Memory Proximity Domain Attributes Structure, the attached initiator is
defined as where the memory controller responsible for a memory proximity
From: Liu Jingqi
Add -numa hmat-lb option to provide System Locality Latency and
Bandwidth Information. These memory attributes help to build
System Locality Latency and Bandwidth Information Structure(s)
in ACPI Heterogeneous Memory Attribute Table (HMAT). Before using
hmat-lb option, enable
From: Liu Jingqi
HMAT is defined in ACPI 6.3: 5.2.27 Heterogeneous Memory Attribute Table
(HMAT). The specification references below link:
http://www.uefi.org/sites/default/files/resources/ACPI_6_3_final_Jan30.pdf
It describes the memory attributes, such as memory side cache
attributes and
This series of patches will build Heterogeneous Memory Attribute Table (HMAT)
according to the command line. The ACPI HMAT describes the memory attributes,
such as memory side cache attributes and bandwidth and latency details,
related to the Memory Proximity Domain.
The software is expected to
On 12/2/19 10:09 PM, Niek Linnenbank wrote:
The Allwinner H3 System on Chip has an System Control
module that provides system wide generic controls and
device information. This commit adds support for the
Allwinner H3 System Control module.
Signed-off-by: Niek Linnenbank
---
On 12/2/19 10:09 PM, Niek Linnenbank wrote:
The Clock Control Unit is responsible for clock signal generation,
configuration and distribution in the Allwinner H3 System on Chip.
This commit adds support for the Clock Control Unit which emulates
a simple read/write register interface.
Hi Niek,
On 12/11/19 11:34 PM, Niek Linnenbank wrote:
Ping!
Anyone would like to comment on this driver?
I finished the rework on all previous comments in this series.
Currently debugging the hflags error reported by Philippe.
After that, I'm ready to send out v2 of these patches.
Regards,
Hello,
On behalf of the QEMU Team, I'd like to announce the availability of
the QEMU 4.2.0 release. This release contains 2200+ commits from 198
authors.
You can grab the tarball from our download page here:
https://www.qemu.org/download/#source
The full list of changes are available at:
Cc'ing Alex.
On 12/13/19 12:07 AM, Niek Linnenbank wrote:
Hi Philippe,
I have discovered that the hflags assertion error you reported is not
caused by the Allwinner H3
patches but actually an existing problem. What I did is to use the
latest master (v4.2.0 tag) without any patches applied.
Configuration overlay may define MPU background map. Import
core-matmap.h from the overlay and use XCHAL_MPU_BACKGROUND_MAP macro
if it's defined.
Signed-off-by: Max Filippov
---
target/xtensa/import_core.sh | 4 +++-
target/xtensa/overlay_tool.h | 15 ++-
2 files changed, 17
Hello,
this series changes target/xtensa/import_core.sh script to import one
more header from the configuration overlay: the one with default address
space map for the core and uses information in this header to generate
background MPU map.
Max Filippov (2):
target/xtensa: import
Import core-isa.h from its canonical place in the configuration overlay.
Drop --xform option from the tar command line.
Signed-off-by: Max Filippov
---
target/xtensa/import_core.sh | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/xtensa/import_core.sh
Allow ps.ring modification by wsr.ps/xsr.ps and use ps.ring value in
xtensa_get_[c]ring on configurations with MPU.
Signed-off-by: Max Filippov
---
target/xtensa/cpu.h | 10 +++---
target/xtensa/translate.c | 3 ++-
2 files changed, 9 insertions(+), 4 deletions(-)
diff --git
Hi Philippe,
I have discovered that the hflags assertion error you reported is not
caused by the Allwinner H3
patches but actually an existing problem. What I did is to use the latest
master (v4.2.0 tag) without any patches applied.
and tried to boot the raspi2 machine with and without debugging
From: Thomas Huth
It's been marked as deprecated since QEMU v4.1, time to remove it now.
Signed-off-by: Thomas Huth
Signed-off-by: Greg Kurz
---
qemu-deprecated.texi | 5 -
qemu-options.hx | 10 --
vl.c | 23 ---
3 files changed, 38
From: Paolo Bonzini
Libcap was dropped from virtio-9p (commit 7e46261368d1), so remove it from
the dockerfiles as well.
Signed-off-by: Paolo Bonzini
Acked-by: Alex Bennée
[groug, mention SHA1 that dropped libcap]
Signed-off-by: Greg Kurz
---
tests/docker/dockerfiles/fedora.docker | 1 -
From: "Dr. David Alan Gilbert"
We currently enable libcap-dev in build-clang to pick up the 9p proxy
helper. Paolo's patch changes (commit 7e46261368d1) that to use
libcap-ng, so switch to using it. This also means we'll be testing the
scsi pr manager and the bridge helper.
Signed-off-by: Dr.
Commit 7e46261368d1 converted virtfs-proxy-helper to using libcap-ng. There
aren't any users of libcap anymore. No need to install libcap-dev.
Signed-off-by: Greg Kurz
Reviewed-by: Thomas Huth
Reviewed-by: Philippe Mathieu-Daudé
Acked-by: Alex Bennée
---
.travis.yml | 1 -
1 file changed, 1
From: Paolo Bonzini
virtfs-proxy-helper is the only user of libcap; everyone else is using
the simpler libcap-ng API. Switch and remove the configure code to
detect libcap.
Signed-off-by: Paolo Bonzini
Reviewed-by: Daniel P. Berrangé
Reviewed-by: Greg Kurz
[groug: - drop remaining -lcap
The following changes since commit fb2246882a2c8d7f084ebe0617e97ac78467d156:
.travis.yml: drop xcode9.4 from build matrix (2019-11-29 15:51:52 +)
are available in the Git repository at:
https://github.com/gkurz/qemu.git tags/9p-next-2019-12-12
for you to fetch changes up to
This explains better what they do and avoid confussino with
command_src/target.
Signed-off-by: Juan Quintela
---
tests/migration-test.c | 40 +---
1 file changed, 21 insertions(+), 19 deletions(-)
diff --git a/tests/migration-test.c b/tests/migration-test.c
Signed-off-by: Juan Quintela
---
tests/migration-test.c | 22 +-
1 file changed, 9 insertions(+), 13 deletions(-)
diff --git a/tests/migration-test.c b/tests/migration-test.c
index 85c98f0f9c..a83e43b7b6 100644
--- a/tests/migration-test.c
+++ b/tests/migration-test.c
@@
Signed-off-by: Juan Quintela
---
tests/migration-test.c | 76 +++---
1 file changed, 34 insertions(+), 42 deletions(-)
diff --git a/tests/migration-test.c b/tests/migration-test.c
index 18857f08f4..85c98f0f9c 100644
--- a/tests/migration-test.c
+++
Signed-off-by: Juan Quintela
---
tests/migration-test.c | 41 -
1 file changed, 16 insertions(+), 25 deletions(-)
diff --git a/tests/migration-test.c b/tests/migration-test.c
index a83e43b7b6..85e270ca39 100644
--- a/tests/migration-test.c
+++
Signed-off-by: Juan Quintela
---
tests/migration-test.c | 44 --
1 file changed, 25 insertions(+), 19 deletions(-)
diff --git a/tests/migration-test.c b/tests/migration-test.c
index 39203f6d46..18857f08f4 100644
--- a/tests/migration-test.c
+++
We are repeating almost everything for each machine while creating the
command line for migration. And once for source and another for
destination. We start putting there opts_src and opts_dst.
Signed-off-by: Juan Quintela
---
tests/migration-test.c | 44
Signed-off-by: Juan Quintela
---
tests/migration-test.c | 51 +-
1 file changed, 30 insertions(+), 21 deletions(-)
diff --git a/tests/migration-test.c b/tests/migration-test.c
index 372e66c755..39203f6d46 100644
--- a/tests/migration-test.c
+++
It has two bools and two strings, it is very difficult to remember
which does what. And it makes very difficult to add new parameters as
we need to modify all the callers.
Signed-off-by: Juan Quintela
---
tests/migration-test.c | 118 +++--
1 file changed,
Signed-off-by: Juan Quintela
---
tests/migration-test.c | 23 ---
1 file changed, 8 insertions(+), 15 deletions(-)
diff --git a/tests/migration-test.c b/tests/migration-test.c
index 85e270ca39..5ab8cfd4b2 100644
--- a/tests/migration-test.c
+++ b/tests/migration-test.c
@@
Hi
This series simplify test_migrate_start() in two ways:
- simplify the command line creation, so everything that is common between
architectures don't have to be repeated (DRY).
Note that this bit remove lines of code.
- test_migrate_start() has two bools and two strings as arguments, it is
Signed-off-by: Juan Quintela
---
tests/migration-test.c | 20
1 file changed, 8 insertions(+), 12 deletions(-)
diff --git a/tests/migration-test.c b/tests/migration-test.c
index 9573861ede..372e66c755 100644
--- a/tests/migration-test.c
+++ b/tests/migration-test.c
@@
On 12/12/19 9:01 PM, Laurent Vivier wrote:
Current implementation is based on GLUE, an early implementation
of the memory controller found in Macintosh II series.
Quadra 800 uses in fact djMEMC:
The djMEMC is an Apple custom integrated circuit chip that performs a
variety of functions (RAM
On Thu, 12 Dec 2019, Laurent Vivier wrote:
Current implementation is based on GLUE, an early implementation
of the memory controller found in Macintosh II series.
Quadra 800 uses in fact djMEMC:
The djMEMC is an Apple custom integrated circuit chip that performs a
variety of functions (RAM
On 12/12/19 3:33 PM, Eric Blake wrote:
On 12/12/19 2:24 PM, Stefan Berger wrote:
Implement support for TPM on ppc64 by implementing the vTPM CRQ
interface
as a frontend. It can use the tpm_emulator driver backend with the
external
swtpm.
The Linux vTPM driver for ppc64 works with this
On Thursday, December 12, 2019, Richard Henderson <
richard.hender...@linaro.org> wrote:
> This is part of a project to raise the limit on NB_MMU_MODES.
>
> One of those is in cpu_ldst.h, in support of MMU_MODE*_SUFFIX.
> While this could be extended, it's not the best interface for
> such
On 12/12/19 2:24 PM, Stefan Berger wrote:
Implement support for TPM on ppc64 by implementing the vTPM CRQ interface
as a frontend. It can use the tpm_emulator driver backend with the external
swtpm.
The Linux vTPM driver for ppc64 works with this emulation.
This TPM emulator also handles the
Implement support for TPM on ppc64 by implementing the vTPM CRQ interface
as a frontend. It can use the tpm_emulator driver backend with the external
swtpm.
The Linux vTPM driver for ppc64 works with this emulation.
This TPM emulator also handles the TPM 2 case.
Signed-off-by: Stefan Berger
Add an example to the TPM docs for how to add a TPM SPAPR
device model to a QEMU VM emulating a pSeries machine.
Signed-off-by: Stefan Berger
diff --git a/docs/specs/tpm.txt b/docs/specs/tpm.txt
index 9c8cca042d..9c3e67d8a7 100644
--- a/docs/specs/tpm.txt
+++ b/docs/specs/tpm.txt
@@ -34,6
Return true in case we had to wait for an outstanding response
to come back, false otherwise.
Signed-off-by: Stefan Berger
diff --git a/backends/tpm.c b/backends/tpm.c
index 375587e743..1f75883d8a 100644
--- a/backends/tpm.c
+++ b/backends/tpm.c
@@ -49,11 +49,15 @@ static int
Signed-off-by: Stefan Berger
diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig
index f927ec9c74..b5b3519158 100644
--- a/hw/ppc/Kconfig
+++ b/hw/ppc/Kconfig
@@ -10,6 +10,7 @@ config PSERIES
select XICS_SPAPR
select XIVE_SPAPR
select MSI_NONBROKEN
+select TPM_SPAPR
config
Extend the tpm_spapr frontend with VM suspend and resume support.
Signed-off-by: Stefan Berger
diff --git a/hw/tpm/tpm_spapr.c b/hw/tpm/tpm_spapr.c
index c4a67e2403..8f5a142bd4 100644
--- a/hw/tpm/tpm_spapr.c
+++ b/hw/tpm/tpm_spapr.c
@@ -87,6 +87,8 @@ typedef struct {
TPMVersion
The following series of patches adds vTPM emulator support for the
ppc64 platform (pSeries).
It can be tested as follows with swtpm/libtpms:
mkdir /tmp/mytpm1
swtpm socket --tpmstate dir=/tmp/mytpm1 \
--ctrl type=unixio,path=/tmp/mytpm1/swtpm-sock \
--log level=20
If TPM 2 is desired, add
Apologies for the delay.
* Marc-André Lureau (marcandre.lur...@gmail.com) wrote:
> Hi
>
> On Sun, Dec 1, 2019 at 10:10 PM Peter Maydell
> wrote:
> >
> > On Sun, 1 Dec 2019 at 17:27, Marc-André Lureau
> > wrote:
> > >
> > > Hi
> > >
> > > On Sun, Dec 1, 2019 at 9:18 PM Peter Maydell
> > >
On 12/12/19 1:33 PM, Stefan Berger wrote:
On 12/12/19 1:07 PM, Stefan Berger wrote:
Implement the check whether the emulator backend is suspended.
Signed-off-by: Stefan Berger
diff --git a/hw/tpm/tpm_emulator.c b/hw/tpm/tpm_emulator.c
index 22f9113432..7be7d3a91b 100644
---
Il gio 12 dic 2019, 20:04 Philippe Mathieu-Daudé ha
scritto:
> On 12/12/19 6:29 PM, Paolo Bonzini wrote:
> > Remove the need to include i386/pc.h to get to the i8259 functions.
> > This is enough to remove the inclusion of hw/i386/pc.h from all non-x86
> > files.
>
> Eh this is very similar to
Current implementation is based on GLUE, an early implementation
of the memory controller found in Macintosh II series.
Quadra 800 uses in fact djMEMC:
The djMEMC is an Apple custom integrated circuit chip that performs a
variety of functions (RAM management, clock generation, ...).
It receives
On the way to run a MacOS ROM we need a more accurate
emulation of the Quadra 800.
This series fixes the ESCC base address that was wrong but
as the linux kernel uses the one provided by the bootloader
(in our case QEMU) it was not a problem. This value
is hardcoded in the ROM, so QEMU must use
On Thursday, December 12, 2019, Richard Henderson <
richard.hender...@linaro.org> wrote:
> With the tracing hooks, the inline functions are no longer
> so simple. Reduce the amount of preprocessor obfuscation
> by expanding the text of each of the functions generated.
> The result is only
MacOS reads this address to identify the hardware.
This is a basic implementation returning the ID of Quadra 800.
Details:
http://mess.redump.net/mess/driver_info/mac_technical_notes
"There are 3 ID schemes [...]
The third and most scalable is a machine ID register at 0x5ffc.
The top
0xc020 is for Q900/Q950, Q800 uses 0xc000.
This value was provided to the kernel, this explains why it was working
even with wrong value
Signed-off-by: Laurent Vivier
---
hw/m68k/q800.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c
index
Register addr 1 is defined as buffer A with handshake (vBufAH),
register addr 15 is also defined as buffer A without handshake (vBufA).
Linux kernel has a big "DON'T USE!" next to the register 1 addr
definition (vBufAH), and only uses register 15 (vBufA).
So remove the definition of 'anh' and
On 12/12/19 6:29 PM, Paolo Bonzini wrote:
On x86, KVM needs some function from the PCI subsystem in order to set
up interrupt routes. Provide some stubs to support x86 machines that
lack PCI.
Reviewed-by: Sergio Lopez
Signed-off-by: Paolo Bonzini
Reviewed-by: Philippe Mathieu-Daudé
---
This is used by netBSD (and MacOS ROM) to detect the MMU type
Signed-off-by: Laurent Vivier
---
target/m68k/cpu.c| 28 ++--
target/m68k/cpu.h| 4
target/m68k/helper.c | 16 ++--
3 files changed, 40 insertions(+), 8 deletions(-)
diff --git
On 06/12/2019 20:52, Dr. David Alan Gilbert wrote:
> * Laurent Vivier (lviv...@redhat.com) wrote:
>> Commit 1bd71dce4bf2 tries to prevent a finishmigrate -> prelaunch
>> transition by exiting at the beginning of the main_loop_should_exit()
>> function if the state is already finishmigrate.
>>
>>
On Thu, Dec 12, 2019 at 06:33:16PM +0100, Andrew Jones wrote:
> Add 5.0 machine types for arm/i440fx/q35/s390x/spapr.
>
> Signed-off-by: Andrew Jones
>
> ---
>
> Hi Eduardo,
>
> If we need to do something special for i440fx and q35, as
> 9aec2e52ce9d ("hw: add compat machines for 4.2")
On 12/12/19 6:29 PM, Paolo Bonzini wrote:
Remove the need to include i386/pc.h to get to the i8259 functions.
This is enough to remove the inclusion of hw/i386/pc.h from all non-x86
files.
Eh this is very similar to the patch I'v staged for 5.0, now than the
Malta/PC split got merged.
From: Paolo Bonzini
g_test_rand_int provides a reproducible random integer number, using a
different number seed every time but allowing reproduction using the
--seed command line option. It is thus better suited to tests than
g_random_int or random.
Signed-off-by: Paolo Bonzini
Message-Id:
From: Marc-André Lureau
We have a setenv() wrapper in os-win32.c that no one is actually using.
Drop it and change to g_setenv() uniformly.
Signed-off-by: Marc-André Lureau
Signed-off-by: Paolo Bonzini
Message-Id: <1576074210-52834-7-git-send-email-pbonz...@redhat.com>
Reviewed-by: Thomas
Hello,
I'm no expert on PPC KVM and don't have much experience with it myself so
what I say may or may not be correct, it's just my understanding.
Nevertheless I share it in the hope that it may help and maybe those who
know will correct me.
On Thu, Dec 12, 2019 at 1:17 AM Paolo Bonzini
From: Markus Armbruster
Devices "ivshmem-plain" and "ivshmem-doorbell" support only MSI-X.
Config space register Interrupt Pin is zero. Device "ivshmem"
additionally supported legacy INTx, but it was removed in commit
5a0e75f0a9 "hw/misc/ivshmem: Remove deprecated "ivshmem" legacy
device". The
From: Laurent Vivier
On ppc64, migration-test only works with kvm_hv, and we already
have a check to verify the module is loaded.
kvm_hv module can be loaded in memory and /sys/module/kvm_hv exists,
but on some systems (like build systems) /dev/kvm can be missing
(by administrators choice).
We are going to remove the bitrotten bluetooth backend, so we can
not use it in the n800 and n810 machines anymore. Replace the chardev
here with a "null" chardev and stop including the "hw/bt.h" header.
I am not aware of a full working N8x0 environment that can be used to
test these machines,
From: Wainer dos Santos Moschetta
The check-report.html and check-report.xml targets were replaced
with check-report.tap in commit 9df43317b82 but the check-help
text was not updated so it still lists check-report.html.
Fixes: 9df43317b82
Signed-off-by: Wainer dos Santos Moschetta
Message-Id:
From: Cole Robinson
./configure --enable-sdl --audio-drv-list=sdl --enable-modules
Will generate two identical test names: /$arch/module/load/sdl
Which generates an error like:
(tests/modules-test:23814): GLib-ERROR **: 18:23:06.359: duplicate test case
path: /aarch64//module/load/sdl
Add
Since the bluetooth code has been removed, we don't need to test
with this library anymore.
Message-Id: <20191120091014.16883-5-th...@redhat.com>
Acked-by: Paolo Bonzini
Signed-off-by: Thomas Huth
---
.gitlab-ci.yml | 2 +-
tests/docker/dockerfiles/fedora.docker
Hi,
the following changes since commit 52901abf94477b400cf88c1f70bb305e690ba2de:
Update version for v4.2.0-rc5 release (2019-12-10 17:15:21 +)
are available in the Git repository at:
https://gitlab.com/huth/qemu.git tags/pull-request-2019-12-12
for you to fetch changes up to
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