Re: [PATCH] xhci: Fix memory leak in xhci_kick_epctx when poweroff GuestOS

2020-01-12 Thread Gerd Hoffmann
> > diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c > > index 80988bb305..0d3d96d05a 100644 > > --- a/hw/usb/hcd-xhci.c > > +++ b/hw/usb/hcd-xhci.c > > @@ -2000,6 +2000,7 @@ static void xhci_kick_epctx(XHCIEPContext *epctx, > > unsigned int streamid) > > if (xfer != NULL &&

Re: [PATCH 0/5] aspeed: extensions and fixes

2020-01-12 Thread Cédric Le Goater
On 1/7/20 8:34 AM, Cédric Le Goater wrote: > Hi, > > Here is a short series adding : > > - a new eMMC controller model for the AST2600 SoC (Andrew) > - accessors to control the led state of the pca9552 device (Joel) > - a 'execute-in-place' property to boot directly from CE0 There is a

Re: [PATCH 04/15] hw/ppc/spapr_rtas: Restrict variables scope to single switch case

2020-01-12 Thread David Gibson
On Fri, Jan 10, 2020 at 10:50:55AM +0100, Greg Kurz wrote: > On Fri, 10 Jan 2020 10:34:07 +0100 > Philippe Mathieu-Daudé wrote: > > > On 1/9/20 6:43 PM, Greg Kurz wrote: > > > On Thu, 9 Jan 2020 16:21:22 +0100 > > > Philippe Mathieu-Daudé wrote: > > > > > >> We only access these variables in

Re: [PATCH qemu v4] spapr: Kill SLOF

2020-01-12 Thread David Gibson
On Fri, Jan 10, 2020 at 11:51:32AM +1100, Alexey Kardashevskiy wrote: > > > On 10/01/2020 10:32, Alexey Kardashevskiy wrote: > > > > > > On 10/01/2020 10:05, Alexey Kardashevskiy wrote: > >> > >> > >> On 08/01/2020 17:18, Alexey Kardashevskiy wrote: > >>> The Petitboot bootloader is way more

Re: [PATCH 0/4] qmp: Optionally run handlers in coroutines

2020-01-12 Thread Marc-André Lureau
Hi On Thu, Jan 9, 2020 at 10:36 PM Kevin Wolf wrote: > > Some QMP command handlers can block the main loop for a relatively long > time, for example because they perform some I/O. This is quite nasty. > Allowing such handlers to run in a coroutine where they can yield (and > therefore release

[PATCH] scsi-disk: define props in scsi_block_disk to avoid memleaks

2020-01-12 Thread pannengyuan
From: Pan Nengyuan scsi_block_realize() use scsi_realize() to init some props, but these props is not defined in scsi_block_disk_properties, so they will not be freed. This patch defines these prop in scsi_block_disk_properties and aslo calls scsi_unrealize to avoid memleaks, the leak stack as

Re: [PATCH v1 0/5] vhost-user block device backend implementation

2020-01-12 Thread no-reply
Patchew URL: https://patchew.org/QEMU/20200113045704.12318-1-coiby...@gmail.com/ Hi, This series failed the docker-mingw@fedora build test. Please find the testing commands and their output below. If you have Docker installed, you can probably reproduce it locally. === TEST SCRIPT BEGIN ===

[PATCH v1 4/5] new qTest case for the vhost-user-blk device backend

2020-01-12 Thread Coiby Xu
This test case has the same tests as tests/virtio-blk-test.c except for tests have block_resize. Signed-off-by: Coiby Xu --- tests/libqos/vhost-user-blk.c | 125 ++ tests/libqos/vhost-user-blk.h | 44 +++ tests/vhost-user-blk-test.c | 691 ++ 3 files

[PATCH v1 5/5] building configuration files changes

2020-01-12 Thread Coiby Xu
Signed-off-by: Coiby Xu --- Makefile | 1 + Makefile.objs | 2 +- Makefile.target| 1 + configure | 2 +- tests/Makefile.include | 5 - 5 files changed, 8 insertions(+), 3 deletions(-) diff --git a/Makefile b/Makefile index 6b5ad1121b..1b98201d29

[PATCH v1 2/5] extend libvhost to support IOThread

2020-01-12 Thread Coiby Xu
Previously libvhost dispatch events in its own GMainContext. Now vhost-user client's kick event can be dispatched in block device drive's AioContext thus IOThread is supported. Signed-off-by: Coiby Xu --- contrib/libvhost-user/libvhost-user.c | 64 ++-

[PATCH v1 3/5] a standone-alone tool to directly share disk image file via vhost-user protocol

2020-01-12 Thread Coiby Xu
vhost-user-blk can have played as vhost-user backend but it only supports raw file and don't support VIRTIO_BLK_T_DISCARD and VIRTIO_BLK_T_WRITE_ZEROES operations on raw file (ioctl(fd, BLKDISCARD) is only valid for real block device). Signed-off-by: Coiby Xu --- qemu-vu.c | 264

[PATCH v1 0/5] vhost-user block device backend implementation

2020-01-12 Thread Coiby Xu
This patch series is an implementation of vhost-user-backend server, thanks to Stefan's guidance after reviewing the draft version and the instructions on https://wiki.qemu.org/Google_Summer_of_Code_2019#vhost-user-blk_device_backend, Vhost-user-backend server is a UserCreatable object and

[PATCH v1 1/5] vhost-user block device backend

2020-01-12 Thread Coiby Xu
By making use of libvhost, multiple block device drives can be exported and each drive can serve multiple clients simultaneously. Since vhost-user-server needs a block drive to be created first, delay the creation of this object. Signed-off-by: Coiby Xu --- blockdev-vu.c | 1008

Re: [PATCH qemu v2] spapr: Kill SLOF

2020-01-12 Thread David Gibson
On Thu, Jan 09, 2020 at 05:31:24PM +1100, Alexey Kardashevskiy wrote: > > > On 09/01/2020 15:07, David Gibson wrote: > > On Wed, Jan 08, 2020 at 03:07:41PM +1100, Alexey Kardashevskiy wrote: > >> > >> > >> On 07/01/2020 16:26, David Gibson wrote: > >> > +static uint32_t

Re: [PATCH v2 09/10] target/ppc: Correct RMLS table

2020-01-12 Thread David Gibson
On Thu, Jan 09, 2020 at 06:46:19PM +1100, Alexey Kardashevskiy wrote: > > > On 08/01/2020 12:06, David Gibson wrote: > > On Tue, Jan 07, 2020 at 03:21:42PM +0100, Cédric Le Goater wrote: > >> On 1/7/20 5:48 AM, David Gibson wrote: > >>> The table of RMA limits based on the LPCR[RMLS] field is

Re: [PATCH v2 05/10] spapr, ppc: Remove VPM0/RMLS hacks for POWER9

2020-01-12 Thread David Gibson
On Thu, Jan 09, 2020 at 06:33:36PM +1100, Alexey Kardashevskiy wrote: > > > On 07/01/2020 15:48, David Gibson wrote: > > For the "pseries" machine, we use "virtual hypervisor" mode where we only > > model the CPU in non-hypervisor privileged mode. This means that we need > > guest physical

Re: [PATCH 03/15] hw/ppc/spapr_rtas: Access MachineState via SpaprMachineState argument

2020-01-12 Thread David Gibson
On Thu, Jan 09, 2020 at 04:21:21PM +0100, Philippe Mathieu-Daudé wrote: > We received a SpaprMachineState argument. Since SpaprMachineState > inherits of MachineState, use it instead of calling qdev_get_machine. > > Signed-off-by: Philippe Mathieu-Daudé Acked-by: David Gibson > --- >

Re: [PATCH 02/15] hw/ppc/spapr_rtas: Use local MachineState variable

2020-01-12 Thread David Gibson
On Thu, Jan 09, 2020 at 04:21:20PM +0100, Philippe Mathieu-Daudé wrote: > Since we have the MachineState already available locally, > ues it instead of the global current_machine. > > Signed-off-by: Philippe Mathieu-Daudé Acked-by: David Gibson > --- > hw/ppc/spapr_rtas.c | 2 +- > 1 file

Re: [PATCH V2] vhost-user-test: fix a memory leak

2020-01-12 Thread Pan Nengyuan
On 1/12/2020 6:39 PM, Thomas Huth wrote: > On 10/01/2020 15.07, Thomas Huth wrote: >> On 20/12/2019 02.26, pannengy...@huawei.com wrote: >>> From: Pan Nengyuan >>> >>> Spotted by ASAN. >>> >>> Reported-by: Euler Robot >>> Signed-off-by: Pan Nengyuan >>> --- >>> Changes V2 to V1: >>> - use a

[Bug 1851972] Re: pc-q35-4.1 and AMD Navi 5700/XT incompatible

2020-01-12 Thread Joey Adams
Commit 11bc4a13 (Nov 13, 2019, merged after v4.2.0-rc5) moved the kernel-irqchip parameter to -accel, but I think the default was inadvertently changed to off. The documentation was changed to say the default is on, but the code change seems to have done the opposite. I found this when I tested

Re: [PATCH] migration/postcopy: not necessary to discard all RAM at the beginning

2020-01-12 Thread Wei Yang
Oops, this one seems to be missed. On Mon, Oct 07, 2019 at 05:10:08PM +0800, Wei Yang wrote: >ram_discard_range() unmap page for specific range. To be specific, this >clears related page table entries so that userfault would be triggered. >But this step is not necessary at the very beginning. >

[Bug 1859384] Re: arm gic: interrupt model never 1 on non-mpcore and race condition in gic_acknowledge_irq

2020-01-12 Thread Alex Longwall
** Summary changed: - arm gicv2: interrupt model never 1 on non-mpcore and race condition in gic_acknowledge_irq + arm gic: interrupt model never 1 on non-mpcore and race condition in gic_acknowledge_irq ** Tags removed: gicv2 ** Tags added: gic -- You received this bug notification because

[Bug 1859384] [NEW] arm gic: interrupt model never 1 on non-mpcore and race condition in gic_acknowledge_irq

2020-01-12 Thread Alex Longwall
Public bug reported: For a 1-N interrupt (any SPI on the GICv2), as mandated by the TRM, only one CPU can acknowledge the IRQ until it becomes inactive. The TRM also mandates that SGIs and PPIs follow the N-N model and that SPIs follow the 1-N model. However this is not currently the case with

[Bug 1859378] Re: xhci Control Transfer requiring a Status TRB before starting transfer

2020-01-12 Thread Benjamin David Lunt
Just a little more information. In section 4.11.2.2, page 159 of version 1.0 of the xHCI specification, it states: • The xHC shall NOT check for the following Control transfer error conditions. • If a Data Stage TD follows a Setup Stage TD, where wLength = ‘0’. • If a Status Stage TD does

[Bug 1859378] Re: xhci Control Transfer requiring a Status TRB before starting transfer

2020-01-12 Thread Benjamin David Lunt
Removing this check will indeed require a bit of a re-write. The way the code is now, the transfer expects a SETUP packet to be first. If you remove the check I ask about above, will the next transfer show that it is the STATUS packet? If so, then the check at line 1696 will indeed catch and

[Bug 1859378] [NEW] xhci Control Transfer requiring a Status TRB before starting transfer

2020-01-12 Thread Benjamin David Lunt
Public bug reported: This may not necessarily be a bug, but more of a change. A little background may need to be in order. With all USB Control transfers, there is a SETUP transfer, zero or more DATA transfers, and if successful, a STATUS transfer. This STATUS transfer is used to indicate to

[Bug 1859359] Re: xHCI and event ring handling

2020-01-12 Thread Benjamin David Lunt
My apologizes. I forgot that it was 2^ERSTMAX. I really need to get some sleep :-) -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1859359 Title: xHCI and event ring handling Status in QEMU:

[Bug 1859359] Re: xHCI and event ring handling

2020-01-12 Thread Benjamin David Lunt
Please note that the current code reports zero (0) https://git.qemu.org/?p=qemu.git;a=blob;f=hw/usb/hcd-xhci.c#l2737 Bits 7:4 is this limit and the current code has these bits as zero. -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to

Re: [PATCH 2/5] hw/arm: ast2600: Wire up the eMMC controller

2020-01-12 Thread Andrew Jeffery
On Fri, 10 Jan 2020, at 22:26, Cédric Le Goater wrote: > >> + > >> +    sysbus_init_child_obj(obj, "emmc", OBJECT(>emmc), sizeof(s->emmc), > >> +  TYPE_ASPEED_SDHCI); > >> + > >> +    object_property_set_int(OBJECT(>emmc), 1, "num-slots", > >> _abort); > >> + > >> +   

[Bug 1859359] Re: xHCI and event ring handling

2020-01-12 Thread Benjamin David Lunt
I failed to note above that the HCSPARAMS2 register does indeed limit the count of segments in the Event Ring. I guess as long as you never change this value from one (1) you will be okay. However, the spurious interrupt stuff still stands as a bug. Thank you, Ben -- You received this bug

Ping: [PATCH v2] Implement the Screamer sound chip for the mac99 machine type

2020-01-12 Thread John Arbuckle
Ping https://patchwork.kernel.org/patch/11311763/ This patch enables the playback of audio on a Mac OS 9 or Mac OS X guest. Signed-off-by: John Arbuckle --- v2 changes: - Fixed a bug that prevented the sampling rate from being changed. hw/audio/Kconfig | 3 +

Re: plugin order of registration and order of callback

2020-01-12 Thread Peter Maydell
On Fri, 10 Jan 2020 at 12:15, Alex Bennée wrote: > With that in mind we should say instruction callbacks are always before > the instruction executes. The reason being is some instructions can > fault and exit the run loop so any instrumentation inserted afterwards > will never execute. I

[Bug 1859359] [NEW] xHCI and event ring handling

2020-01-12 Thread Benjamin David Lunt
Public bug reported: I believe that the Event Ring handling in QEMU is not correct. For example, an Event Ring may have multiple segments. However, the code in xhci_write_event() (https://git.qemu.org/?p=qemu.git;a=blob;f=hw/usb /hcd-xhci.c;hb=HEAD#l645), starting with line 668, seems to only

Re: [PATCH v40 00/21] QEMU AVR 8 bit cores

2020-01-12 Thread Michael Rolnik
Hi all, any news? Regards, Michael Rolnik On Sun, Dec 29, 2019 at 1:52 PM Michael Rolnik wrote: > This series of patches adds 8bit AVR cores to QEMU. > All instruction, except BREAK/DES/SPM/SPMX, are implemented. Not fully > tested yet. > However I was able to execute simple code with

Re: [PATCH v28 00/22] Add RX archtecture support

2020-01-12 Thread no-reply
Patchew URL: https://patchew.org/QEMU/20200112124913.94959-1-ys...@users.sourceforge.jp/ Hi, This series seems to have some coding style problems. See output below for more information: Subject: [PATCH v28 00/22] Add RX archtecture support Type: series Message-id:

Re: [PATCH 10/15] memory: Replace current_machine by qdev_get_machine()

2020-01-12 Thread Philippe Mathieu-Daudé
On 1/12/20 10:48 AM, Alistair Francis wrote: On Thu, Jan 9, 2020 at 11:29 PM Philippe Mathieu-Daudé wrote: As we want to remove the global current_machine, replace 'current_machine' by MACHINE(qdev_get_machine()). Signed-off-by: Philippe Mathieu-Daudé --- memory.c | 4 +++- 1 file

Re: [PATCH v28 00/22] Add RX archtecture support

2020-01-12 Thread no-reply
Patchew URL: https://patchew.org/QEMU/20200112124913.94959-1-ys...@users.sourceforge.jp/ Hi, This series seems to have some coding style problems. See output below for more information: Subject: [PATCH v28 00/22] Add RX archtecture support Type: series Message-id:

[PATCH v28 04/22] target/rx: TCG translation

2020-01-12 Thread Yoshinori Sato
This part only supported RXv1 instructions. Instruction manual. https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01us0032ej0120_rxsm.pdf Signed-off-by: Yoshinori Sato Reviewed-by: Richard Henderson Tested-by: Philippe Mathieu-Daudé Message-Id:

[PATCH v28 07/22] target/rx: RX disassembler

2020-01-12 Thread Yoshinori Sato
Signed-off-by: Yoshinori Sato Reviewed-by: Richard Henderson Tested-by: Philippe Mathieu-Daudé Message-Id: <20190607091116.49044-5-ys...@users.sourceforge.jp> Signed-off-by: Richard Henderson --- include/disas/dis-asm.h |5 + target/rx/disas.c | 1480

[PATCH v28 17/22] hw/rx: RX Target hardware definition

2020-01-12 Thread Yoshinori Sato
rx62n - RX62N cpu. rx-virt - RX QEMU virtual target. v23 changes. Add missing includes. v21 changes. rx_load_image move to rx-virt.c Signed-off-by: Yoshinori Sato Message-Id: <20190616142836.10614-17-ys...@users.sourceforge.jp> Tested-by: Philippe Mathieu-Daudé Reviewed-by: Philippe

[PATCH v28 16/22] hw/char: RX62N serial communication interface (SCI)

2020-01-12 Thread Yoshinori Sato
This module supported only non FIFO type. Hardware manual. https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf Signed-off-by: Yoshinori Sato Reviewed-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Message-Id:

[PATCH v28 18/22] hw/rx: Honor -accel qtest

2020-01-12 Thread Yoshinori Sato
From: Richard Henderson Issue an error if no kernel, no bios, and not qtest'ing. Fixes make check-qtest-rx: test/qom-test. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Yoshinori Sato Message-Id: <20190607091116.49044-16-ys...@users.sourceforge.jp> Tested-by: Philippe Mathieu-Daudé

[PATCH v28 20/22] Add rx-softmmu

2020-01-12 Thread Yoshinori Sato
Tested-by: Philippe Mathieu-Daudé Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Yoshinori Sato Message-Id: <20190607091116.49044-17-ys...@users.sourceforge.jp> Signed-off-by: Richard Henderson pick ed65c02993 target/rx: Add RX to SysEmuTarget pick 01372568ae tests: Add rx to

[PATCH v28 19/22] hw/rx: Restrict the RX62N microcontroller to the RX62N CPU core

2020-01-12 Thread Yoshinori Sato
From: Philippe Mathieu-Daudé While the VIRT machine can use different microcontrollers, the RX62N microcontroller is tied to the RX62N CPU core. Signed-off-by: Philippe Mathieu-Daudé Signed-off-by: Yoshinori Sato --- hw/rx/rx-virt.c | 8 1 file changed, 8 insertions(+) diff --git

[PATCH v28 05/22] target/rx: TCG helper

2020-01-12 Thread Yoshinori Sato
Signed-off-by: Yoshinori Sato Message-Id: <20190616142836.10614-3-ys...@users.sourceforge.jp> Reviewed-by: Richard Henderson Message-Id: <20190607091116.49044-3-ys...@users.sourceforge.jp> Tested-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson [PMD: Removed tlb_fill, extracted

[PATCH v28 15/22] hw/timer: RX62N internal timer modules

2020-01-12 Thread Yoshinori Sato
renesas_tmr: 8bit timer modules. renesas_cmt: 16bit compare match timer modules. This part use many renesas's CPU. Hardware manual. https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf Signed-off-by: Yoshinori Sato Reviewed-by: Alex Bennée Reviewed-by:

[PATCH v28 06/22] target/rx: CPU definition

2020-01-12 Thread Yoshinori Sato
Signed-off-by: Yoshinori Sato Message-Id: <20190616142836.10614-4-ys...@users.sourceforge.jp> Reviewed-by: Richard Henderson Message-Id: <20190607091116.49044-4-ys...@users.sourceforge.jp> Signed-off-by: Richard Henderson [PMD: Use newer QOM style, split cpu-qom.h, restrict access to extable

[PATCH v28 13/22] target/rx: Dump bytes for each insn during disassembly

2020-01-12 Thread Yoshinori Sato
From: Richard Henderson There are so many different forms of each RX instruction that it will be very useful to be able to look at the bytes to see on which path a bug may lie. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Yoshinori Sato Signed-off-by: Yoshinori Sato Message-Id:

[PATCH v28 21/22] BootLinuxConsoleTest: Test the RX-Virt machine

2020-01-12 Thread Yoshinori Sato
From: Philippe Mathieu-Daudé Add two tests for the rx-virt machine, based on the recommended test setup from Yoshinori Sato: https://lists.gnu.org/archive/html/qemu-devel/2019-05/msg03586.html - U-Boot prompt - Linux kernel with Sash shell These are very quick tests: $ avocado run -t

[PATCH v28 08/22] target/rx: Disassemble rx_index_addr into a string

2020-01-12 Thread Yoshinori Sato
From: Richard Henderson We were eliding all zero indexes. It is only ld==0 that does not have an index in the instruction. This also allows us to avoid breaking the final print into multiple pieces. Reviewed-by: Yoshinori Sato Signed-off-by: Yoshinori Sato Message-Id:

[PATCH v28 14/22] hw/intc: RX62N interrupt controller (ICUa)

2020-01-12 Thread Yoshinori Sato
This implementation supported only ICUa. Hardware manual. https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf Signed-off-by: Yoshinori Sato Reviewed-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Message-Id:

[PATCH v28 09/22] target/rx: Replace operand with prt_ldmi in disassembler

2020-01-12 Thread Yoshinori Sato
From: Richard Henderson This has consistency with prt_ri(). It loads all data before beginning output. It uses exactly one call to prt() to emit the full instruction. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Yoshinori Sato Signed-off-by: Yoshinori Sato Message-Id:

[PATCH v28 00/22] Add RX archtecture support

2020-01-12 Thread Yoshinori Sato
changes. Cleanup cpu.c. simplify rx_cpu_class_by_name and rx_load_image move to rx-virt. My git repository is bellow. git://git.pf.osdn.net/gitroot/y/ys/ysato/qemu.git tags/rx-20200112 Testing binaries bellow. u-boot Download - https://osdn.net/users/ysato/pf/qemu/dl/u-boot.bin.gz starting $ gzip

[PATCH v28 12/22] target/rx: Collect all bytes during disassembly

2020-01-12 Thread Yoshinori Sato
From: Richard Henderson Collected, to be used in the next patch. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Yoshinori Sato Signed-off-by: Yoshinori Sato Message-Id: <20190607091116.49044-23-ys...@users.sourceforge.jp> Tested-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson

[PATCH v28 03/22] hw/registerfields.h: Add 8bit and 16bit register macros

2020-01-12 Thread Yoshinori Sato
From: Philippe Mathieu-Daudé Some RX peripheral using 8bit and 16bit registers. Added 8bit and 16bit APIs. Signed-off-by: Yoshinori Sato Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20190607091116.49044-11-ys...@users.sourceforge.jp> Tested-by: Philippe

[PATCH v28 22/22] qemu-doc.texi: Add RX section.

2020-01-12 Thread Yoshinori Sato
Signed-off-by: Yoshinori Sato --- qemu-doc.texi | 25 + 1 file changed, 25 insertions(+) diff --git a/qemu-doc.texi b/qemu-doc.texi index 39f950471f..81f76074c4 100644 --- a/qemu-doc.texi +++ b/qemu-doc.texi @@ -1741,6 +1741,7 @@ differences are mentioned in the

[PATCH v28 01/22] MAINTAINERS: Add RX

2020-01-12 Thread Yoshinori Sato
Signed-off-by: Yoshinori Sato Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20190607091116.49044-18-ys...@users.sourceforge.jp> Signed-off-by: Richard Henderson --- MAINTAINERS | 19 +++ 1 file changed, 19 insertions(+) diff --git

[PATCH v28 02/22] qemu/bitops.h: Add extract8 and extract16

2020-01-12 Thread Yoshinori Sato
Signed-off-by: Yoshinori Sato Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20190607091116.49044-10-ys...@users.sourceforge.jp> Tested-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- include/qemu/bitops.h | 38

[PATCH v28 11/22] target/rx: Emit all disassembly in one prt()

2020-01-12 Thread Yoshinori Sato
From: Richard Henderson Many of the multi-part prints have been eliminated by previous patches. Eliminate the rest of them. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Yoshinori Sato Signed-off-by: Yoshinori Sato Message-Id: <20190607091116.49044-22-ys...@users.sourceforge.jp>

[PATCH v28 10/22] target/rx: Use prt_ldmi for XCHG_mr disassembly

2020-01-12 Thread Yoshinori Sato
From: Richard Henderson Note that the ld == 3 case handled by prt_ldmi is decoded as XCHG_rr and cannot appear here. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Yoshinori Sato Signed-off-by: Yoshinori Sato Message-Id: <20190607091116.49044-21-ys...@users.sourceforge.jp> Tested-by:

[PULL v2 6/8] tests/Makefile: Move qtest-related settings to a separate Makefile.include

2020-01-12 Thread Thomas Huth
tests/Makefile.include is pretty much overcrowded. Now that we have a dedicated folder for the qtests, let's move the related settings to a Makefile.include file in that directory instead. Message-Id: <20191218103059.11729-7-th...@redhat.com> Reviewed-by: Paolo Bonzini Signed-off-by: Thomas Huth

[PULL v2 3/8] tests/Makefile: Remove 'tests/' and '$(EXESUF)' from the check-qtest variables

2020-01-12 Thread Thomas Huth
It's much easier if we simply add the folder prefix and the exe suffix later via a substitution instead. Message-Id: <20191218103059.11729-4-th...@redhat.com> Reviewed-by: Paolo Bonzini Signed-off-by: Thomas Huth --- tests/Makefile.include | 256 + 1

[PULL v2 5/8] test: Move qtests to a separate directory

2020-01-12 Thread Thomas Huth
The tests directory itself is pretty overcrowded, and it's hard to see which test belongs to which test subsystem (unit, qtest, ...). Let's move the qtests to a separate folder for more clarity. Message-Id: <20191218103059.11729-6-th...@redhat.com> Reviewed-by: Paolo Bonzini Signed-off-by:

[PULL v2 0/8] qtests and docs

2020-01-12 Thread Thomas Huth
Hi Peter! The following changes since commit dc65a5bdc9fa543690a775b50d4ffbeb22c56d6d: Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-5.0-20200108' into staging (2020-01-10 16:15:04 +) are available in the Git repository at: https://gitlab.com/huth/qemu.git

Re: [PULL 0/8] qtests and docs

2020-01-12 Thread Thomas Huth
On 10/01/2020 12.19, Peter Maydell wrote: > On Tue, 7 Jan 2020 at 19:08, Thomas Huth wrote: >> >> Hi! >> >> The following changes since commit f4d8cf148e43d942ef1202071e0cd66ce40322e0: >> >> Merge remote-tracking branch 'remotes/maxreitz/tags/pull-block-2020-01-06' >> into staging (2020-01-06

Re: [PATCH V2] vhost-user-test: fix a memory leak

2020-01-12 Thread Thomas Huth
On 10/01/2020 15.07, Thomas Huth wrote: > On 20/12/2019 02.26, pannengy...@huawei.com wrote: >> From: Pan Nengyuan >> >> Spotted by ASAN. >> >> Reported-by: Euler Robot >> Signed-off-by: Pan Nengyuan >> --- >> Changes V2 to V1: >> - use a "goto cleanup", instead of duplicating the "free"

Re: [PATCH 10/15] memory: Replace current_machine by qdev_get_machine()

2020-01-12 Thread Alistair Francis
On Thu, Jan 9, 2020 at 11:29 PM Philippe Mathieu-Daudé wrote: > > As we want to remove the global current_machine, > replace 'current_machine' by MACHINE(qdev_get_machine()). > > Signed-off-by: Philippe Mathieu-Daudé > --- > memory.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) >

Re: [PATCH 09/15] device_tree: Replace current_machine by qdev_get_machine()

2020-01-12 Thread Alistair Francis
On Thu, Jan 9, 2020 at 11:34 PM Philippe Mathieu-Daudé wrote: > > As we want to remove the global current_machine, > replace 'current_machine' by MACHINE(qdev_get_machine()). > > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Alistair > --- > device_tree.c | 4 +++- > 1

Re: [PATCH 08/15] target/arm/monitor: Replace current_machine by qdev_get_machine()

2020-01-12 Thread Alistair Francis
On Thu, Jan 9, 2020 at 11:23 PM Philippe Mathieu-Daudé wrote: > > As we want to remove the global current_machine, > replace 'current_machine' by MACHINE(qdev_get_machine()). > > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Alistair > --- > target/arm/monitor.c | 3

Re: [PATCH 07/15] hw/core/machine-qmp-cmds: Replace current_machine by qdev_get_machine()

2020-01-12 Thread Alistair Francis
On Thu, Jan 9, 2020 at 11:30 PM Philippe Mathieu-Daudé wrote: > > As we want to remove the global current_machine, > replace MACHINE_GET_CLASS(current_machine) by > MACHINE_GET_CLASS(qdev_get_machine()). > > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Alistair > --- >

Re: [PATCH 06/15] migration/savevm: Replace current_machine by qdev_get_machine()

2020-01-12 Thread Alistair Francis
On Thu, Jan 9, 2020 at 11:30 PM Philippe Mathieu-Daudé wrote: > > As we want to remove the global current_machine, > replace MACHINE_GET_CLASS(current_machine) by > MACHINE_GET_CLASS(qdev_get_machine()). > > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Alistair > --- >

Re: [PATCH 05/15] device-hotplug: Replace current_machine by qdev_get_machine()

2020-01-12 Thread Alistair Francis
On Thu, Jan 9, 2020 at 11:27 PM Philippe Mathieu-Daudé wrote: > > As we want to remove the global current_machine, > replace MACHINE_GET_CLASS(current_machine) by > MACHINE_GET_CLASS(qdev_get_machine()). > > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Alistair > --- >