For FMV.W.X that moves the lower 32 bits of an integer register to a
floating-point register, Rd should encoded with NoN-boxing scheme.
Note: This applies to RV64 only.
Signed-off-by: Ian Jiang
---
target/riscv/insn_trans/trans_rvf.inc.c | 1 +
1 file changed, 1 insertion(+)
diff --git
On 21/01/2020 22.38, Philippe Mathieu-Daudé wrote:
> Missed in 870c034da0b, hopefully reported by Coverity.
>
> Fixes: Coverity CID 1412793 (Incorrect expression)
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/misc/stm32f4xx_syscfg.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Signed-off-by: David Stevens
---
virtio-gpu.tex | 30 ++
1 file changed, 30 insertions(+)
diff --git a/virtio-gpu.tex b/virtio-gpu.tex
index af4ca61..a1f0210 100644
--- a/virtio-gpu.tex
+++ b/virtio-gpu.tex
@@ -186,12 +186,16 @@ \subsubsection{Device Operation:
This RFC comes from the recent discussion on buffer sharing [1],
specifically about the need to share resources between different
virtio devices. For a concrete use case, this can be used to share
virtio-gpu allocated buffers with the recently proposed virtio video
device [2], without the need to
Define a mechanism for sharing objects between different virtio
devices.
Signed-off-by: David Stevens
---
content.tex | 18 ++
1 file changed, 18 insertions(+)
diff --git a/content.tex b/content.tex
index b1ea9b9..6c6dd59 100644
--- a/content.tex
+++ b/content.tex
@@ -373,6
On 22/01/2020 17:32, David Gibson wrote:
> On Tue, Jan 21, 2020 at 06:25:36PM +1100, Alexey Kardashevskiy wrote:
>>
>>
>> On 21/01/2020 16:11, David Gibson wrote:
>>> On Fri, Jan 10, 2020 at 01:09:25PM +1100, Alexey Kardashevskiy wrote:
The Petitboot bootloader is way more advanced than
Patchew URL: https://patchew.org/QEMU/20200122064907.512501-1-...@redhat.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20200122064907.512501-1-...@redhat.com
Subject: [PULL v2 00/17] virtio, pc: fixes, features
From: "Dr. David Alan Gilbert"
Add the memory region names to section rounding/alignment
warnings.
Signed-off-by: Dr. David Alan Gilbert
Message-Id: <20200116202414.157959-2-dgilb...@redhat.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
hw/virtio/vhost.c | 7
On Tue, Jan 21, 2020 at 10:32:55AM +0100, Greg Kurz wrote:
> On Tue, 21 Jan 2020 14:43:32 +1100
> David Gibson wrote:
>
> > On Mon, Jan 20, 2020 at 09:04:38AM +0100, Greg Kurz wrote:
> > > On Fri, 17 Jan 2020 16:44:27 +0100
> > > Greg Kurz wrote:
> > >
> > > > On Fri, 17 Jan 2020 19:16:08
From: Corey Minyard
Per the ACPI spec (version 6.1, section 6.1.5 _HID) it is not required
on enumerated buses (like PCI in this case), _ADR is required (and is
already there). And the _HID value is wrong. Linux appears to ignore
the _HID entry, but Windows 10 detects it as 'Unknown Device'
From: Pan Nengyuan
Use virtio_delete_queue to make it more clear.
Signed-off-by: Pan Nengyuan
Message-Id: <20200117075547.60864-3-pannengy...@huawei.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
Reviewed-by: Stefan Hajnoczi
---
hw/scsi/virtio-scsi.c | 6 +++---
1
From: "Dr. David Alan Gilbert"
I added hugepage alignment code in c1ece84e7c9 to deal with
vhost-user + postcopy which needs aligned pages when using userfault.
However, on x86 the lower 2MB of address space tends to be shotgun'd
with small fragments around the 512-640k range - e.g. video RAM,
From: Pan Nengyuan
Use virtio_delete_queue to make it more clear.
Signed-off-by: Pan Nengyuan
Message-Id: <20200117060927.51996-3-pannengy...@huawei.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
Acked-by: Christian Schoenebeck
---
hw/9pfs/virtio-9p-device.c | 2 +-
From: Pan Nengyuan
Receive/transmit/event vqs forgot to cleanup in vhost_vsock_unrealize. This
patch save receive/transmit vq pointer in realize() and cleanup vqs
through those vq pointers in unrealize(). The leak stack is as follow:
Direct leak of 21504 byte(s) in 3 object(s) allocated from:
From: Igor Mammedov
Document work-flows for
* enabling/detecting modern CPU hotplug interface
* finding a CPU with pending 'insert/remove' event
* enumerating present and possible CPUs
Signed-off-by: Igor Mammedov
Message-Id: <1575896942-331151-9-git-send-email-imamm...@redhat.com>
From: Pan Nengyuan
v->vq forgot to cleanup in virtio_9p_device_unrealize, the memory leak
stack is as follow:
Direct leak of 14336 byte(s) in 2 object(s) allocated from:
#0 0x7f819ae43970 (/lib64/libasan.so.5+0xef970) ??:?
#1 0x7f819872f49d (/lib64/libglib-2.0.so.0+0x5249d) ??:?
#2
From: Igor Mammedov
No functional change in practice, patch only aims to properly
document (in spec and code) intended usage of the reserved space.
The new field is to be used for 2 purposes:
- detection of modern CPU hotplug interface using
CPHP_GET_NEXT_CPU_WITH_EVENT_CMD command.
From: Pan Nengyuan
This patch fix memleaks when attaching/detaching virtio-scsi device, the
memory leak stack is as follow:
Direct leak of 21504 byte(s) in 3 object(s) allocated from:
#0 0x7f491f2f2970 (/lib64/libasan.so.5+0xef970) ??:?
#1 0x7f491e94649d (/lib64/libglib-2.0.so.0+0x5249d)
On Tue, Jan 21, 2020 at 10:23:32PM -0800, no-re...@patchew.org wrote:
> Patchew URL: https://patchew.org/QEMU/20200122055115.429945-1-...@redhat.com/
>
>
>
> Hi,
>
> This series failed the docker-quick@centos7 build test. Please find the
> testing commands and
> their output below. If you
From: Igor Mammedov
Correct returned value description in case 'Command field' == 0x0,
it's not PXM but CPU selector value with pending event
In addition describe 0 blanket value in case of not supported
'Command field' value.
Signed-off-by: Igor Mammedov
Reviewed-by: Laszlo Ersek
From: Igor Mammedov
Firmware can enumerate present at boot APs by broadcasting wakeup IPI,
so that woken up secondary CPUs could register them-selves.
However in CPU hotplug case, it would need to know architecture
specific CPU IDs for possible and hotplugged CPUs so it could
prepare environment
Document the flow for the case where contributor
updates the expected files.
Signed-off-by: Michael S. Tsirkin
---
tests/qtest/bios-tables-test.c | 23 ++-
1 file changed, 18 insertions(+), 5 deletions(-)
diff --git a/tests/qtest/bios-tables-test.c
From: Igor Mammedov
Write section of 'Command data' register should describe what happens
when it's written into. Correct description in case the last stored
'Command field' value is equal to 0, to reflect that currently it's not
supported.
Signed-off-by: Igor Mammedov
Reviewed-by: Laszlo
From: Igor Mammedov
* Move reserved registers to the top of the section, so reader would be
aware of effects when reading registers description.
* State registers endianness explicitly at the beginning of the section
* Describe registers behavior in case of 'CPU selector' register contains
From: Igor Mammedov
It's not what real HW does, implementing which would be overkill [**]
and would require complex cross stack changes (QEMU+firmware) to make
it work.
So considering that SMRAM is owned by MCH, for simplicity (ab)use
reserved Q35 register, which allows QEMU and firmware easily
Changes from v1:
- add a missing expected file
The following changes since commit 3e08b2b9cb64bff2b73fa9128c0e49bfcde0dd40:
Merge remote-tracking branch 'remotes/philmd-gitlab/tags/edk2-next-20200121'
into staging (2020-01-21 15:29:25 +)
are available in the Git repository at:
git
From: Igor Mammedov
test lockable SMRAM at default SMBASE feature, introduced by
patch "q35: implement 128K SMRAM at default SMBASE address"
Signed-off-by: Igor Mammedov
Message-Id: <1575899217-333105-1-git-send-email-imamm...@redhat.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael
> From: "Dr. David Alan Gilbert"
>
> Add options to specify parameters for virtio-fs paths, i.e.
>
> ./virtiofsd -o vhost_user_socket=/tmp/vhostqemu
>
> Signed-off-by: Dr. David Alan Gilbert
Reviewed-by: Misono Tomohiro
在 2020/1/22 13:39, Michael S. Tsirkin 写道:
On Thu, Dec 19, 2019 at 02:47:58PM +0800, Heyi Guo wrote:
The sub device "PR0" under PCI0 in ACPI/DSDT does not make any sense,
so simply remote it.
Signed-off-by: Heyi Guo
So given this has no methods except _ADR, I think it's
safe to remove:
Dne 21. 01. 20 v 10:15 Philippe Mathieu-Daudé napsal(a):
> Hello,
>
> Today I ran out of space in my /home, I ran the 'baobab' tool and while the
> first bigger directory was obvious to me (~/.ccache), the second wasn't:
> ~/avocado/data/cache/by_location/, with various GiB.
>
> Note, this
On Tue, Jan 21, 2020 at 06:25:36PM +1100, Alexey Kardashevskiy wrote:
>
>
> On 21/01/2020 16:11, David Gibson wrote:
> > On Fri, Jan 10, 2020 at 01:09:25PM +1100, Alexey Kardashevskiy wrote:
> >> The Petitboot bootloader is way more advanced than SLOF is ever going to
> >> be as Petitboot comes
Kevin Wolf writes:
> This patch adds a new 'coroutine' flag to QMP command definitions that
> tells the QMP dispatcher that the command handler is safe to be run in a
> coroutine.
I'm afraid I missed this question in my review of v3: when is a handler
*not* safe to be run in a coroutine?
> The
> From: Masayoshi Mizuma
>
> Add following options to the help message:
> - cache
> - flock|no_flock
> - norace
> - posix_lock|no_posix_lock
> - readdirplus|no_readdirplus
> - timeout
> - writeback|no_writeback
> - xattr|no_xattr
>
> Signed-off-by: Masayoshi Mizuma
>
> dgilbert: Split cache,
On Tue, Jan 21, 2020 at 10:23:32PM -0800, no-re...@patchew.org wrote:
> Patchew URL: https://patchew.org/QEMU/20200122055115.429945-1-...@redhat.com/
>
>
>
> Hi,
>
> This series failed the docker-quick@centos7 build test. Please find the
> testing commands and
> their output below. If you
Patchew URL: https://patchew.org/QEMU/20200122055115.429945-1-...@redhat.com/
Hi,
This series failed the docker-quick@centos7 build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
Patchew URL: https://patchew.org/QEMU/20200122055115.429945-1-...@redhat.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20200122055115.429945-1-...@redhat.com
Subject: [PULL 00/17] virtio, pc: fixes, features
===
From: Igor Mammedov
Document work-flows for
* enabling/detecting modern CPU hotplug interface
* finding a CPU with pending 'insert/remove' event
* enumerating present and possible CPUs
Signed-off-by: Igor Mammedov
Message-Id: <1575896942-331151-9-git-send-email-imamm...@redhat.com>
From: Corey Minyard
Per the ACPI spec (version 6.1, section 6.1.5 _HID) it is not required
on enumerated buses (like PCI in this case), _ADR is required (and is
already there). And the _HID value is wrong. Linux appears to ignore
the _HID entry, but Windows 10 detects it as 'Unknown Device'
From: "Dr. David Alan Gilbert"
Add the memory region names to section rounding/alignment
warnings.
Signed-off-by: Dr. David Alan Gilbert
Message-Id: <20200116202414.157959-2-dgilb...@redhat.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
hw/virtio/vhost.c | 7
From: Pan Nengyuan
v->vq forgot to cleanup in virtio_9p_device_unrealize, the memory leak
stack is as follow:
Direct leak of 14336 byte(s) in 2 object(s) allocated from:
#0 0x7f819ae43970 (/lib64/libasan.so.5+0xef970) ??:?
#1 0x7f819872f49d (/lib64/libglib-2.0.so.0+0x5249d) ??:?
#2
From: "Dr. David Alan Gilbert"
I added hugepage alignment code in c1ece84e7c9 to deal with
vhost-user + postcopy which needs aligned pages when using userfault.
However, on x86 the lower 2MB of address space tends to be shotgun'd
with small fragments around the 512-640k range - e.g. video RAM,
From: Pan Nengyuan
This patch fix memleaks when attaching/detaching virtio-scsi device, the
memory leak stack is as follow:
Direct leak of 21504 byte(s) in 3 object(s) allocated from:
#0 0x7f491f2f2970 (/lib64/libasan.so.5+0xef970) ??:?
#1 0x7f491e94649d (/lib64/libglib-2.0.so.0+0x5249d)
From: Pan Nengyuan
Use virtio_delete_queue to make it more clear.
Signed-off-by: Pan Nengyuan
Message-Id: <20200117060927.51996-3-pannengy...@huawei.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
Acked-by: Christian Schoenebeck
---
hw/9pfs/virtio-9p-device.c | 2 +-
From: Pan Nengyuan
Receive/transmit/event vqs forgot to cleanup in vhost_vsock_unrealize. This
patch save receive/transmit vq pointer in realize() and cleanup vqs
through those vq pointers in unrealize(). The leak stack is as follow:
Direct leak of 21504 byte(s) in 3 object(s) allocated from:
From: Igor Mammedov
It's not what real HW does, implementing which would be overkill [**]
and would require complex cross stack changes (QEMU+firmware) to make
it work.
So considering that SMRAM is owned by MCH, for simplicity (ab)use
reserved Q35 register, which allows QEMU and firmware easily
From: Igor Mammedov
Correct returned value description in case 'Command field' == 0x0,
it's not PXM but CPU selector value with pending event
In addition describe 0 blanket value in case of not supported
'Command field' value.
Signed-off-by: Igor Mammedov
Reviewed-by: Laszlo Ersek
From: Pan Nengyuan
Use virtio_delete_queue to make it more clear.
Signed-off-by: Pan Nengyuan
Message-Id: <20200117075547.60864-3-pannengy...@huawei.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
Reviewed-by: Stefan Hajnoczi
---
hw/scsi/virtio-scsi.c | 6 +++---
1
Document the flow for the case where contributor
updates the expected files.
Signed-off-by: Michael S. Tsirkin
---
tests/qtest/bios-tables-test.c | 23 ++-
1 file changed, 18 insertions(+), 5 deletions(-)
diff --git a/tests/qtest/bios-tables-test.c
From: Igor Mammedov
* Move reserved registers to the top of the section, so reader would be
aware of effects when reading registers description.
* State registers endianness explicitly at the beginning of the section
* Describe registers behavior in case of 'CPU selector' register contains
From: Igor Mammedov
No functional change in practice, patch only aims to properly
document (in spec and code) intended usage of the reserved space.
The new field is to be used for 2 purposes:
- detection of modern CPU hotplug interface using
CPHP_GET_NEXT_CPU_WITH_EVENT_CMD command.
The following changes since commit 3e08b2b9cb64bff2b73fa9128c0e49bfcde0dd40:
Merge remote-tracking branch 'remotes/philmd-gitlab/tags/edk2-next-20200121'
into staging (2020-01-21 15:29:25 +)
are available in the Git repository at:
git://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git tags
From: Igor Mammedov
Firmware can enumerate present at boot APs by broadcasting wakeup IPI,
so that woken up secondary CPUs could register them-selves.
However in CPU hotplug case, it would need to know architecture
specific CPU IDs for possible and hotplugged CPUs so it could
prepare environment
From: Igor Mammedov
test lockable SMRAM at default SMBASE feature, introduced by
patch "q35: implement 128K SMRAM at default SMBASE address"
Signed-off-by: Igor Mammedov
Message-Id: <1575899217-333105-1-git-send-email-imamm...@redhat.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael
From: Igor Mammedov
Write section of 'Command data' register should describe what happens
when it's written into. Correct description in case the last stored
'Command field' value is equal to 0, to reflect that currently it's not
supported.
Signed-off-by: Igor Mammedov
Reviewed-by: Laszlo
Paolo Bonzini writes:
> Il mar 21 gen 2020, 15:22 Markus Armbruster ha scritto:
>
>> > To see it a different way, these are the "C bindings" to QMP, just that
>> > the implementation is an in-process call rather than RPC. If the QAPI
>> > code generator was also able to generate Python
On Thu, Dec 19, 2019 at 02:47:58PM +0800, Heyi Guo wrote:
> The sub device "PR0" under PCI0 in ACPI/DSDT does not make any sense,
> so simply remote it.
>
> Signed-off-by: Heyi Guo
So given this has no methods except _ADR, I think it's
safe to remove:
Acked-by: Michael S. Tsirkin
> ---
>
On Mon, Jan 20, 2020 at 11:07:25AM -0600, miny...@acm.org wrote:
> From: Corey Minyard
>
> Per the ACPI spec (version 6.1, section 6.1.5 _HID) it is not required
> on enumerated buses (like PCI in this case), _ADR is required (and is
> already there). And the _HID value is wrong. Linux appears
Peter Maydell writes:
> On Tue, 21 Jan 2020 at 15:11, Marc-André Lureau
> wrote:
>> There are plenty of refactoring to do. The problem when touching the
>> whole code-base, imho, is review time. It may take a couple of
>> hours/days to come up with a cocci/spatch, and make various patches
>>
Patchew URL:
https://patchew.org/QEMU/20200122023256.27556-1-richard.hender...@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20200122023256.27556-1-richard.hender...@linaro.org
Subject: [PULL 00/11]
On Tue, Jan 21, 2020 at 12:03:48PM +0100, Philippe Mathieu-Daudé wrote:
> We actually want to access the accelerator, not the machine, so
> use the current_accel() wrapper instead.
>
> Suggested-by: Paolo Bonzini
> Reviewed-by: Alistair Francis
> Signed-off-by: Philippe Mathieu-Daudé
ppc
On Tue, Jan 21, 2020 at 12:03:42PM +0100, Philippe Mathieu-Daudé wrote:
> We only access this variable in the RTAS_SYSPARM_SPLPAR_CHARACTERISTICS
> case. Use it in place and remove the local declaration.
>
> Suggested-by: Greg Kurz
> Signed-off-by: Philippe Mathieu-Daudé
Acked-by: David Gibson
On Tue, Jan 21, 2020 at 02:37:59PM +, Alex Bennée wrote:
>
> Nicholas Piggin writes:
>
> > Alex Bennée's on December 20, 2019 11:11 pm:
> >>
> >> Nicholas Piggin writes:
> >>
> >>> This is a bit of proof of concept in case mttcg becomes more important
> >>> yield could be handled like
On Tue, Jan 21, 2020 at 05:23:03PM -0300, Fabiano Rosas wrote:
> David Gibson writes:
>
> (...)
> >> > Hrm I don't actually see how changing env->msr helps you here.
> >> > AFAICT if kvm_insert_breakpoint() resolves to kvm_arch_sw_breakpoint()
> >> > it doesn't rely on the MSR value at all.
> From: Miklos Szeredi
>
> Signed-off-by: Miklos Szeredi
> ---
> tools/virtiofsd/helper.c | 3 +++
> tools/virtiofsd/passthrough_ll.c | 7 ++-
> 2 files changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/tools/virtiofsd/helper.c b/tools/virtiofsd/helper.c
> index
There's little point in leaving these data structures half initialized,
and relying on a flush to be done during reset.
Reviewed-by: Alex Bennée
Reviewed-by: Alistair Francis
Signed-off-by: Richard Henderson
---
accel/tcg/cputlb.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
No functional change, but the smaller expressions make
the code easier to read.
Reviewed-by: Alex Bennée
Reviewed-by: Alistair Francis
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
accel/tcg/cputlb.c | 35 +--
1 file changed, 17
There are no users of this function outside cputlb.c,
and its interface will change in the next patch.
Reviewed-by: Alex Bennée
Reviewed-by: Alistair Francis
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/exec/cpu_ldst.h | 5 -
accel/tcg/cputlb.c |
Merge into the only caller, but at the same time split
out tlb_mmu_init to initialize a single tlb entry.
Reviewed-by: Alex Bennée
Reviewed-by: Alistair Francis
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
accel/tcg/cputlb.c | 33 -
By choosing "tcg:kvm" when kvm is not enabled, we generate
an incorrect warning: "invalid accelerator kvm".
At the same time, use g_str_has_suffix rather than open-coding
the same operation.
Presumably the inverse is also true with --disable-tcg.
Fixes: 28a0961757fc
Acked-by: Paolo Bonzini
We will want to be able to flush a tlb without resizing.
Reviewed-by: Alex Bennée
Reviewed-by: Alistair Francis
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
accel/tcg/cputlb.c | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git
No functional change, but the smaller expressions make
the code easier to read.
Reviewed-by: Alex Bennée
Reviewed-by: Alistair Francis
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
accel/tcg/cputlb.c | 19 ++-
1 file changed, 10 insertions(+), 9
The accel_initialised variable no longer has any setters.
Fixes: 6f6e1698a68c
Acked-by: Paolo Bonzini
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Reviewed by: Aleksandar Markovic
Signed-off-by: Richard Henderson
---
vl.c | 3 +--
1 file changed, 1 insertion(+), 2
The result of g_strsplit is never NULL.
Acked-by: Paolo Bonzini
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Reviewed by: Aleksandar Markovic
Signed-off-by: Richard Henderson
---
vl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/vl.c b/vl.c
index
We do not need the entire CPUArchState to compute these values.
Reviewed-by: Alex Bennée
Reviewed-by: Alistair Francis
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
accel/tcg/cputlb.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git
From: Philippe Mathieu-Daudé
To avoid scrolling each instruction when reviewing tcg
helpers written for the decodetree script, display the
.decode files (similar to header declarations) before
the C source (implementation of previous declarations).
Signed-off-by: Philippe Mathieu-Daudé
From: Carlos Santos
uClibc defines _SC_LEVEL1_ICACHE_LINESIZE and _SC_LEVEL1_DCACHE_LINESIZE
but the corresponding sysconf calls returns -1, which is a valid result,
meaning that the limit is indeterminate.
Handle this situation using the fallback values instead of crashing due
to an assertion
The accel_list and tmp variables are only used when manufacturing
-machine accel, options based on -accel.
Acked-by: Paolo Bonzini
Reviewed-by: Alex Bennée
Reviewed by: Aleksandar Markovic
Signed-off-by: Richard Henderson
---
vl.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff
Do not call get_clock_realtime() in tlb_mmu_resize_locked,
but hoist outside of any loop over a set of tlbs. This is
only two (indirect) callers, tlb_flush_by_mmuidx_async_work
and tlb_flush_page_locked, so not onerous.
Reviewed-by: Alex Bennée
Reviewed-by: Alistair Francis
Reviewed-by:
In target/arm we will shortly have "too many" mmu_idx.
The current minimum barrier is caused by the way in which
tlb_flush_page_by_mmuidx is coded.
We can remove this limitation by allocating memory for
consumption by the worker. Let us assume that this is
the unlikely case, as will be the case
The following changes since commit 3e08b2b9cb64bff2b73fa9128c0e49bfcde0dd40:
Merge remote-tracking branch 'remotes/philmd-gitlab/tags/edk2-next-20200121'
into staging (2020-01-21 15:29:25 +)
are available in the Git repository at:
https://github.com/rth7680/qemu.git tags/pull-tcg
There is only one caller for tlb_table_flush_by_mmuidx. Place
the result at the earlier line number, due to an expected user
in the near future.
Reviewed-by: Alex Bennée
Reviewed-by: Alistair Francis
Signed-off-by: Richard Henderson
---
accel/tcg/cputlb.c | 19 +++
1 file
On 2020/1/21 20:22, Dr. David Alan Gilbert (git) wrote:
From: "Dr. David Alan Gilbert"
There's a lot of the original fuse code we don't need; trim them down.
Hi Dave,
enum fuse_buf_copy_flags is not used by the v2 patch so I think we can
remove it directly.
See my patch for the detailed
On 1/21/20 4:32 PM, Richard Henderson wrote:
> The following changes since commit 3e08b2b9cb64bff2b73fa9128c0e49bfcde0dd40:
>
> Merge remote-tracking branch
> 'remotes/philmd-gitlab/tags/edk2-next-20200121' into staging (2020-01-21
> 15:29:25 +)
>
> are available
From: Sven Schnelle
This adds emulation of Artist graphics good enough
to get a Text console on both Linux and HP-UX. The
X11 server from HP-UX also works.
Signed-off-by: Sven Schnelle
Message-Id: <20191220211512.3289-6-sv...@stackframe.org>
[rth: Merge Helge's test for
The PA-RISC 1.1 specification says that LDCW must be aligned mod 16
or the operation is undefined. However, real hardware only generates
an unaligned access trap for unaligned mod 4.
Match real hardware, but diagnose with GUEST_ERROR a violation of
the specification.
At the same time fix a bug
From: Helge Deller
LASI is a built-in multi-I/O chip which supports serial, parallel,
network (Intel i82596 Apricot), sound and other functionalities.
LASI has been used in many HP PARISC machines.
This patch adds the necessary parts to allow Linux and HP-UX to detect
LASI and the network card.
From: Philippe Mathieu-Daudé
The firmware has to reside in the PDC range. If the Elf file
expects to load it below FIRMWARE_START, it is incorrect,
regardless the RAM size.
Acked-by: Helge Deller
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
Message-Id:
From: Sven Schnelle
Signed-off-by: Sven Schnelle
Message-Id: <20191220211512.3289-5-sv...@stackframe.org>
Signed-off-by: Richard Henderson
---
include/hw/input/lasips2.h | 16 ++
include/hw/input/ps2.h | 1 +
hw/hppa/lasi.c | 10 +-
hw/input/lasips2.c | 289
From: Philippe Mathieu-Daudé
The hardware expects DIMM slots of 1 or 2 GB, allowing up to
4 GB of memory. We want to accept the same amount of memory the
hardware can deal with. DIMMs of 768MB are not available.
However we have to deal with a firmware limitation: currently
SeaBIOS only supports
From: Philippe Mathieu-Daudé
The region in range [0xf000 - 0xf100] is the PDC area
(Processor Dependent Code), where the firmware is loaded.
This region has higher priority than the main memory.
When the machine has more than 3840MB of RAM, there is an
overlap. Since the PDC is closer
From: Sven Schnelle
HP-UX sends both the 'Set key make and break (0xfc) and
'Set all key typematic make and break' (0xfa). QEMU response
with 'Resend' as it doesn't handle these commands. HP-UX than
reports an PS/2 max retransmission exceeded error. Add these
commands and just reply with ACK.
From: Helge Deller
The tests of the dino chip with the Online-diagnostics CD
("ODE DINOTEST") now succeeds.
Additionally add some qemu trace events.
Signed-off-by: Helge Deller
Signed-off-by: Sven Schnelle
Reviewed-by: Philippe Mathieu-Daudé
Message-Id:
From: Helge Deller
Most HP PA-RISC machines have a Digital DS21142/43 Tulip network card,
only some very latest generation machines have an e1000 NIC.
Since qemu now provides an emulated tulip card, use that one instead.
Signed-off-by: Helge Deller
Message-Id:
The following changes since commit 3e08b2b9cb64bff2b73fa9128c0e49bfcde0dd40:
Merge remote-tracking branch 'remotes/philmd-gitlab/tags/edk2-next-20200121'
into staging (2020-01-21 15:29:25 +)
are available in the Git repository at:
https://github.com/rth7680/qemu.git tags/pull-pa
> From: Aleksandar Markovic
>
> Add support for eight CRC-related MIPS<32|64>R6 instructions.
>
> Signed-off-by: Aleksandar Markovic
> ---
> disas/mips.c| 8 +++
> target/mips/helper.h| 2 +
> target/mips/op_helper.c | 19
> target/mips/translate.c | 127
>
Just find that there is a previous patch at
https://github.com/palmer-dabbelt/qemu/commit/a37f21c27d3e2342c2080aafd4cfe7e949612428
--
Ian Jiang
Alistair Francis 于2020年1月21日周二 下午6:48写道：
>
> On Tue, Jan 21, 2020 at 8:08 PM Ian Jiang wrote:
> >
> > According to the RISC-V specification, when
> From: Liu Bo
>
> valgrind reported that lo.source is leaked on quiting, but it was defined
> as (const char*) as it may point to a const string "/".
>
> Signed-off-by: Liu Bo
Reviewed-by: Misono Tomohiro
On 1/11/20 6:56 AM, Thomas Huth wrote:
On 10/01/2020 21.02, Wainer dos Santos Moschetta wrote:
Hi Thomas,
On 12/18/19 4:48 PM, Thomas Huth wrote:
On 18/12/2019 18.00, Wainer dos Santos Moschetta wrote:
The test case may need to boot the VM with an accelerator that
isn't actually enabled on
Some acceptance tests require KVM or they are skipped. Travis
enables nested virtualization by default with Ubuntu
18.04 (Bionic) on x86_64. So in order to run the kvm tests, this
changed the acceptance builder to run in a Bionic VM. Also
it was needed to ensure the current user has rw permission
The test case may need to boot the VM with an accelerator that
isn't actually enabled on the QEMU binary and/or present in the host. In
this case the test behavior is undefined, and the best course of
action is to skip its execution.
This change introduced the 'accel' parameter (and the handler
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