Adding the PolarFire SoC IOSCBCTRL memory region to prevent QEMU
reporting a STORE/AMO Access Fault.
This region is used by the PolarFire SoC port of U-Boot to
interact with the FPGA system controller.
Signed-off-by: Ivan Griffin
---
hw/riscv/microchip_pfsoc.c | 10 ++
On 9/25/20 5:20 PM, Richard Henderson wrote:
No reason to set values in 'a', when we already
have float_class_inf in 'c', and can flip that sign.
Reviewed-by: David Hildenbrand
Signed-off-by: Richard Henderson
---
fpu/softfloat.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
On Fri, Oct 16, 2020 at 12:44 PM Anthony PERARD
wrote:
>
> On Fri, Oct 16, 2020 at 12:01:47PM -0400, Jason Andryuk wrote:
> > On Fri, Oct 16, 2020 at 11:38 AM Anthony PERARD
> > wrote:
> > >
> > > On Tue, Oct 13, 2020 at 03:05:06PM -0400, Jason Andryuk wrote:
> > > > xen-save-devices-state
On 10/16/20 9:31 AM, Alex Bennée wrote:
>> +static void float128_unpack(FloatParts128 *p, float128 a, float_status
>> *status)
>> +{
>> +p->sign = extractFloat128Sign(a);
>> +p->exp = extractFloat128Exp(a);
>> +p->frac0 = extractFloat128Frac0(a);
>> +p->frac1 =
Cc'ing qemu-trivial@ since this patch is reviewed.
On 10/15/20 8:12 PM, Philippe Mathieu-Daudé wrote:
ping^2...
On 10/1/20 7:31 PM, Philippe Mathieu-Daudé wrote:
ping qemu-block or qemu-arm?
On 9/15/20 7:16 PM, Philippe Mathieu-Daudé wrote:
This is the QEMU equivalent of this Linux commit
On 10/16/20 5:40 PM, Philippe Mathieu-Daudé wrote:
On 10/15/20 1:25 PM, Pavel Dovgalyuk wrote:
This patch adds MIPS-targeted acceptance tests for
record/replay functions.
Signed-off-by: Pavel Dovgalyuk
---
0 files changed
diff --git a/tests/acceptance/replay_kernel.py
On 10/16/20 8:51 AM, Huacai Chen wrote:
Loongson-3 CPU family include Loongson-3A R1/R2/R3/R4 and Loongson-3B
R1/R2. Loongson-3A R1 is the oldest and its ISA is the smallest, while
Loongson-3A R4 is the newest and its ISA is almost the superset of all
others. To reduce complexity, in QEMU we
On 10/12/20 11:57 AM, Philippe Mathieu-Daudé wrote:
Since v3:
- Introduced mips_cpu_create_with_clock() helper (Huacai)
- Added R-b tags
Since v2:
- Renamed "clk" -> "clk-in"
- Renamed "cpuclk-out -> "cpu-refclk"
Missing review: patches 7, 10-13, 15-21
~~~
All the MIPS cores emulated by QEMU
On Fri, Oct 16, 2020 at 12:01:47PM -0400, Jason Andryuk wrote:
> On Fri, Oct 16, 2020 at 11:38 AM Anthony PERARD
> wrote:
> >
> > On Tue, Oct 13, 2020 at 03:05:06PM -0400, Jason Andryuk wrote:
> > > xen-save-devices-state doesn't currently generate a vmdesc, so restore
> > > always triggers
** Description changed:
**Description:**
Any attempt to work with video in aarch64 architecture emulated on x86_64
leads currently to the error "Function not implemented". For example:
```
# v4l2-ctl -l --verbose
Failed to open /dev/video0: Function not implemented
On Thu, 15 Oct 2020 at 13:55, Gerd Hoffmann wrote:
>
> The following changes since commit 57c98ea9acdcef5021f5671efa6475a5794a51c4:
>
> Merge remote-tracking branch 'remotes/kraxel/tags/ui-20201014-pull-request'
> into staging (2020-10-14 13:56:06 +0100)
>
> are available in the Git repository
On 10/16/20 9:20 AM, Alex Bennée wrote:
>
> Richard Henderson writes:
>
>> Because of FloatParts, there will only ever be one caller.
>
> Isn't that admitting defeat - after all the logic here will be the same
> as the login in the up coming float128_muladd code and we only seem to
> need
On Fri, Oct 16, 2020 at 9:31 AM Ivan Griffin wrote:
>
> I don't know why it isn't documented in that PDF (or in the register map),
> but if you check
> https://github.com/polarfire-soc/polarfire-soc-bare-metal-library/blob/master/src/platform/drivers/mss_sys_services/mss_sys_services.h
>
Richard Henderson writes:
> Signed-off-by: Richard Henderson
> ---
> include/fpu/softfloat.h | 2 +
> fpu/softfloat.c | 416 +++-
> tests/fp/fp-test.c | 2 +-
> tests/fp/wrap.c.inc | 12 ++
> 4 files changed, 430 insertions(+), 2
I don't know why it isn't documented in that PDF (or in the register map), but
if you check
https://github.com/polarfire-soc/polarfire-soc-bare-metal-library/blob/master/src/platform/drivers/mss_sys_services/mss_sys_services.h
you'll see the following
```
typedef struct
{
volatile uint32_t
Richard Henderson writes:
> Because of FloatParts, there will only ever be one caller.
Isn't that admitting defeat - after all the logic here will be the same
as the login in the up coming float128_muladd code and we only seem to
need additional information:
> Inlining allows us to re-use
On Fri, Oct 16, 2020 at 8:04 AM Ivan Griffin wrote:
>
> Adding the PolarFire SoC IOSCBCTRL memory region to prevent QEMU
> reporting a STORE/AMO Access Fault.
>
> This region is used by the PolarFire SoC port of U-Boot to
> interact with the FPGA system controller.
>
> Signed-off-by: Ivan Griffin
Chetan Pant writes:
> There is no "version 2" of the "Lesser" General Public License.
> It is either "GPL version 2.0" or "Lesser GPL version 2.1".
> This patch replaces all occurrences of "Lesser GPL version 2" with
> "Lesser GPL version 2.1" in comment section.
>
> Signed-off-by: Chetan Pant
On Fri, Oct 16, 2020 at 11:38 AM Anthony PERARD
wrote:
>
> On Tue, Oct 13, 2020 at 03:05:06PM -0400, Jason Andryuk wrote:
> > xen-save-devices-state doesn't currently generate a vmdesc, so restore
> > always triggers "Expected vmdescription section, but got 0". This is
> > not a problem when
From: Yonggang Luo
Signed-off-by: Yonggang Luo
Message-Id: <20201015220626.418-4-luoyongg...@gmail.com>
Signed-off-by: Paolo Bonzini
---
configure | 59 ---
docs/meson.build | 46
meson.build | 30
The following changes since commit 3e40748834923798aa57e3751db13a069e2c617b:
Merge remote-tracking branch 'remotes/rth/tags/pull-mb-20201014' into staging
(2020-10-15 20:30:24 +0100)
are available in the Git repository at:
https://gitlab.com/bonzini/qemu.git tags/for-upstream
for you to
15.10.2020 20:16, Andrey Shinkevich wrote:
On 14.10.2020 19:24, Max Reitz wrote:
On 12.10.20 19:43, Andrey Shinkevich wrote:
[...]
---
block/stream.c | 93 +-
tests/qemu-iotests/030 | 51 +++--
On 10/15/20 1:25 PM, Pavel Dovgalyuk wrote:
This patch adds MIPS-targeted acceptance tests for
record/replay functions.
Signed-off-by: Pavel Dovgalyuk
---
0 files changed
diff --git a/tests/acceptance/replay_kernel.py
b/tests/acceptance/replay_kernel.py
index 952f429cac..6c3d1ec3fb 100644
On Tue, Oct 13, 2020 at 03:05:06PM -0400, Jason Andryuk wrote:
> xen-save-devices-state doesn't currently generate a vmdesc, so restore
> always triggers "Expected vmdescription section, but got 0". This is
> not a problem when restore comes from a file. However, when QEMU runs
> in a linux
On Thu, 15 Oct 2020 09:16:07 -0400
Matthew Rosato wrote:
> Currently, a subsystem reset event leaves PCI devices enabled, causing
> issues post-reset in the guest (an example would be after a kexec). These
> devices need to be reset during a subsystem reset, allowing them to be
> properly
Ping again, as no progress since september 22.
http://patchwork.ozlabs.org/project/qemu-devel/list/?series=203284
21.09.2020, 22:19, "Alexey Kirillov" :
> This patch series introduces a new QMP command "query-netdev" to get
> information about currently attached backend network devices
Hi Cédric,
On 9/19/20 2:30 PM, Philippe Mathieu-Daudé wrote:
On 9/12/20 3:40 PM, Philippe Mathieu-Daudé wrote:
Hello,
These patches are part of the GSoC unselected 'QEMU visualizer'
project.
This series introduce a LED device that can be easily connected
to a GPIO output.
[...]
Philippe
On 10/16/20 8:51 AM, Huacai Chen wrote:
From: Jiaxun Yang
Our current code assumed the target page size is always 4k
when handling PageMask and VPN2, however, variable page size
was just added to mips target and that's no longer true.
Fixes: ee3863b9d414 ("target/mips: Support variable page
On Fri, Oct 16, 2020 at 02:33:15PM +, Catangiu, Adrian Costin wrote:
> +config VMGENID
> + tristate "Virtual Machine Generation ID driver"
> + depends on ACPI
> + default M
Unless this is required to boot a machine, this should be removed.
> + help
> + This is a Virtual
On 10/16/20 8:51 AM, Huacai Chen wrote:
From: Jiaxun Yang
LWC2 & SWC2 have been rewritten by Loongson EXT vendor ASE
as "load/store quad word" and "shifted load/store" groups of
instructions.
This patch add implementation of these instructions:
gslq: load 16 bytes to GPR
gssq: store 16 bytes
On 15.10.2020 20:16, Andrey Shinkevich wrote:
On 14.10.2020 19:24, Max Reitz wrote:
On 12.10.20 19:43, Andrey Shinkevich wrote:
[...]
---
block/stream.c | 93
+-
tests/qemu-iotests/030 | 51 +++--
Sorry, I forgot to add a few people interested in this and the KVM ML to CC.
Added them.
On 16/10/2020, 17:33, "Catangiu, Adrian Costin" wrote:
- Background
The VM Generation ID is a feature defined by Microsoft (paper:
http://go.microsoft.com/fwlink/?LinkId=260709) and
On Tue, Oct 13, 2020 at 10:05:11AM -0400, Jason Andryuk wrote:
> Xen was broken by commit 1583a3898853 ("cpus: extract out qtest-specific
> code to accel/qtest"). Xen relied on qemu_init_vcpu() calling
> qemu_dummy_start_vcpu() in the default case, but that was replaced by
>
Adding the PolarFire SoC IOSCBCTRL memory region to prevent QEMU
reporting a STORE/AMO Access Fault.
This region is used by the PolarFire SoC port of U-Boot to
interact with the FPGA system controller.
Signed-off-by: Ivan Griffin
---
hw/riscv/microchip_pfsoc.c | 6 ++
- Background
The VM Generation ID is a feature defined by Microsoft (paper:
http://go.microsoft.com/fwlink/?LinkId=260709) and supported by
multiple hypervisor vendors.
The feature is required in virtualized environments by apps that work
with local copies/caches of world-unique data such as
Hi,
I have a problem with the RISC-V HTIF device.
Every binary I have compiled for Spike on riscv32 fails with the following
error message: "HTIF tohost must be 8 bytes"
This happens regardless of which program I have translated for Spike. This is
also the case with the official
Public bug reported:
As of commit 3e407488349:
$ avocado --show=console run -t machine:malta
tests/acceptance/boot_linux_console.py
console: [0.00] Linux version 4.5.0-2-4kc-malta
(debian-ker...@lists.debian.org) (gcc version 5.3.1 20160519 (Debian 5.3.1-20)
) #1 Debian 4.5.5-1
There is no "version 2" of the "Lesser" General Public License.
It is either "GPL version 2.0" or "Lesser GPL version 2.1".
This patch replaces all occurrences of "Lesser GPL version 2" with
"Lesser GPL version 2.1" in comment section.
Signed-off-by: Chetan Pant
---
hw/intc/xics_pnv.c |
On 201016 1532, Paolo Bonzini wrote:
> On 15/10/20 15:41, Alexander Bulekov wrote:
> > +typedef struct general_fuzz_config {
> > +const char *name, *args, *objects;
> > +} general_fuzz_config;
> > +
> > +GArray *get_general_fuzz_configs(void);
>
> Can't it be even a "const struct
There is no "version 2" of the "Lesser" General Public License.
It is either "GPL version 2.0" or "Lesser GPL version 2.1".
This patch replaces all occurrences of "Lesser GPL version 2" with
"Lesser GPL version 2.1" in comment section.
Signed-off-by: Chetan Pant
---
There is no "version 2" of the "Lesser" General Public License.
It is either "GPL version 2.0" or "Lesser GPL version 2.1".
This patch replaces all occurrences of "Lesser GPL version 2" with
"Lesser GPL version 2.1" in comment section.
Signed-off-by: Chetan Pant
---
hw/mips/cps.c
15.10.2020 20:37, Andrey Shinkevich wrote:
On 15.10.2020 18:56, Max Reitz wrote:
On 14.10.20 20:57, Andrey Shinkevich wrote:
On 14.10.2020 15:01, Max Reitz wrote:
On 12.10.20 19:43, Andrey Shinkevich wrote:
Limit COR operations by the base node in the backing chain when the
overlay base node
On 10/16/20 8:52 AM, Huacai Chen wrote:
Add Loongson-3A CPU models and Loongson-3 based machine description.
Signed-off-by: Huacai Chen
---
docs/system/cpu-models-mips.rst.inc | 10 --
docs/system/target-mips.rst | 10 ++
2 files changed, 18 insertions(+), 2
Hi Huacai,
On 10/16/20 8:51 AM, Huacai Chen wrote:
Preparing to add Loongson-3 machine support, add Loongson-3's LEFI (a
UEFI-like interface for BIOS-Kernel boot parameters) helpers first.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
From the kernel documentation [*] on the
Hello Darren, all
+-- On Thu, 1 Oct 2020, Darren Kenny wrote --+
| On Thursday, 2020-10-01 at 16:05:58 +0530, P J P wrote:
| > - A list member triaging such issue, would have to select their individual
| > keys for each reply.
|
| Maybe, honestly not had to deal with it personally.
On 10/16/20 8:51 AM, Huacai Chen wrote:
From: Jiaxun Yang
LDC2/SDC2 opcodes have been rewritten as "load & store with offset"
group of instructions by loongson-ext ASE.
This patch add implementation of these instructions:
gslbx: load 1 bytes to GPR
gslhx: load 2 bytes to GPR
gslwx: load 4
On 10/12/20 6:05 PM, Philippe Mathieu-Daudé wrote:
Move some code around to make this big function
easier to review.
Philippe Mathieu-Daudé (2):
hw/mips/malta: Move gt64120 related code together
hw/mips/malta: Use clearer qdev style
hw/mips/malta.c | 21 ++---
1 file
On 10/13/20 12:16 PM, Philippe Mathieu-Daudé wrote:
Volunteer to maintain MIPS TCG.
As discussed on list, Huacai will likely send a similar patch.
Few more adjustments (in particular around Boston board).
Based-on: <1602103041-32017-1-git-send-email-aleksandar.qemu.de...@gmail.com>
On 10/14/20 3:39 PM, Thomas Huth wrote:
On 13/10/2020 12.16, Philippe Mathieu-Daudé wrote:
The MIPS GIC timer is only used by the Boston board.
Signed-off-by: Philippe Mathieu-Daudé
---
MAINTAINERS | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/MAINTAINERS
If you have to do a v5, the correct word is generic not general. :)
Otherwise looks great.
Paolo
On 15/10/20 15:41, Alexander Bulekov wrote:
> v4:
> - Replace yaml + c template-based oss-fuzz configs, with C code to
> register a FuzzTarget for each config (as suggested by Paolo)
>
Per "MIPS32 34K Processor Core Family Software User's Manual,
Revision 01.13" page 8 in "Joint TLB (JTLB)" section:
"The JTLB is a fully associative TLB cache containing 16, 32,
or 64-dual-entries mapping up to 128 virtual pages to their
corresponding physical addresses."
There is no
On 15/10/20 15:41, Alexander Bulekov wrote:
> +typedef struct general_fuzz_config {
> +const char *name, *args, *objects;
> +} general_fuzz_config;
> +
> +GArray *get_general_fuzz_configs(void);
Can't it be even a "const struct general_fuzz_config
general_fuzz_configs[] = ..." instead of a
On Fri, Oct 16, 2020 at 7:48 PM Paolo Bonzini wrote:
>
> From: Yonggang Luo
>
> Signed-off-by: Yonggang Luo
> Message-Id: <20201015220626.418-4-luoyongg...@gmail.com>
> Signed-off-by: Paolo Bonzini
> ---
> configure | 59 ---
>
On 10/16/20 1:43 PM, Gerd Hoffmann wrote:
Add a second ioapic to microvm. Gives us more IRQ lines we can
use for virtio-mmio devices. Bump number of possible virtio-mmio
devices from 8 to 24.
Gerd Hoffmann (4):
microvm: make number of virtio transports runtime configurable
microvm: make
Hi Jean,
On 10/8/20 7:15 PM, Jean-Philippe Brucker wrote:
> This series adds support for VFIO endpoints to virtio-iommu.
>
> Versions 1 to 9 were posted by Bharat Bhushan, but I am taking over for
> now since he doesn't have much time to spend on it. Thanks again Bharat
> for the work!
>
> Two
Hi Jean,
On 10/8/20 7:15 PM, Jean-Philippe Brucker wrote:
> From: Bharat Bhushan
>
> The virtio-iommu device can deal with arbitrary page sizes for virtual
> endpoints, but for endpoints assigned with VFIO it must follow the page
> granule used by the host IOMMU driver.
>
> Implement the
On 10/16/20 11:58 AM, Mark Cave-Ayland wrote:
On 16/10/2020 00:47, BALATON Zoltan via wrote:
This is the cut down version of the earlier series omitting unfinished
patches that I plan to rework later and rebased to Mark's qemu-macppc
branch. Compared to v7 the only change is the cast to
On Fri, Oct 16, 2020 at 1:32 PM Mark Cave-Ayland <
mark.cave-ayl...@ilande.co.uk> wrote:
> Whilst testing a Windows build of git master of qemu-system-ppc in
> MSYS2/MingW64 I
> noticed the following assertion message in the console after booting into
> OpenBIOS
> and then closing the GTK GUI
On Fri, 16 Oct 2020, Mark Cave-Ayland wrote:
On 16/10/2020 00:47, BALATON Zoltan via wrote:
This is the cut down version of the earlier series omitting unfinished
patches that I plan to rework later and rebased to Mark's qemu-macppc
branch. Compared to v7 the only change is the cast to
From: Bruce Rogers
It isn't necessarily the case that use of iconv requires an additional
library. For that reason we shouldn't conditionalize iconv detection on
libiconv.found.
Fixes: 5285e593c33 (configure: Fixes ncursesw detection under msys2/mingw by
convert them to meson)
Signed-off-by:
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Paolo Bonzini
---
.cirrus.yml| 6 +++---
.gitlab-ci.yml | 6 +++---
.travis.yml| 8
3 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/.cirrus.yml b/.cirrus.yml
index e099da0fec..81a2960b1a 100644
---
Skip the test if it is system emulation is not requested, and
differentiate errors for lack of iconv and lack of curses.
Signed-off-by: Paolo Bonzini
---
meson.build | 85 -
1 file changed, 45 insertions(+), 40 deletions(-)
diff --git
From: Claudio Fontana
during my split of cpus.c, code line
"current_cpu = cpu"
was removed by mistake, causing hax to break.
This commit fixes the situation restoring it.
Reported-by: Volker Rümelin
Fixes: e92558e4bf8059ce4f0b310afe218802b72766bc
Signed-off-by: Claudio Fontana
Message-Id:
From: Yonggang Luo
Currently rST depends on old version sphinx-2.x.
Install it by downloading it.
Remove the need of university mirror, the main repo are recovered.
Signed-off-by: Yonggang Luo
Message-Id: <20201015220626.418-5-luoyongg...@gmail.com>
Signed-off-by: Paolo Bonzini
---
From: Alexander Bulekov
Prior to this patch, the only way I found to terminate the fuzzer was
either to:
1. Explicitly specify the number of fuzzer runs with the -runs= flag
2. SIGKILL the process with "pkill -9 qemu-fuzz-*" or similar
In addition to being annoying to deal with, SIGKILLing
From: Yonggang Luo
Signed-off-by: Yonggang Luo
Message-Id: <20201015220626.418-4-luoyongg...@gmail.com>
Signed-off-by: Paolo Bonzini
---
configure | 59 ---
docs/meson.build | 46
meson.build | 30
Ninja notices them due to a different order in visiting the graph.
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Paolo Bonzini
---
tests/include/meson.build | 8
tests/meson.build | 14 --
2 files changed, 16 insertions(+), 6 deletions(-)
diff --git
From: Bruce Rogers
These files are not needed for a linux-user only install.
Signed-off-by: Bruce Rogers
Message-Id: <20201015201840.282956-1-brog...@suse.com>
Signed-off-by: Paolo Bonzini
---
ui/meson.build | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git
Signed-off-by: Paolo Bonzini
---
tests/qapi-schema/meson.build | 88 +--
1 file changed, 44 insertions(+), 44 deletions(-)
diff --git a/tests/qapi-schema/meson.build b/tests/qapi-schema/meson.build
index 1f222a7a13..304ef939bd 100644
---
Remove from check-block the requirement that all TARGET_DIRS are built.
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Paolo Bonzini
---
tests/Makefile.include | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/Makefile.include b/tests/Makefile.include
index
From: Yonggang Luo
Python doesn't support running ../scripts/kernel-doc directly.
Signed-off-by: Yonggang Luo
Message-Id: <20201015220626.418-2-luoyongg...@gmail.com>
Signed-off-by: Paolo Bonzini
---
docs/conf.py | 2 +-
docs/sphinx/kerneldoc.py | 2 +-
2 files changed, 2
Group similar rules, add comments to "else" and "endif" lines,
detect too-old config-host.mak before messing things up.
Signed-off-by: Paolo Bonzini
---
Makefile | 45 -
1 file changed, 28 insertions(+), 17 deletions(-)
diff --git a/Makefile
Now that the build is done entirely by Meson, there is no need
to keep the Makefile conversion. Instead, we can ask Ninja about
the targets it exposes and forward them.
The main advantages are, from smallest to largest:
- reducing the possible namespace pollution within the Makefile
- removal
This adds some bugfixes, and allows MSYS2 to configure
without "--ninja=ninja".
Signed-off-by: Paolo Bonzini
---
.cirrus.yml | 3 +--
meson | 2 +-
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/.cirrus.yml b/.cirrus.yml
index 99d118239c..0f46cb5eaf 100644
---
Without pipefail, it is possible to miss failures if the recipes
include pipes.
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Paolo Bonzini
---
Makefile | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Makefile b/Makefile
index d20c7a3f80..91c62a26c8 100644
--- a/Makefile
+++ b/Makefile
From: Bruce Rogers
Commit ca8c0909f01 changed qemu_docdir to be docdir, then later uses the
qemu_docdir name in the final assignment. Unfortunately, one instance of
qemu_docdir was missed: the one which comes from the --docdir parameter.
This patch restores the proper handling of the --docdir
Use GSI 16+ for PCIe (needs acpi_build_madt() tweak).
Use GSI 24+ (second ioapic) for virtio-mmio.
Use all irq lines of the second ioapic
and allow up to 24 virtio-mmio devices.
Signed-off-by: Gerd Hoffmann
---
hw/i386/acpi-common.c | 2 +-
hw/i386/microvm.c | 6 +-
2 files changed, 6
Confusingly, QEMU_INCLUDES is not used by configure tests. Moving
it to meson.build ensures that Windows paths are specified instead of
the msys paths like /c/Users/...
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Paolo Bonzini
---
configure | 20
meson.build | 30
Initially, libudev detection was bundled with --enable-mpath because
qemu-pr-helper was the only user of libudev. Recently however the USB
U2F emulation has also started using libudev, so add a separate
option. This also allows 1) disabling libudev if desired for static
builds and 2) for
ninja is included in the CentOS PowerTools repository.
Signed-off-by: Paolo Bonzini
---
tests/docker/dockerfiles/centos8.docker | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/tests/docker/dockerfiles/centos8.docker
b/tests/docker/dockerfiles/centos8.docker
index
The following changes since commit 57c98ea9acdcef5021f5671efa6475a5794a51c4:
Merge remote-tracking branch 'remotes/kraxel/tags/ui-20201014-pull-request'
into staging (2020-10-14 13:56:06 +0100)
are available in the Git repository at:
https://gitlab.com/bonzini/qemu.git tags/for-upstream
Reviewed-by: Daniel P. Berrangé
Acked-by: Alex Bennée
Signed-off-by: Paolo Bonzini
---
.cirrus.yml| 6 +++---
.travis.yml| 13 +
tests/docker/dockerfiles/centos7.docker| 1 +
Add more IRQ lines. Depends on ACPI.
Also enable this only with userspace ioapic,
not sure whenever the kernel can handle two ioapics.
Signed-off-by: Gerd Hoffmann
---
include/hw/i386/ioapic_internal.h | 2 +-
include/hw/i386/x86.h | 1 +
hw/i386/acpi-common.c | 10
From: Greg Kurz
Tools usually expect the index files to be in the source tree, eg. emacs.
This is already the case when doing out-of-tree builds, but with in-tree
builds they end up in the build directory.
Force cscope, ctags and etags to put them in the source tree.
Signed-off-by: Greg Kurz
Signed-off-by: Gerd Hoffmann
---
include/hw/i386/microvm.h | 2 +-
hw/i386/microvm.c | 11 ++-
2 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/include/hw/i386/microvm.h b/include/hw/i386/microvm.h
index 0154ad5bd707..ede9625756b8 100644
---
Signed-off-by: Gerd Hoffmann
---
include/hw/i386/microvm.h | 2 +-
hw/i386/microvm.c | 9 +++--
2 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/include/hw/i386/microvm.h b/include/hw/i386/microvm.h
index 91b064575d55..0154ad5bd707 100644
--- a/include/hw/i386/microvm.h
Add a variable to x86 machine state instead of
hard-coding the PCI interrupts.
Signed-off-by: Gerd Hoffmann
---
include/hw/i386/x86.h | 2 ++
hw/i386/acpi-common.c | 3 +--
hw/i386/x86.c | 1 +
3 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/include/hw/i386/x86.h
Add a second ioapic to microvm. Gives us more IRQ lines we can
use for virtio-mmio devices. Bump number of possible virtio-mmio
devices from 8 to 24.
Gerd Hoffmann (4):
microvm: make number of virtio transports runtime configurable
microvm: make pcie irq base runtime configurable
microvm:
On 16/10/20 13:29, FelixCuioc wrote:
> The issue here is that an assinged EHCI device accesses
> an adjacent mapping between the delete and add phases
> of the VFIO MemoryListener.
> We want to skip flatview_simplify() is to prevent EHCI
> device IOVA mappings from being unmapped.
Hi,
there is
Gerd Hoffmann (7):
tests/acpi: allow changes for microvm/APIC.pcie
tests/acpi: add empty microvm/APIC.pcie
x86: make pci irqs runtime configurable
microvm: set pci_irq_mask
apci: drop has_pci arg for acpi_build_madt
tests/acpi: update expected data files
tests/acpi: disallow
Setting x86ms->pci_irq_mask to zero has the same effect,
so we don't need the has_pci argument any more.
Signed-off-by: Gerd Hoffmann
---
hw/i386/acpi-common.h | 3 +--
hw/i386/acpi-build.c | 2 +-
hw/i386/acpi-common.c | 25 +++--
hw/i386/acpi-microvm.c | 2 +-
4
Signed-off-by: Gerd Hoffmann
---
tests/qtest/bios-tables-test-allowed-diff.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8bf4..0c37ccebc5ba 100644
---
Signed-off-by: Gerd Hoffmann
---
tests/qtest/bios-tables-test-allowed-diff.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
b/tests/qtest/bios-tables-test-allowed-diff.h
index 0c37ccebc5ba..dfb8523c8bf4 100644
---
Signed-off-by: Gerd Hoffmann
---
tests/data/acpi/microvm/APIC.pcie | 0
1 file changed, 0 insertions(+), 0 deletions(-)
create mode 100644 tests/data/acpi/microvm/APIC.pcie
diff --git a/tests/data/acpi/microvm/APIC.pcie
b/tests/data/acpi/microvm/APIC.pcie
new file mode 100644
index
Signed-off-by: Gerd Hoffmann
---
tests/data/acpi/microvm/APIC.pcie | Bin 0 -> 110 bytes
1 file changed, 0 insertions(+), 0 deletions(-)
diff --git a/tests/data/acpi/microvm/APIC.pcie
b/tests/data/acpi/microvm/APIC.pcie
index
Makes sure the PCI interrupt overrides are added to the
APIC table in case PCIe is enabled.
Signed-off-by: Gerd Hoffmann
---
hw/i386/acpi-microvm.c | 2 +-
hw/i386/microvm.c | 6 ++
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/hw/i386/acpi-microvm.c
The actual situation we encountered is:
When assign EHCI device to the virtual machine,
after initializing EHCI in seabios,it will continuously
send dma cycles.
After flatview_simplify(),the IOVA mappings of the
EHCI device will be innocently unmapped between the
delate and add phases of the VFIO
The issue here is that an assinged EHCI device accesses
an adjacent mapping between the delete and add phases
of the VFIO MemoryListener.
We want to skip flatview_simplify() is to prevent EHCI
device IOVA mappings from being unmapped.
Signed-off-by: FelixCuioc
---
softmmu/memory.c | 20
Whilst testing a Windows build of git master of qemu-system-ppc in MSYS2/MingW64 I
noticed the following assertion message in the console after booting into OpenBIOS
and then closing the GTK GUI window without booting a client OS:
$ ./qemu-system-ppc
**
ERROR:../util/aio-win32.c:337:aio_poll:
This patch replace the global coroutine queue with a lock-free stack of which
the elements are coroutine queues. Threads can put coroutine queues into the
stack or take queues from it and each coroutine queue has exactly
POOL_BATCH_SIZE coroutines. Note that the stack is not strictly LIFO, but
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