On Sun, 31 Jan 2021 at 18:25, Christian Schoenebeck
wrote:
> I started setting up some developer documentation for 9pfs:
>
> https://wiki.qemu.org/Documentation/9p
>
> Still quite a bunch that should be added (e.g. there should be a section about
> threads and coroutines), but at least it'
On Montag, 1. Februar 2021 10:24:26 CET Greg Kurz wrote:
> On Sun, 31 Jan 2021 19:23:52 +0100
>
> Christian Schoenebeck wrote:
> > Hi,
>
> Hi Christian,
>
> > I started setting up some developer documentation for 9pfs:
> > https://wiki.qemu.org/Documentation/9p
> >
> > Still quite a bunch
xenpv machine requires USB, IDE_PIIX and PCI:
/usr/bin/ld:
libcommon.fa.p/hw_xen_xen-legacy-backend.c.o: in function
`xen_be_register_common':
hw/xen/xen-legacy-backend.c:757: undefined reference to `xen_usb_ops'
libqemu-i386-softmmu.fa.p/hw_i386_xen_xen_platform.c.o: in function
`unplug
qmp_xen_set_global_dirty_log() is also used by XEN_PV.
This fixes when XEN_PV without XEN_FV:
/usr/bin/ld:
libqemuutil.a(meson-generated_.._qapi_qapi-commands-migration.c.o): in function
`qmp_marshal_xen_set_global_dirty_log':
qapi/qapi-commands-migration.c:626: undefined reference to
`qmp
xen_shutdown_fatal_error() is also used by XEN_PV.
This fixes when XEN_PV without XEN_FV:
/usr/bin/ld: libqemu-x86_64-softmmu.fa.p/hw_xen_xen_pt_config_init.c.o: in
function `xen_pt_status_reg_init':
hw/xen/xen_pt_config_init.c:281: undefined reference to
`xen_shutdown_fatal_error'
/usr/b
Introduce XEN_FV to differency the machine from the accelerator.
Suggested-by: Paolo Bonzini
Signed-off-by: Philippe Mathieu-Daudé
---
hw/i386/Kconfig | 2 ++
hw/i386/xen/Kconfig | 5 +
hw/i386/xen/meson.build | 2 +-
3 files changed, 8 insertions(+), 1 deletion(-)
create mode
The Xen on ARM documentation only mentions the i386-softmmu
target. As the x86_64-softmmu doesn't seem used, remove it
to avoid wasting cpu cycles building it.
Signed-off-by: Philippe Mathieu-Daudé
---
meson.build | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/meson.bui
xen-mapcache.c contains accelerator related routines,
not particular to the X86 HVM machine. Move this file
to accel/xen/ (adapting the buildsys machinery).
Signed-off-by: Philippe Mathieu-Daudé
---
meson.build | 3 +++
accel/xen/trace.h | 1 +
{hw
Relax the dependency on 9pfs by using the 'imply' Kconfig rule.
This fixes when XEN_PV without XEN_FV:
/usr/bin/ld: libcommon.fa.p/hw_xen_xen-legacy-backend.c.o: in function
`xen_be_register_common':
hw/xen/xen-legacy-backend.c:754: undefined reference to `xen_9pfs_ops'
Suggested-by: Paolo
Sort the Xen buildsys glue a bit.
The first patches are probably ready now.
Since v2:
- Addressed some of Paolo's comments
- More fixes
- XEN_PV still not buildable alone -> postponed
v2: Considered Paolo's comments from v1
Philippe Mathieu-Daudé (7):
meson: Do not build Xen x86_64-softmmu on
I'm so sorry, forgive my mail client(outlook)
I have try your solution, It doesn't work, still cause crash.
The reason is: we come to bdrv_mirror_top_pwritev() (which means that
mirror-top node is already inserted into block graph), but its bs->opaque->job
is not initialized"
But the root cau
Philippe Mathieu-Daudé writes:
> V7M is an architecture feature, move its declaration to target/arm/.
>
> Signed-off-by: Philippe Mathieu-Daudé
modulo previous comments:
Reviewed-by: Alex Bennée
--
Alex Bennée
Philippe Mathieu-Daudé writes:
> Add a target-specific Kconfig.
>
> Target foo now has CONFIG_FOO defined.
>
> Two architecture have a particularity, ARM and MIPS:
> their 64-bit version include the 32-bit subset.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> I suppose X86_64 should also s
Philippe Mathieu-Daudé writes:
> SEV is an architecture feature, move its declaration to target/i386/.
In docs/devel/kconfig.rst we make the distinction between:
**subsystems**, of which **buses** are a special case
**devices**
**device groups**
**boards**
**internal elements**
Are
On Tue, Jan 12, 2021 at 04:58:57PM +, Stefan Hajnoczi wrote:
> A recent discussion raised missing information in the tracing documentation.
> Add it!
>
> Based-on: 20201216160923.722894-1-stefa...@redhat.com
>
> Stefan Hajnoczi (2):
> trace: document how to specify multiple --trace patterns
On Tue, Jan 19, 2021 at 10:31:49AM -0600, Eric Blake wrote:
> On 1/14/21 8:18 AM, BALATON Zoltan wrote:
>
> >> I wasn't aware of the fact that some of the utilities are sensitive to
> >> '--' vs '-'! I'm in favor of consistently using '--' in documentation
> >> but allowing both for backwards comp
For me, with current head-of-git QEMU, the program crashes with a
SIGSEGV very early in execution, because:
0x8260: e59f30f0 ldr r3, [pc, #0xf0]
loads 0 into r3, and then
0x8270: e1a0d003 mov sp, r3
sets sp to 0, and then
0x87b0: e92d4030 push {r4, r5, lr}
trie
On 01/02/21 11:59, Philippe Mathieu-Daudé wrote:
On 1/31/21 3:18 PM, Philippe Mathieu-Daudé wrote:
xenpv machine requires USB, IDE_PIIX and PCI:
/usr/bin/ld:
libcommon.fa.p/hw_xen_xen-legacy-backend.c.o: in function
`xen_be_register_common':
hw/xen/xen-legacy-backend.c:757: undefined
Philippe Mathieu-Daudé writes:
> The Milkymist board requires more than the PTIMER. Directly
> select the LM32_PERIPHERALS. This fixes:
>
> /usr/bin/ld:
> libqemu-lm32-softmmu.fa.p/target_lm32_gdbstub.c.o: in function
> `lm32_cpu_gdb_read_register':
> target/lm32/gdbstub.c:46: undefined
On Montag, 1. Februar 2021 11:08:10 CET Greg Kurz wrote:
> On Sat, 30 Jan 2021 15:39:14 +0100
>
> Christian Schoenebeck wrote:
> > I already used this github URL for PRs before and will continue to use it
> > in foreseeable future.
> >
> > Signed-off-by: Christian Schoenebeck
> > ---
>
> Revie
28.01.2021 18:28, John Snow wrote:
On 1/28/21 10:09 AM, Markus Armbruster wrote:
Vladimir Sementsov-Ogievskiy writes:
I'm developing Qemu backup for several years, and finally new backup
architecture, including block-copy generic engine and backup-top filter
landed upstream, great thanks to r
On 2/1/21 11:23 AM, Paolo Bonzini wrote:
> On 01/02/21 10:18, Philippe Mathieu-Daudé wrote:
>> FYI using 'imply FSDEV_9P' instead I get:
>>
>> /usr/bin/ld: libcommon.fa.p/hw_xen_xen-legacy-backend.c.o: in function
>> `xen_be_register_common':
>> hw/xen/xen-legacy-backend.c:754: undefined reference
On Thu, Jan 28, 2021 at 12:41:15PM -0300, Leonardo Augusto Guimarães Garcia
wrote:
> On 1/27/21 8:19 AM, Stefan Hajnoczi wrote:
> > On Tue, Jan 26, 2021 at 03:23:38PM -0300, lagar...@linux.ibm.com wrote:
> > +
> > + if (virtio_host_has_feature(vdev, VIRTIO_F_IOMMU_PLATFORM) &&
> > + !(fs->
On 1/31/21 3:18 PM, Philippe Mathieu-Daudé wrote:
> xenpv machine requires USB, IDE_PIIX and PCI:
>
> /usr/bin/ld:
> libcommon.fa.p/hw_xen_xen-legacy-backend.c.o: in function
> `xen_be_register_common':
> hw/xen/xen-legacy-backend.c:757: undefined reference to `xen_usb_ops'
> libqemu-i386
On Sun, Jan 31, 2021 at 06:34:15PM +0100, Volker Rümelin wrote:
> Commit 4e66c9ef64 "tracetool: add input filename and line number to
> Event" forgot to add a line number and a filename argument at one
> build method call site.
>
> Traceback (most recent call last):
> File "./scripts/simpletrace
yes, it reproduced on QEMU 5.0.0.
--
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https://bugs.launchpad.net/bugs/1914021
Title:
qemu: uncaught target signal 4 (Illegal instruction) but gdb remote-
debug exited normally
Status i
Philippe Mathieu-Daudé writes:
> We want to be able to use the 'LM32' config for architecture
> specific features. As CONFIG_LM32 is only used to select
> peripherals, rename it CONFIG_LM32_PERIPHERALS.
>
> Signed-off-by: Philippe Mathieu-Daudé
_DEVICES if you want, either way:
Reviewed-by:
Philippe Mathieu-Daudé writes:
> We want to be able to use the 'SH4' config for architecture
> specific features. As CONFIG_SH4 is only used to select
> peripherals, rename it CONFIG_SH4_PERIPHERALS.
>
> Signed-off-by: Philippe Mathieu-Daudé
I agree with Balaton Zoltan that _DEVICES might be
also centralize the registration of the cpus.c module
accelerator operations in accel/accel-softmmu.c
Consequently, rename all tcg-cpus.c, kvm-cpus.c etc to
tcg-accel-ops.c, kvm-accel-ops.c etc, also matching the
object type names.
Signed-off-by: Claudio Fontana
---
accel/accel-softmmu.h
Philippe Mathieu-Daudé writes:
> We want to be able to use the 'LM32' config for architecture
> specific features. Introduce CONFIG_LM32_EVR to select the
> lm32-evr / lm32-uclinux boards.
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alex Bennée
--
Alex Bennée
add a new optional interface to CPUClass, which allows accelerators
to extend the CPUClass with additional accelerator-specific
initializations.
Signed-off-by: Claudio Fontana
---
include/hw/core/accel-cpu.h | 35 +
include/hw/core/cpu.h | 1 +
accel/accel-comm
move the call to qemu_init_vcpu inside cpu_common_realizefn,
so it does not need to be done explicitly in each target cpu.
Despite this, the way cpu realize is done continues to be not ideal;
ideally the cpu_list_add would be done in common_cpu,
and in this case we could avoid even more redundant
On 01/02/21 10:18, Philippe Mathieu-Daudé wrote:
FYI using 'imply FSDEV_9P' instead I get:
/usr/bin/ld: libcommon.fa.p/hw_xen_xen-legacy-backend.c.o: in function
`xen_be_register_common':
hw/xen/xen-legacy-backend.c:754: undefined reference to `xen_9pfs_ops'
Ok, so then we have the case of a f
Hi!
Tanks for fixing and sorry for a delay!
Please send each new version of a patch as a separate branch. It's a rule from
https://wiki.qemu.org/Contribute/SubmitAPatch and it is more readable and less
probable that your patch will be missed.
28.01.2021 04:30, 08005...@163.com wrote:
From: M
i386 is the first user of AccelCPUClass, allowing to split
cpu.c into:
cpu.ccpuid and common x86 cpu functionality
host-cpu.c host x86 cpu functions and "host" cpu type
kvm/kvm-cpu.cKVM x86 AccelCPUClass
hvf/hvf-cpu.cHVF x86 AccelCPUClass
tcg/tcg-cpu.cTCG x86 AccelCPU
avoid open coding the accesses to cpu->accel_cpu interfaces,
and instead introduce:
accel_cpu_instance_init,
accel_cpu_realizefn
to be used by the targets/ initfn code,
and by cpu_exec_realizefn respectively.
Add warnings about the use of target-specific headers.
Signed-off-by: Claudio Fontana
Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
[claudio: rebased on Richard's splitwx work]
Signed-off-by: Claudio Fontana
---
include/hw/boards.h| 2 +-
include/{sysemu => qemu}/accel.h | 14 +
include/sysemu/hvf.h | 2 +-
include/sysemu/kvm.
we cannot in principle make the TCG Operations field definitions
conditional on CONFIG_TCG in code that is included by both common_ss
and specific_ss modules.
Therefore, what we can do safely to restrict the TCG fields to TCG-only
builds, is to move all tcg cpu operations into a separate header fi
commit 40612000599e ("arm: Correctly handle watchpoints for BE32 CPUs")
introduced this ARM-specific, TCG-specific hack to adjust the address,
before checking it with cpu_check_watchpoint.
Make adjust_watchpoint_address optional and move it to tcg_ops.
Signed-off-by: Claudio Fontana
---
includ
overall, all devices' realize functions take an Error **errp, but return void.
hw/core/qdev.c code, which realizes devices, therefore does:
local_err = NULL;
dc->realize(dev, &local_err);
if (local_err != NULL) {
goto fail;
}
However, we can improve at least accel_cpu to return a meaningful
cpu_check_watchpoint, watchpoint_address_matches are TCG-only.
Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
---
softmmu/physmem.c | 141 +++---
1 file changed, 72 insertions(+), 69 deletions(-)
diff --git a/softmmu/physmem.c b/softmmu/physmem.
move the call to accel_cpu->cpu_realizefn to the general
cpu_exec_realizefn from target/i386, so it does not need to be
called for every target explicitly as we enable more targets.
Signed-off-by: Claudio Fontana
---
cpu.c | 6 ++
target/i386/cpu.c | 20 +++-
2 f
From: Eduardo Habkost
Signed-off-by: Eduardo Habkost
[claudio: wrapped target code in CONFIG_TCG]
Signed-off-by: Claudio Fontana
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderson
---
include/hw/core/cpu.h | 12 ++--
accel/tcg/cpu-
commit 568496c0c0f1 ("cpu: Add callback to check architectural") and
commit 3826121d9298 ("target-arm: Implement checking of fired")
introduced an ARM-specific hack for cpu_check_watchpoint.
Make debug_check_watchpoint optional, and move it to tcg_ops.
Signed-off-by: Claudio Fontana
---
include
From: Eduardo Habkost
Signed-off-by: Eduardo Habkost
[claudio: wrapped target code in CONFIG_TCG]
Signed-off-by: Claudio Fontana
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderson
---
include/hw/core/cpu.h | 21 -
accel/
make it consistently SOFTMMU-only.
Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
[claudio: make the field presence in cpu.h unconditional, removing the ifdefs]
---
include/hw/core/cpu.h | 13 +++--
cc->do_interrupt is in theory a TCG callback used in accel/tcg only,
to prepare the emulated architecture to take an interrupt as defined
in the hardware specifications,
but in reality the _do_interrupt style of functions in targets are
also occasionally reused by KVM to prepare the architecture s
Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
[claudio: wrap target code around CONFIG_TCG and !CONFIG_USER_ONLY]
Note: need to be careful with the use of CONFIG_USER_ONLY,
avoiding its use in headers used by common_
From: Eduardo Habkost
Signed-off-by: Eduardo Habkost
Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderson
---
include/hw/core/cpu.h | 4 ++--
accel/tcg/cpu-exec.c | 4 ++--
target/arm/cpu.c | 2 +-
target/i386/tcg/tcg-cpu.c | 2 +-
target/l
v14 -> v15:
* change the TcgCpuOperations so that all fields of the struct are
defined unconditionally, as per original patch by Eduardo,
before moving them to a separate struct referenced by a pointer
(Richard, Eduardo).
* changed (c) year to 2021
* added a patch to make accel_cpu->cpu_re
From: Eduardo Habkost
Signed-off-by: Eduardo Habkost
[claudio: wrapped target code in CONFIG_TCG]
Signed-off-by: Claudio Fontana
---
include/hw/core/cpu.h | 20 +++-
accel/tcg/cpu-exec.c | 4 ++--
target/arm/cpu.c | 4 +++-
target/avr/cpu.c | 2 +-
Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderson
---
include/hw/core/cpu.h | 4 ++--
accel/tcg/cpu-exec.c| 4 ++--
target/alpha/cpu.c | 2 +-
target/arm/cpu.c| 4 ++--
target/arm/cpu_tcg.c|
move away TCG-only code, make it compile only on TCG.
Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderson
[claudio: moved the prototypes from hw/core/cpu.h to exec/cpu-all.h]
---
include/exec/cpu-all.h | 11 +--
include/hw/core/cpu.h | 2 ++
accel/tcg/
From: Eduardo Habkost
The TCG-specific CPU methods will be moved to a separate struct,
to make it easier to move accel-specific code outside generic CPU
code in the future. Start by moving tcg_initialize().
The new CPUClass.tcg_opts field may eventually become a pointer,
but keep it an embedded
for now only TCG is allowed as an accelerator for riscv,
so remove the CONFIG_TCG use.
Signed-off-by: Claudio Fontana
Reviewed-by: Alistair Francis
Reviewed-by: Alex Bennée
---
target/riscv/cpu.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/target/riscv/cpu.c b/target/
On Sat, 30 Jan 2021 15:39:14 +0100
Christian Schoenebeck wrote:
> I already used this github URL for PRs before and will continue to use it in
> foreseeable future.
>
> Signed-off-by: Christian Schoenebeck
> ---
Reviewed-by: Greg Kurz
Unless you're planning to send a PR soon, I guess this ca
QEMU 4.0 is quite old now -- does this reproduce with a more recent
QEMU?
--
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https://bugs.launchpad.net/bugs/1914021
Title:
qemu: uncaught target signal 4 (Illegal instruction) but gdb r
we still observe the same failure even after using latest qemu image i.e
https://hub.docker.com/layers/multiarch/qemu-user-
static/latest/images/sha256-14ef83[…]27699811f89338b129faa3bd9eb52cd696bc3d84aa81a?context=explore
--
You received this bug notification because you are a member of qemu-
de
On Sun, 31 Jan 2021 19:23:52 +0100
Christian Schoenebeck wrote:
> Hi,
>
Hi Christian,
> I started setting up some developer documentation for 9pfs:
>
> https://wiki.qemu.org/Documentation/9p
>
> Still quite a bunch that should be added (e.g. there should be a section
> about
> thread
On 2/1/21 10:15 AM, Alex Bennée wrote:
>
> Richard Henderson writes:
>
>> On 1/30/21 12:53 AM, Claudio Fontana wrote:
>>> To summarize:
>>>
>>> 1) accel->cpu_realizefn extends the current cpu target-specific realize
>>> functions with accelerator-specific code,
>>>which currently does not m
On 2/1/21 9:34 AM, Paolo Bonzini wrote:
> On 31/01/21 15:18, Philippe Mathieu-Daudé wrote:
>> 9pfs is not an accelerator feature but a machine one,
>> move the selection on the machine Kconfig (in hw/).
>>
>> Signed-off-by: Philippe Mathieu-Daudé
>> ---
>> accel/Kconfig | 1 -
>> hw/i386/
Richard Henderson writes:
> On 1/30/21 12:53 AM, Claudio Fontana wrote:
>> To summarize:
>>
>> 1) accel->cpu_realizefn extends the current cpu target-specific realize
>> functions with accelerator-specific code,
>>which currently does not make use of errp at all (thus, the temptation to
Public bug reported:
I'm getting Illegal instruction (core dumped) when running the attached
a.out_err binary in qemu, but when using Gdb to remote-debug the
program, it exited normally. will appreciate if you can help look into
this qemu issue.
readelf -h a.out_err
ELF Header:
Magic: 7f 45 4
On 01/02/21 09:46, Philippe Mathieu-Daudé wrote:
+#ifdef CONFIG_TCG
I'm not sure it's enough. TCG and KVM can be enabled in the same
binary. You'll have to perform a runtime check here I think.
If TCG is enabled, all SoC are built in (regardless of KVM enabled).
If only KVM is enabled, the TCG
Pavel Dovgalyuk writes:
> On 25.01.2021 14:09, Alex Bennée wrote:
>>
>> Pavel Dovgalyuk writes:
>>
>>> On 22.01.2021 14:42, Alex Bennée wrote:
Pavel Dovgalyuk writes:
>#endif
> +tb_flush_all();
> +
I would call tb_flush(current_cpu) or first_cpu here
We should indicate failure by exit code, not only output.
Reported-by: Peter Maydell
Fixes: f203080bbd9f9e5b31041b1f2afcd6040c5aaec5
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
tests/qemu-iotests/check | 5 -
tests/qemu-iotests/testrunner.py | 4 +++-
2 files changed, 7 insertion
+Igor (qom) / Eduardo (qdev) / Paolo (accel)
On 2/1/21 9:18 AM, Luc Michel wrote:
> Hi Philippe,
>
> On 16:14 Sun 31 Jan , Philippe Mathieu-Daudé wrote:
>> KVM requires the target cpu to be at least ARMv8 architecture
>> (support on ARMv7 has been dropped in commit 82bf7ae84ce:
>> "target/arm
29.01.2021 20:17, Kevin Wolf wrote:
Am 29.01.2021 um 17:13 hat Peter Maydell geschrieben:
On Fri, 29 Jan 2021 at 14:52, Kevin Wolf wrote:
The following changes since commit 5101d00d2f1138a73344dc4833587f76d7a5fa5c:
Merge remote-tracking branch
'remotes/vivier2/tags/trivial-branch-for-6.0
01.02.2021 11:29, Markus Armbruster wrote:
Vladimir Sementsov-Ogievskiy writes:
Add QLIST_FOREACH_FUNC_SAFE(), QTAILQ_FOREACH_FUNC_SAFE() and
QTAILQ_POP_HEAD(), to be used in following commit.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
include/qemu/queue.h | 14 ++
1 file
On 31/01/21 15:18, Philippe Mathieu-Daudé wrote:
9pfs is not an accelerator feature but a machine one,
move the selection on the machine Kconfig (in hw/).
Signed-off-by: Philippe Mathieu-Daudé
---
accel/Kconfig | 1 -
hw/i386/xen/Kconfig | 1 +
hw/xen/Kconfig | 1 +
3 files chan
On 1/29/21 8:28 PM, Paolo Bonzini wrote:
> get_image_size() returns an int64_t, which pci_add_option_rom() assigns
> to an "int" without any range checking. A 32-bit BAR could be up to
> 2 GiB in size, so reject anything above it. In order to accomodate
> a rounded-up size of 2 GiB, change pci_pa
On 31/01/21 15:34, Sergei Trofimovich wrote:
Before the change /usr/share/qemu/firmware/50-edk2-x86_64-secure.json
contained the relative path:
"filename": "share/qemu/edk2-x86_64-secure-code.fd",
"filename": "share/qemu/edk2-i386-vars.fd",
After then change the paths a
Vladimir Sementsov-Ogievskiy writes:
> Add QLIST_FOREACH_FUNC_SAFE(), QTAILQ_FOREACH_FUNC_SAFE() and
> QTAILQ_POP_HEAD(), to be used in following commit.
>
> Signed-off-by: Vladimir Sementsov-Ogievskiy
> ---
> include/qemu/queue.h | 14 ++
> 1 file changed, 14 insertions(+)
>
> diff
On Mon, Feb 1, 2021 at 7:13 AM Jason Wang wrote:
>
>
> On 2021/1/30 上午4:54, Eugenio Pérez wrote:
> > Signed-off-by: Eugenio Pérez
> > ---
> > include/hw/virtio/vhost.h | 1 +
> > hw/virtio/vhost.c | 17 +
> > 2 files changed, 18 insertions(+)
> >
> > diff --git a/incl
29.01.2021 20:30, no-re...@patchew.org wrote:
Patchew URL:
https://patchew.org/QEMU/20210129165030.640169-1-vsement...@virtuozzo.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20210129165030.640169-1-vsement...@
On 01/02/21 08:05, Pavel Dovgalyuk wrote:
Sometimes interrupt event comes at the same time with
the virtual timers. In this case replay tries to proceed
the timers, because deadline for them is zero.
This patch allows processing interrupts and exceptions
by entering the vCPU execution loop, when
Hi Philippe,
On 16:14 Sun 31 Jan , Philippe Mathieu-Daudé wrote:
> KVM requires the target cpu to be at least ARMv8 architecture
> (support on ARMv7 has been dropped in commit 82bf7ae84ce:
> "target/arm: Remove KVM support for 32-bit Arm hosts").
Wow, is there absolutely no way to do that then
On 16:14 Sun 31 Jan , Philippe Mathieu-Daudé wrote:
> Move the abstract TYPE_BCM283X and TYPE_RASPI_MACHINE declarations
> earlier to make the next commit easier to review.
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Luc Michel
> ---
> hw/arm/bcm2836.c | 32 +---
Change generated automatically using the Coccinelle
patch included in commit bf853881690 ("qdev: use
device_class_set_parent_realize/unrealize/reset()")
Signed-off-by: Philippe Mathieu-Daudé
---
target/avr/cpu.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/target/avr/cp
301 - 379 of 379 matches
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