Re: [PATCH qemu v18] spapr: Implement Open Firmware client interface

On 31/03/2021 13:53, Alexey Kardashevskiy wrote: The PAPR platform which describes an OS environment that's presented by a combination of a hypervisor and firmware. The features it specifies require collaboration between the firmware and the hypervisor. Since the beginning, the runtime

Re: [PATCH] checkpatch: Fix use of uninitialized value

On Thu, 8 Apr 2021 10:49:13 -0700 Isaku Yamahata wrote: > > How about initializing them explicitly as follows? > ($realfile ne '') prevents the case realfile eq '' && acpi_testexpted eq ''. > Anyway your patch also should fix it. So > Reviewed-by: Isaku Yamahata > > > diff --git

Re: [PATCH v1 5/8] target/riscv: Implementation of enhanced PMP (ePMP)

On Fri, Apr 2, 2021 at 8:50 PM Alistair Francis wrote: > > From: Hou Weiying > > This commit adds support for ePMP v0.9.1. > > The ePMP spec can be found in: > https://docs.google.com/document/d/1Mh_aiHYxemL0umN3GTTw8vsbmzHZ_nxZXgjgOUzbvc8 > > Signed-off-by: Hongzheng-Li > Signed-off-by: Hou

RE: [PATCH v4 09/10] Add the function of colo_bitmap_clear_diry.

The performance data has been added to the commit message in V6. Thanks, Lei. -Original Message- From: Dr. David Alan Gilbert Sent: Monday, March 29, 2021 7:32 PM To: Rao, Lei Cc: Zhang, Chen ; lizhij...@cn.fujitsu.com; jasow...@redhat.com; quint...@redhat.com; pbonz...@redhat.com;

[PATCH v6 10/10] Fixed calculation error of pkt->header_size in fill_pkt_tcp_info()

From: "Rao, Lei" The data pointer has skipped vnet_hdr_len in the function of parse_packet_early().So, we can not subtract vnet_hdr_len again when calculating pkt->header_size in fill_pkt_tcp_info(). Otherwise, it will cause network packet comparsion errors and greatly increase the frequency of

[PATCH v6 05/10] Add a function named packet_new_nocopy for COLO.

From: "Rao, Lei" Use the packet_new_nocopy instead of packet_new in the filter-rewriter module. There will be one less memory copy in the processing of each network packet. Signed-off-by: Lei Rao --- net/colo.c| 25 + net/colo.h| 1 +

[PATCH v6 07/10] Reset the auto-converge counter at every checkpoint.

From: "Rao, Lei" if we don't reset the auto-converge counter, it will continue to run with COLO running, and eventually the system will hang due to the CPU throttle reaching DEFAULT_MIGRATE_MAX_CPU_THROTTLE. Signed-off-by: Lei Rao Reviewed-by: Dr. David Alan Gilbert Reviewed-by: Lukas Straub

[PATCH v6 02/10] Fix the qemu crash when guest shutdown during checkpoint

From: "Rao, Lei" This patch fixes the following: qemu-system-x86_64: invalid runstate transition: 'colo' ->'shutdown' Aborted (core dumped) Signed-off-by: Lei Rao Reviewed-by: Li Zhijian Reviewed-by: Zhang Chen Reviewed-by: Lukas Straub Tested-by: Lukas Straub ---

[PATCH v6 08/10] Reduce the PVM stop time during Checkpoint

From: "Rao, Lei" When flushing memory from ram cache to ram during every checkpoint on secondary VM, we can copy continuous chunks of memory instead of 4096 bytes per time to reduce the time of VM stop during checkpoint. Signed-off-by: Lei Rao Reviewed-by: Dr. David Alan Gilbert Reviewed-by:

[PATCH v6 06/10] Add the function of colo_compare_cleanup

From: "Rao, Lei" This patch fixes the following: #0 __GI_raise (sig=sig@entry=6) at ../sysdeps/unix/sysv/linux/raise.c:50 #1 0x7f6ae4559859 in __GI_abort () at abort.c:79 #2 0x559aaa386720 in error_exit (err=16, msg=0x559aaa5973d0 <__func__.16227> "qemu_mutex_destroy") at

[PATCH v6 01/10] Remove some duplicate trace code.

From: "Rao, Lei" There is the same trace code in the colo_compare_packet_payload. Signed-off-by: Lei Rao Reviewed-by: Li Zhijian Reviewed-by: Zhang Chen Reviewed-by: Lukas Straub Tested-by: Lukas Straub --- net/colo-compare.c | 13 - 1 file changed, 13 deletions(-) diff --git

[PATCH v6 09/10] Add the function of colo_bitmap_clear_dirty

From: "Rao, Lei" When we use continuous dirty memory copy for flushing ram cache on secondary VM, we can also clean up the bitmap of contiguous dirty page memory. This also can reduce the VM stop time during checkpoint. The performance test for COLO as follow: Server configuraton: CPU

[PATCH v6 04/10] Remove migrate_set_block_enabled in checkpoint

From: "Rao, Lei" We can detect disk migration in migrate_prepare, if disk migration is enabled in COLO mode, we can directly report an error.and there is no need to disable block migration at every checkpoint. Signed-off-by: Lei Rao Signed-off-by: Zhang Chen Reviewed-by: Li Zhijian

[PATCH v6 03/10] Optimize the function of filter_send

From: "Rao, Lei" The iov_size has been calculated in filter_send(). we can directly return the size.In this way, this is no need to repeat calculations in filter_redirector_receive_iov(); Signed-off-by: Lei Rao Reviewed-by: Li Zhijian Reviewed-by: Zhang Chen Reviewed-by: Lukas Straub

[PATCH v6 00/10] Fixed some bugs and optimized some codes for COLO

From: Rao, Lei Changes since v5: --Replaced g_slice_new calls with g_slice_new0. Changes since v4: --Replaced qemu_mutex_lock calls with QEMU_LOCK_GUARD in colo_bitmap_clear_dirty. --Modify some minor issues about variable definition. --Add some performance test

[Bug 1895219] Re: qemu git -vnc fails due to missing en-us keymap

Confirmed also a problem on the Windows build. Work around is to copy en-us file from C:\Program Files\qemu\keymaps to qemu folder. -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1895219 Title:

Re: [PATCH v5 1/3] hw: Model ASPEED's Hash and Crypto Engine

On Fri, 9 Apr 2021, at 09:32, Joel Stanley wrote: > The HACE (Hash and Crypto Engine) is a device that offloads MD5, SHA1, > SHA2, RSA and other cryptographic algorithms. > > This initial model implements a subset of the device's functionality; > currently only MD5/SHA hashing, and on the

Re: Re: [PATCH 2/3] vhost-blk: Add vhost-blk-common abstraction

On Fri, Apr 9, 2021 at 7:21 AM Raphael Norwitz wrote: > > I'm mostly happy with this. Just some asks on variable renaming and > comments which need to be fixed because of how you've moved things > around. > OK. Thank you for reviewing! > Also let's add a MAINTAINERS entry vhost-blk-common.h/c

Re: Commit "x86/kvm: Move context tracking where it belongs" broke guest time accounting

On Thu, 8 Apr 2021 at 21:19, Thomas Gleixner wrote: > > On Tue, Apr 06 2021 at 21:47, Sean Christopherson wrote: > > On Tue, Apr 06, 2021, Michael Tokarev wrote: > >> broke kvm guest cpu time accounting - after this commit, when running > >> qemu-system-x86_64 -enable-kvm, the guest time (in

RE: [PATCH v2] Revert "target/mips: Deprecate nanoMIPS ISA"

On Thursday, April 8, 2021 2:17 PM, Richard Henderson wrote: > NACK, for the reasons stated against v1: > https://lists.gnu.org/archive/html/qemu-devel/2021-04/msg00663.html On Tuesday, April 6, 2021 11:21 AM, Richard Henderson wrote: > I think we should retain the deprecation until you

[PATCH v4 05/26] Hexagon (target/hexagon) properly generate TB end for DISAS_NORETURN

When exiting a TB, generate all the code before returning from hexagon_tr_translate_packet so that nothing needs to be done in hexagon_tr_tb_stop. Suggested-by: Richard Henderson Reviewed-by: Richard Henderson Signed-off-by: Taylor Simpson --- target/hexagon/translate.c | 62

[PATCH v4 23/26] Hexagon (target/hexagon) bit reverse (brev) addressing

The following instructions are added L2_loadrub_pbr Rd32 = memub(Rx32++Mu2:brev) L2_loadrb_pbr Rd32 = memb(Rx32++Mu2:brev) L2_loadruh_pbr Rd32 = memuh(Rx32++Mu2:brev) L2_loadrh_pbr Rd32 = memh(Rx32++Mu2:brev) L2_loadri_pbr Rd32 =

[PATCH v4 17/26] Hexagon (target/hexagon) add F2_sfrecipa instruction

Rd32,Pe4 = sfrecipa(Rs32, Rt32) Recripocal approx Test cases in tests/tcg/hexagon/multi_result.c FP exception tests added to tests/tcg/hexagon/fpstuff.c Reviewed-by: Richard Henderson Signed-off-by: Taylor Simpson --- target/hexagon/arch.c | 26 +--

[PATCH v4 25/26] Hexagon (target/hexagon) load into shifted register instructions

The following instructions are added L2_loadalignb_io Ryy32 = memb_fifo(Rs32+#s11:1) L2_loadalignh_io Ryy32 = memh_fifo(Rs32+#s11:1) L4_loadalignb_ur Ryy32 = memb_fifo(Rt32<<#u2+#U6) L4_loadalignh_ur Ryy32 = memh_fifo(Rt32<<#u2+#U6)

[PATCH v4 15/26] Hexagon (target/hexagon) move QEMU_GENERATE to only be on during macros.h

Suggested-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Signed-off-by: Taylor Simpson --- target/hexagon/genptr.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/hexagon/genptr.c b/target/hexagon/genptr.c index 6b74344..b87e264 100644 ---

[PATCH v4 14/26] Hexagon (target/hexagon) cleanup reg_field_info definition

Include size in declaration Remove {0, 0} entry Suggested-by: Richard Henderson Reviewed-by: Richard Henderson Signed-off-by: Taylor Simpson --- target/hexagon/reg_fields.c | 3 +-- target/hexagon/reg_fields.h | 4 ++-- 2 files changed, 3 insertions(+), 4 deletions(-) diff --git

[PATCH v4 20/26] Hexagon (target/hexagon) add A6_vminub_RdP

Rdd32,Pe4 = vminub(Rtt32, Rss32) Vector min of bytes Test cases in tests/tcg/hexagon/multi_result.c Reviewed-by: Richard Henderson Signed-off-by: Taylor Simpson --- target/hexagon/gen_tcg.h | 27 +++ target/hexagon/genptr.c | 22

[PATCH v4 18/26] Hexagon (target/hexagon) add F2_sfinvsqrta

Rd32,Pe4 = sfinvsqrta(Rs32) Square root approx The helper packs the 2 32-bit results into a 64-bit value, and the fGEN_TCG override unpacks them into the proper results. Test cases in tests/tcg/hexagon/multi_result.c FP exception tests added to tests/tcg/hexagon/fpstuff.c Reviewed-by:

[PATCH v4 16/26] Hexagon (target/hexagon) compile all debug code

Change #if HEX_DEBUG to if (HEX_DEBUG) so the debug code doesn't bit rot Suggested-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Signed-off-by: Taylor Simpson --- target/hexagon/genptr.c| 72 ++-- target/hexagon/helper.h| 2 --

[PATCH v4 26/26] Hexagon (target/hexagon) CABAC decode bin

The following instruction is added S2_cabacdecbinRdd32=decbin(Rss32,Rtt32) Test cases added to tests/tcg/hexagon/misc.c Reviewed-by: Richard Henderson Signed-off-by: Taylor Simpson --- target/hexagon/arch.c | 91 +++

[PATCH v4 13/26] Hexagon (target/hexagon) cleanup ternary operators in semantics

Change (cond ? (res = x) : (res = y)) to res = (cond ? x : y) This makes the semnatics easier to for idef-parser to deal with The following instructions are impacted C2_any8 C2_all8 C2_mux C2_muxii C2_muxir C2_muxri Reviewed-by: Richard Henderson Signed-off-by: Taylor

[PATCH v4 02/26] Hexagon (target/hexagon) cleanup gen_log_predicated_reg_write_pair

Similar to previous cleanup of gen_log_predicated_reg_write Reviewed-by: Richard Henderson Signed-off-by: Taylor Simpson --- target/hexagon/genptr.c | 27 +-- 1 file changed, 13 insertions(+), 14 deletions(-) diff --git a/target/hexagon/genptr.c

[PATCH v4 21/26] Hexagon (target/hexagon) add A4_addp_c/A4_subp_c

Rdd32 = add(Rss32, Rtt32, Px4):carry Add with carry Rdd32 = sub(Rss32, Rtt32, Px4):carry Sub with carry Test cases in tests/tcg/hexagon/multi_result.c Reviewed-by: Richard Henderson Signed-off-by: Taylor Simpson --- target/hexagon/gen_tcg.h | 37

[PATCH v4 22/26] Hexagon (target/hexagon) circular addressing

The following instructions are added L2_loadrub_pci Rd32 = memub(Rx32++#s4:0:circ(Mu2)) L2_loadrb_pci Rd32 = memb(Rx32++#s4:0:circ(Mu2)) L2_loadruh_pci Rd32 = memuh(Rx32++#s4:1:circ(Mu2)) L2_loadrh_pci Rd32 = memh(Rx32++#s4:1:circ(Mu2))

[PATCH v4 03/26] Hexagon (target/hexagon) remove unnecessary inline directives

Suggested-by: Richard Henderson Reviewed-by: Richard Henderson Signed-off-by: Taylor Simpson --- target/hexagon/cpu.c | 9 - target/hexagon/decode.c| 6 +++--- target/hexagon/fma_emu.c | 39 --- target/hexagon/op_helper.c | 37

[PATCH v4 08/26] Hexagon (target/hexagon) remove unused carry_from_add64 function

Suggested-by: Richard Henderson Reviewed-by: Richard Henderson Signed-off-by: Taylor Simpson --- target/hexagon/arch.c | 13 - target/hexagon/arch.h | 1 - target/hexagon/macros.h | 2 -- 3 files changed, 16 deletions(-) diff --git a/target/hexagon/arch.c

[PATCH v4 19/26] Hexagon (target/hexagon) add A5_ACS (vacsh)

Rxx32,Pe4 = vacsh(Rss32, Rtt32) Add compare and select elements of two vectors Test cases in tests/tcg/hexagon/multi_result.c Reviewed-by: Richard Henderson Signed-off-by: Taylor Simpson --- target/hexagon/gen_tcg.h | 5 +++ target/hexagon/helper.h | 2 +

[PATCH v4 04/26] Hexagon (target/hexagon) use env_archcpu and env_cpu

Remove hexagon_env_get_cpu and replace with env_archcpu Replace CPU(hexagon_env_get_cpu(env)) with env_cpu(env) Suggested-by: Richard Henderson Reviewed-by: Richard Henderson Signed-off-by: Taylor Simpson --- linux-user/hexagon/cpu_loop.c | 2 +- target/hexagon/cpu.c | 4 ++--

[PATCH v4 24/26] Hexagon (target/hexagon) load and unpack bytes instructions

The following instructions are added L2_loadbzw2_io Rd32 = memubh(Rs32+#s11:1) L2_loadbzw4_io Rdd32 = memubh(Rs32+#s11:1) L2_loadbsw2_io Rd32 = membh(Rs32+#s11:1) L2_loadbsw4_io Rdd32 = membh(Rs32+#s11:1) L4_loadbzw2_ur Rd32 =

[PATCH v4 10/26] Hexagon (target/hexagon) use softfloat default NaN and tininess

Suggested-by: Richard Henderson Reviewed-by: Richard Henderson Signed-off-by: Taylor Simpson --- fpu/softfloat-specialize.c.inc | 3 +++ target/hexagon/cpu.c | 5 + target/hexagon/op_helper.c | 47 -- 3 files changed, 8 insertions(+),

[PATCH v4 12/26] Hexagon (target/hexagon) use softfloat for float-to-int conversions

Use the proper return for helpers that convert to unsigned Remove target/hexagon/conv_emu.[ch] Suggested-by: Richard Henderson Reviewed-by: Richard Henderson Signed-off-by: Taylor Simpson --- target/hexagon/conv_emu.c | 177

[PATCH v4 11/26] Hexagon (target/hexagon) replace float32_mul_pow2 with float32_scalbn

Suggested-by: Richard Henderson Reviewed-by: Richard Henderson Signed-off-by: Taylor Simpson --- target/hexagon/arch.c | 28 +++- 1 file changed, 11 insertions(+), 17 deletions(-) diff --git a/target/hexagon/arch.c b/target/hexagon/arch.c index bb51f19..40b6e3d 100644

[PATCH v4 09/26] Hexagon (target/hexagon) change type of softfloat_roundingmodes

Suggested-by: Richard Henderson Reviewed-by: Richard Henderson Signed-off-by: Taylor Simpson --- target/hexagon/arch.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/hexagon/arch.c b/target/hexagon/arch.c index 699e2cf..bb51f19 100644 --- a/target/hexagon/arch.c +++

[PATCH v4 06/26] Hexagon (target/hexagon) decide if pred has been written at TCG gen time

Multiple writes to the same preg are and'ed together. Rather than generating a runtime check, we can determine at TCG generation time if the predicate has previously been written in the packet. Test added to tests/tcg/hexagon/misc.c Suggested-by: Richard Henderson Reviewed-by: Richard

[PATCH v4 01/26] Hexagon (target/hexagon) TCG generation cleanup

Simplify TCG generation of hex_reg_written Suggested-by: Richard Henderson Reviewed-by: Richard Henderson Signed-off-by: Taylor Simpson --- target/hexagon/genptr.c | 14 +- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/target/hexagon/genptr.c

[PATCH v4 00/26] Hexagon (target/hexagon) update

This patch series is a significant update for the Hexagon target The first 16 patches address feedback from Richard Henderson and Philippe Mathieu-Daud� The next 10 patches add the remaining instructions for the Hexagon scalar core The patches are logically independent but are

[PATCH v4 07/26] Hexagon (target/hexagon) change variables from int to bool when appropriate

Suggested-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Signed-off-by: Taylor Simpson --- target/hexagon/cpu_bits.h | 2 +- target/hexagon/decode.c| 80 +++--- target/hexagon/insn.h | 21 ++--

[PATCH v5 2/3] aspeed: Integrate HACE

Add the hash and crypto engine model to the Aspeed socs. Reviewed-by: Andrew Jeffery Reviewed-by: Cédric Le Goater Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Klaus Heinrich Kiwi Signed-off-by: Joel Stanley --- docs/system/arm/aspeed.rst | 1 - include/hw/arm/aspeed_soc.h | 3 +++

[PATCH v5 1/3] hw: Model ASPEED's Hash and Crypto Engine

The HACE (Hash and Crypto Engine) is a device that offloads MD5, SHA1, SHA2, RSA and other cryptographic algorithms. This initial model implements a subset of the device's functionality; currently only MD5/SHA hashing, and on the ast2600's scatter gather engine. Co-developed-by: Klaus Heinrich

[PATCH v5 3/3] tests/qtest: Add test for Aspeed HACE

This adds a test for the Aspeed Hash and Crypto (HACE) engine. It tests the currently implemented behavior of the hash functionality. The tests are similar, but are cut/pasted instead of broken out into a common function so the assert machinery produces useful output when a test fails.

[PATCH v5 0/3] hw/misc: Model ASPEED hash and crypto engine

This version of the series adds the cleanups Cédric made and the scatter gather feature that Klaus implemented. I took inspiration from Klaus's patches and reworked the direct hashing mode to easier implement both sg and direct modes. The r-b tags are preserved as the changes were minor. I

Re: [PATCH 2/3] vhost-blk: Add vhost-blk-common abstraction

I'm mostly happy with this. Just some asks on variable renaming and comments which need to be fixed because of how you've moved things around. Also let's add a MAINTAINERS entry vhost-blk-common.h/c either under vhost-user-blk or create a new vhost-blk entry. I'm not sure what the best practices

Re: [PATCH] hw/block/nvme: map prp fix if prp2 contains non-zero offset

On Thu, Apr 08, 2021 at 09:53:13PM +0530, Padmakar Kalghatgi wrote: > +/* > + * The first PRP list entry, pointed by PRP2 can contain > + * offsets. Hence, we need calculate the no of entries in > + * prp2 based on the offset it has. > +

Re: [PATCH v2] i386: Add missing cpu feature bits in EPYC-Rome model

On Thu, Apr 08, 2021 at 10:28:21AM -0500, Babu Moger wrote: > > > > -Original Message- > > From: Christian Ehrhardt > > Sent: Thursday, April 1, 2021 3:06 AM > > To: david.edmond...@oracle.com > > Cc: Moger, Babu ; Paolo Bonzini > > ; Richard Henderson > > ; Eduardo Habkost > > ;

[PATCH 2/2] spapr.h: increase FDT_MAX_SIZE

Certain SMP topologies stress, e.g. 1 thread/core, 2048 cores and 1 socket, stress the current maximum size of the pSeries FDT: Calling ibm,client-architecture-support...qemu-system-ppc64: error creating device tree: (fdt_setprop(fdt, offset, "ibm,processor-segment-sizes", segs, sizeof(segs))):

[PATCH 1/2] spapr.c: do not use MachineClass::max_cpus to limit CPUs

Up to this patch, 'max_cpus' value is hardcoded to 1024 (commit 6244bb7e5811). In theory this patch would simply bump it to 2048, since it's the default NR_CPUS kernel setting for ppc64 servers nowadays, but the whole mechanic of MachineClass:max_cpus is flawed for the pSeries machine. The two

[PATCH 0/2] ppc64: do not use MachineClass::max_cpus to limit CPUs

Hello, After having to change hardcoded values to launch a 2048 KVM pSeries guests I decided to post these upstream because, at least for me, the current max_cpus usage is lackluster for pSeries. More info in patch 01. Patch 02 is a trivial follow-up to increase the FDT size. Daniel Henrique

[RFC PATCH 2/5] io/net-listener: Call the notifier during finalize

From: "Dr. David Alan Gilbert" Call the notifier during finalize; it's currently only called if we change it, which is not the intent. Signed-off-by: Dr. David Alan Gilbert --- io/net-listener.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/io/net-listener.c b/io/net-listener.c index

[RFC PATCH 0/5] mptcp support

From: "Dr. David Alan Gilbert" Hi, This RFC set adds support for multipath TCP (mptcp), in particular on the migration path - but should be extensible to other users. Multipath-tcp is a bit like bonding, but at L3; you can use it to handle failure, but can also use it to split traffic

[RFC PATCH 5/5] sockets: Support multipath TCP

From: "Dr. David Alan Gilbert" Multipath TCP allows combining multiple interfaces/routes into a single socket, with very little work for the user/admin. It's enabled by 'mptcp' on most socket addresses: ./qemu-system-x86_64 -nographic -incoming tcp:0:,mptcp Signed-off-by: Dr. David

[RFC PATCH 4/5] migration/socket: Close the listener at the end

From: "Dr. David Alan Gilbert" Delay closing the listener until the cleanup hook at the end; mptcp needs the listener to stay open while the other paths come in. Signed-off-by: Dr. David Alan Gilbert --- migration/multifd.c | 5 + migration/socket.c | 24 ++-- 2

[RFC PATCH 3/5] migration: Add cleanup hook for inwards migration

From: "Dr. David Alan Gilbert" Add a cleanup hook for incoming migration that gets called at the end as a way for a transport to allow cleanup. Signed-off-by: Dr. David Alan Gilbert --- migration/migration.c | 3 +++ migration/migration.h | 4 2 files changed, 7 insertions(+) diff --git

[PATCH v2 7/7] tests/acceptance: Handle cpu tag on x86_cpu_model_versions tests

Some test cases on x86_cpu_model_versions.py are corner cases because they need to pass extra options to the -cpu argument. Once the avocado_qemu framework will set -cpu automatically, the value should be reset. This changed those tests so to call set_vm_arg() to overwrite the -cpu value.

[PATCH v2 1/7] tests/acceptance: Automatic set -cpu to the test vm

This introduces a new feature to the functional tests: automatic setting of the '-cpu VALUE' option to the created vm if the test is tagged with 'cpu:VALUE'. The 'cpu' property is made available to the test object as well. For example, for a simple test as: def test(self): """

[PATCH v2 3/7] tests/acceptance: Let the framework handle "cpu:VALUE" tagged tests

The tests that are already tagged with "cpu:VALUE" don't need to add "-cpu VALUE" to the list of arguments of the vm object because the avocado_qemu framework is able to handle it automatically. Signed-off-by: Wainer dos Santos Moschetta --- tests/acceptance/boot_linux.py | 3 ---

[PATCH v2 0/7] tests/acceptance: Handle tests with "cpu" tag

Currently the acceptance tests tagged with "machine" have the "-M TYPE" automatically added to the list of arguments of the QEMUMachine object. In other words, that option is passed to the launched QEMU. On this series it is implemented the same feature but instead for tests marked with "cpu".

[PATCH v2 2/7] tests/acceptance: Fix mismatch on cpu tagged tests

There are test cases on machine_mips_malta.py and tcg_plugins.py files where the cpu tag does not correspond to the value actually given to the QEMU binary. This fixed those tests tags. Signed-off-by: Wainer dos Santos Moschetta --- tests/acceptance/machine_mips_malta.py | 6 +++---

[PATCH v2 5/7] python/qemu: Add args property to the QEMUMachine class

This added the args property to QEMUMachine so that users of the class can access and handle the list of arguments to be given to the QEMU binary. Signed-off-by: Wainer dos Santos Moschetta --- python/qemu/machine.py | 5 + 1 file changed, 5 insertions(+) diff --git

Re: [RFC PATCH v2 01/11] python: qemu: add timer parameter for qmp.accept socket

On 4/7/21 9:50 AM, Emanuele Giuseppe Esposito wrote: Extend the _post_launch function to include the timer as parameter instead of defaulting to 15 sec. Signed-off-by: Emanuele Giuseppe Esposito --- python/qemu/machine.py | 4 ++-- python/qemu/qtest.py | 4 ++-- 2 files changed, 4

[RFC PATCH 1/5] channel-socket: Only set CLOEXEC if we have space for fds

From: "Dr. David Alan Gilbert" MSG_CMSG_CLOEXEC cleans up received fd's; it's really only for Unix sockets, but currently we enable it for everything; some socket types (IP_MPTCP) don't like this. Only enable it when we're giving the recvmsg room to receive fd's anyway. Signed-off-by: Dr.

Re: [RFC PATCH v2 02/11] python: qemu: pass the wrapper field from QEMUQtestmachine to QEMUMachine

On 4/7/21 9:50 AM, Emanuele Giuseppe Esposito wrote: Signed-off-by: Emanuele Giuseppe Esposito --- python/qemu/machine.py | 2 +- python/qemu/qtest.py | 4 +++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/python/qemu/machine.py b/python/qemu/machine.py index

Re: [PATCH-for-6.0?] hw/arm/imx25_pdk: Fix error message for invalid RAM size

On Thu, 8 Apr 2021 00:56:08 +0200 Philippe Mathieu-Daudé wrote: > The i.MX25 PDK board has 2 banks for SDRAM, each can > address up to 256 MiB. So the total RAM usable for this > board is 512M. When we ask for more we get a misleading > error message: > > $ qemu-system-arm -M imx25-pdk -m

[PATCH v2 4/7] tests/acceptance: Tagging tests with "cpu:VALUE"

The existing tests which are passing "-cpu VALUE" argument to the vm object are now properly "cpu:VALUE" tagged, so letting the avocado_qemu framework to handle that automatically. Signed-off-by: Wainer dos Santos Moschetta --- tests/acceptance/boot_linux_console.py | 16 +---

[PATCH v2 6/7] tests/acceptance: Add set_vm_arg() to the Test class

The set_vm_arg method is added to avocado_qemu.Test class on this change. Use that method to set (or replace) an argument to the list of arguments given to the QEMU binary. Suggested-by: Cleber Rosa Signed-off-by: Wainer dos Santos Moschetta --- tests/acceptance/avocado_qemu/__init__.py | 16

[PATCH] vhost-user-fs: fix features handling

Make virtio-fs take into account server capabilities. Just returning requested features assumes they all of then are implemented by server and results in setting unsupported configuration if some of them are absent. Signed-off-by: Anton Kuchin --- hw/virtio/vhost-user-fs.c | 17

Re: Mac OS real USB device support issue

> On Apr 8, 2021, at 12:40 PM, Howard Spoelstra wrote: > > On Thu, Apr 8, 2021 at 1:05 PM Gerd Hoffmann wrote: >> >> Hi, >> Those might be a good place to start. IOKit provides the drivers and also the io registry which is probably where you can get if a driver is bound to

Re: [PATCH v3 22/26] Hexagon (target/hexagon) circular addressing

On 4/7/21 6:57 PM, Taylor Simpson wrote: +static inline TCGv gen_read_ireg(TCGv result, TCGv val, int shift) +{ +/* + * Section 2.2.4 of the Hexagon V67 Programmer's Reference Manual + * + * The "I" value from a modifier register is divided into two pieces + * LSB

Re: Mac OS real USB device support issue

> On Apr 8, 2021, at 7:05 AM, Gerd Hoffmann wrote: > > Hi, > >>> Those might be a good place to start. IOKit provides the drivers and >>> also the io registry which is probably where you can get if a driver >>> is bound to a device and which one is it. How to dissociate the >>> driver from

[PATCH 2/2] hw/block/nvme: drain namespaces on sq deletion

From: Klaus Jensen For most commands, when issuing an AIO, the BlockAIOCB is stored in the NvmeRequest aiocb pointer when the AIO is issued. The main use of this is cancelling AIOs when deleting submission queues (it is currently not used for Abort). However, some commands like Dataset

[PATCH 1/2] hw/block/nvme: store aiocb in compare

From: Klaus Jensen nvme_compare() fails to store the aiocb from the blk_aio_preadv() call. Fix this. Fixes: 0a384f923f51 ("hw/block/nvme: add compare command") Cc: Gollu Appalanaidu Signed-off-by: Klaus Jensen --- hw/block/nvme.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff

Re: [PATCH v3 19/26] Hexagon (target/hexagon) add A5_ACS (vacsh)

On 4/7/21 6:57 PM, Taylor Simpson wrote: Rxx32,Pe4 = vacsh(Rss32, Rtt32) Add compare and select elements of two vectors Test cases in tests/tcg/hexagon/multi_result.c Signed-off-by: Taylor Simpson --- target/hexagon/gen_tcg.h | 5 +++ target/hexagon/helper.h

Re: [PATCH v3 16/26] Hexagon (target/hexagon) compile all debug code

On 4/7/21 6:57 PM, Taylor Simpson wrote: Change #if HEX_DEBUG to if (HEX_DEBUG) so that the debug code doesn't bit rot. Suggested-by: Philippe Mathieu-Daudé Signed-off-by: Taylor Simpson --- target/hexagon/genptr.c| 72 ++-- target/hexagon/helper.h

Re: [PATCH] hw/block/nvme: map prp fix if prp2 contains non-zero offset

On Apr 8 21:53, Padmakar Kalghatgi wrote: From: padmakar nvme_map_prp needs to calculate the number of list entries based on the offset value. For the subsequent PRP2 list, need to ensure the number of entries is within the MAX number of PRP entries for a page. Signed-off-by: Padmakar

Re: [PATCH v3 15/26] Hexagon (target/hexagon) move QEMU_GENERATE to only be on during macros.h

On 4/7/21 6:57 PM, Taylor Simpson wrote: Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Taylor Simpson --- target/hexagon/genptr.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) Reviewed-by: Richard Henderson r~

Re: [PATCH v3 14/26] Hexagon (target/hexagon) cleanup reg_field_info definition

On 4/7/21 6:57 PM, Taylor Simpson wrote: Include size in declaration Remove {0, 0} entry Suggested-by: Richard Henderson Signed-off-by: Taylor Simpson --- target/hexagon/reg_fields.c | 3 +-- target/hexagon/reg_fields.h | 4 ++-- 2 files changed, 3 insertions(+), 4 deletions(-)

Re: [PATCH v3 13/26] Hexagon (target/hexagon) cleanup ternary operators in semantics

On 4/7/21 6:57 PM, Taylor Simpson wrote: Change (cond ? (res = x) : (res = y)) to res = (cond ? x : y) This makes the semnatics easier to for idef-parser to deal with The following instructions are impacted C2_any8 C2_all8 C2_mux C2_muxii C2_muxir C2_muxri

Re: [PATCH v3 02/26] Hexagon (target/hexagon) cleanup gen_log_predicated_reg_write_pair

On 4/7/21 6:57 PM, Taylor Simpson wrote: Similar to previous cleanup of gen_log_predicated_reg_write Signed-off-by: Taylor Simpson --- target/hexagon/genptr.c | 27 +-- 1 file changed, 13 insertions(+), 14 deletions(-) Reviewed-by: Richard Henderson r~

Re: [RFC PATCH v2 04/11] qemu-iotests: delay QMP socket timers

Il gio 8 apr 2021, 18:06 Emanuele Giuseppe Esposito ha scritto: > > > On 08/04/2021 17:40, Paolo Bonzini wrote: > > On 07/04/21 15:50, Emanuele Giuseppe Esposito wrote: > >> def get_qmp_events_filtered(self, wait=60.0): > >> result = [] > >> -for ev in

Re: [PATCH] target/arm: Make Thumb store insns UNDEF for Rn==1111

On 4/8/21 9:24 AM, Peter Maydell wrote: The Arm ARM specifies that for Thumb encodings of the various plain store insns, if the Rn field is then we must UNDEF. This is different from the Arm encodings, where this case is either UNPREDICTABLE or has well-defined behaviour. The exclusive

Re: [PATCH v1 4/8] target/riscv: Remove the hardcoded MSTATUS_SD macro

On 4/8/21 8:20 AM, Alistair Francis wrote: target_ulong sd = is_32bit(ctx) ? MSTATUS32_SD : MSTATUS64_SD; It turns out clang doesn't like this, so I might still be stuck with ifdefs. I think we need #ifdef TARGET_RISCV32 #define is_32bit(ctx) true #else ... #endif based on $ cat

Re: [PATCH] vmstate: Constify some VMStateDescriptions

On 4/8/21 7:07 AM, Keqian Zhu wrote: Constify vmstate_ecc_state and vmstate_x86_cpu. Signed-off-by: Keqian Zhu --- hw/block/ecc.c | 2 +- include/hw/block/flash.h | 2 +- target/i386/cpu.h| 2 +- target/i386/machine.c| 2 +- 4 files changed, 4 insertions(+), 4

Re: [PATCH v10 2/6] arm64: kvm: Introduce MTE VM feature

On Thu, Apr 08, 2021 at 08:16:17PM +0200, David Hildenbrand wrote: > On 08.04.21 16:18, Catalin Marinas wrote: > > On Wed, Apr 07, 2021 at 04:52:54PM +0100, Steven Price wrote: > > > On 07/04/2021 16:14, Catalin Marinas wrote: > > > > On Wed, Apr 07, 2021 at 11:20:18AM +0100, Steven Price wrote: >

Re: [PATCH v2] Revert "target/mips: Deprecate nanoMIPS ISA"

On 4/8/21 10:01 AM, Aleksandar Rikalo wrote: NanoMIPS ISA is supported again, since MediaTek is taking over nanoMIPS toolchain development (confirmed at https://www.spinics.net/linux/fedora/libvir/msg217107.html ). New release of the

Re: [PATCH v10 2/6] arm64: kvm: Introduce MTE VM feature

On 08.04.21 16:18, Catalin Marinas wrote: On Wed, Apr 07, 2021 at 04:52:54PM +0100, Steven Price wrote: On 07/04/2021 16:14, Catalin Marinas wrote: On Wed, Apr 07, 2021 at 11:20:18AM +0100, Steven Price wrote: On 31/03/2021 19:43, Catalin Marinas wrote: When a slot is added by the VMM, if it

Re: [PATCH] checkpatch: Fix use of uninitialized value

How about initializing them explicitly as follows? ($realfile ne '') prevents the case realfile eq '' && acpi_testexpted eq ''. Anyway your patch also should fix it. So Reviewed-by: Isaku Yamahata diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl index 8f7053ec9b..2eb894a628 100755

RE: [PATCH v4 00/22] ppc: qemu: Add eTSEC support

>-Original Message- >From: Bin Meng >Sent: Tuesday, April 6, 2021 2:18 PM >To: Priyanka Jain ; Ramon Fried >; Simon Glass ; U-Boot Mailing List > >Cc: Tom Rini ; Vladimir Oltean ; >qemu-devel@nongnu.org Developers ; qemu-ppc > >Subject: Re: [PATCH v4 00/22] ppc: qemu: Add eTSEC support

[PATCH] hw/block/nvme: map prp fix if prp2 contains non-zero offset

From: padmakar nvme_map_prp needs to calculate the number of list entries based on the offset value. For the subsequent PRP2 list, need to ensure the number of entries is within the MAX number of PRP entries for a page. Signed-off-by: Padmakar Kalghatgi --- hw/block/nvme.c | 12 +---

Re: [RFC v12 08/65] target/arm: tcg: split m_helper user-only and sysemu-only parts

Claudio Fontana writes: > in the process remove a few CONFIG_TCG that are superfluous now. > > Signed-off-by: Claudio Fontana > Reviewed-by: Richard Henderson > --- > target/arm/tcg/m_helper.h | 21 + > target/arm/tcg/m_helper.c | 2766 + >

Re: [PATCH for-6.0? 1/3] job: Add job_wait_unpaused() for block-job-complete

08.04.2021 20:04, John Snow wrote: On 4/8/21 12:58 PM, Vladimir Sementsov-Ogievskiy wrote: job-complete command is async. Can we instead just add a boolean like job->completion_requested, and set it if job-complete called in STANDBY state, and on job_resume job_complete will be called

[PATCH v2] Revert "target/mips: Deprecate nanoMIPS ISA"

NanoMIPS ISA is supported again, since MediaTek is taking over nanoMIPS toolchain development (confirmed at https://www.spinics.net/linux/fedora/libvir/msg217107.html). New release of the toolchain can be found at

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