Since v1:
- Fix clock_has_source()
- Split patch to be more digestible
- Raise loongson3_virt/TCG clock
This series uses the recently introduced clock_ns_to_ticks()
function which "tells me how many times this clock would tick
in this length of time" to simplify the MIPS CP0 R4K timer
logic and
On Thu, Apr 08, 2021 at 08:11:54PM +0100, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> Hi,
> This RFC set adds support for multipath TCP (mptcp),
> in particular on the migration path - but should be extensible
> to other users.
>
> Multipath-tcp is a bit like
Daniel P. Berrangé writes:
> On Fri, Mar 26, 2021 at 04:44:25PM +, Peter Maydell wrote:
>> On Fri, 26 Mar 2021 at 16:33, John Snow wrote:
>> > Being less terse about it: Mostly, I don't like how it enforces this
>> > column width even for indented structures. Generally, we claim that 72
>>
On 08.04.21 18:55, John Snow wrote:
On 4/8/21 12:20 PM, Max Reitz wrote:
block-job-complete can only be applied when the job is READY, not when
it is on STANDBY (ready, but paused). Draining a job technically pauses
it (which makes a READY job enter STANDBY), and ending the drained
section
On Thu, Apr 08, 2021 at 08:11:59PM +0100, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> Multipath TCP allows combining multiple interfaces/routes into a single
> socket, with very little work for the user/admin.
>
> It's enabled by 'mptcp' on most socket addresses:
>
On Fri, Apr 09 2021 at 16:13, Wanpeng Li wrote:
> On Thu, 8 Apr 2021 at 21:19, Thomas Gleixner wrote:
>
> +account_guest_enter();
This wants to move into the instrumentation_begin/end() section above.
> guest_enter_irqoff();
> lockdep_hardirqs_on(CALLER_ADDR0);
>
> @@ -3759,6
Gerd Hoffmann writes:
> Hi,
>
>> device-list-properties uses module_object_class_by_name(), requires the
>> result to be a concrete device type, iterates over QOM properties with
>> object_property_iter_init() / object_property_iter_next(), skipping
>> properties named "type", "realized",
Hi,
> > semantic error: unresolved function pid: identifier 'pid' at
> > /home/kraxel/qemu-install/share/systemtap/tapset/qemu-system-x86_64-log.stp:5451:41
> > source: printf("%d@%d qxl_soft_reset %d\n", pid(),
> > gettimeofday_ns(), qid)
> Hmm, strange, makes me think we have a
On Thu, Apr 08, 2021 at 08:11:58PM +0100, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> Delay closing the listener until the cleanup hook at the end; mptcp
> needs the listener to stay open while the other paths come in.
So you're saying that when the 'accept(2)' call
On Thu, Apr 08, 2021 at 08:11:57PM +0100, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> Add a cleanup hook for incoming migration that gets called
> at the end as a way for a transport to allow cleanup.
>
> Signed-off-by: Dr. David Alan Gilbert
> ---
>
On Thu, Apr 08, 2021 at 08:11:56PM +0100, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> Call the notifier during finalize; it's currently only called
> if we change it, which is not the intent.
Harmless so far, since no user has passed a non-NULL notify func
>
>
On Thu, Apr 08, 2021 at 08:11:55PM +0100, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> MSG_CMSG_CLOEXEC cleans up received fd's; it's really only for Unix
> sockets, but currently we enable it for everything; some socket types
> (IP_MPTCP) don't like this.
>
> Only
On Fri, 9 Apr 2021 10:38:37 +0200
Halil Pasic wrote:
> On Thu, 8 Apr 2021 18:32:09 +0200
> Pierre Morel wrote:
>
> > ccw_dstream_read/write functions returned values are sometime
> > not taking into account and reported back to the upper level
> > of interpretation of CCW instructions.
> >
>
On Thu, 8 Apr 2021 18:32:09 +0200
Pierre Morel wrote:
> ccw_dstream_read/write functions returned values are sometime
> not taking into account and reported back to the upper level
> of interpretation of CCW instructions.
>
> It follows that accessing an invalid address does not trigger
> a
NSZE is the total size of the namespace in logical blocks. So the max
addressable logical block is NLB minus 1. So your starting logical
block is equal to NSZE it is a out of range.
Signed-off-by: Gollu Appalanaidu
---
hw/block/nvme.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
On 4/9/21 4:19 PM, Markus Armbruster wrote:
Machine types pc-i440fx-* provide a floppy controller. An empty floppy
drive is connected by default. Use -nodefaults to suppress it.
Machine types pc-q35-* provide a floppy controller only when you ask for
it, e.g. with -drive if=floppy.
Use -M
On 4/9/21 3:10 PM, Philippe Mathieu-Daudé wrote:
[Please note: This e-mail is from an EXTERNAL e-mail address]
Hi,
On 4/9/21 8:48 AM, Xu, Yanfei wrote:
How can I disable the floppy controller drive when I boot a VM by qemu-
system-x86_64? I did not specify any arguments about floppy, but
"Xu, Yanfei" writes:
> Hi experts,
>
> How can I disable the floppy controller drive when I boot a VM by qemu-
> system-x86_64? I did not specify any arguments about floppy, but after
> the qemu boots up, linux always can detect floppy drive and then
> modprobe the matched floppy.ko.
>
> qemu
On Fri, Apr 9, 2021 at 2:02 PM Jason Wang wrote:
>
>
> 在 2021/4/8 下午6:12, Xie Yongji 写道:
> > This commit introduces a new vhost-vdpa block device, which
> > will set up a vDPA device specified by a "vdpa-dev" parameter,
> > something like:
> >
> > qemu-system-x86_64 \
> > -device
On Thu, 8 Apr 2021 at 21:19, Thomas Gleixner wrote:
>
> On Tue, Apr 06 2021 at 21:47, Sean Christopherson wrote:
> > On Tue, Apr 06, 2021, Michael Tokarev wrote:
> >> broke kvm guest cpu time accounting - after this commit, when running
> >> qemu-system-x86_64 -enable-kvm, the guest time (in
Hi Eric,
On 2021/4/8 15:27, Auger Eric wrote:
Hi Kunkun,
On 4/7/21 11:26 AM, Kunkun Jiang wrote:
Hi Eric,
On 2021/4/7 3:50, Auger Eric wrote:
Hi Kunkun,
On 3/27/21 3:24 AM, Kunkun Jiang wrote:
Hi all,
Recently, I did some tests on SMMU nested mode. Here is
a question about the
Hi,
> The questions that come to mind are:
> - Does libusb_detach_kernel_driver() work on Mac OS?
> - Is libusb_detach_kernel_driver() called on Mac OS in QEMU?
>
> The only mention of this function in QEMU comes from host-libusb.c.
>
> After some tests I found out the function
>
The Core-Local Interrupt Controller (CLIC) provides low-latency,
vectored, pre-emptive interrupts for RISC-V systems.
The CLIC also supports a new Selective Hardware Vectoring feature
that allow users to optimize each interrupt for either faster
response or smaller code size.
Signed-off-by: LIU
This patch set gives an implementation of "RISC-V Core-Local Interrupt
Controller(CLIC) Version 0.9-draft-20210217". It comes from [1], where
you can find the pdf format or the source code.
I take over the job from Michael Clark, who gave the first implementation
of clic-v0.7 specification. If
The interrupt-level threshold (xintthresh) CSR holds an 8-bit field
for the threshold level of the associated privilege mode.
For horizontal interrupts, only the ones with higher interrupt levels
than the threshold level are allowed to preempt.
Signed-off-by: LIU Zhiwei
---
target/riscv/cpu.h
When a vectored interrupt is selected and serviced, the hardware will
automatically clear the corresponding pending bit in edge-triggered mode.
This may lead to a lower priviledge interrupt pending forever.
Therefore when interrupts return, pull a pending interrupt to service.
Signed-off-by: LIU
The machine mode mclicbase CSR is an XLEN-bit read-only register providing
the base address of CLIC memory mapped registers.
Signed-off-by: LIU Zhiwei
---
hw/intc/riscv_clic.c | 1 +
target/riscv/cpu.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/hw/intc/riscv_clic.c
The xtvt WARL XLEN-bit CSR holds the base address of the trap vector table,
aligned on a 64-byte or greater power-of-two boundary.
Signed-off-by: LIU Zhiwei
---
target/riscv/cpu.h | 2 ++
target/riscv/cpu_bits.h | 2 ++
target/riscv/csr.c | 28
3 files
CSR mintstatus holds the active interrupt level for each supported
privilege mode. sintstatus, and user, uintstatus, provide restricted
views of mintstatus.
Signed-off-by: LIU Zhiwei
---
target/riscv/cpu.h | 2 ++
target/riscv/cpu_bits.h | 11 +++
target/riscv/csr.c | 26
Decode CLIC interrupt information from exccode, includes interrupt
priviledge mode, interrupt level, and irq number.
Then update CSRs xcause, xstatus, xepc, xintstatus and jump to
correct PC according to the CLIC specification.
Signed-off-by: LIU Zhiwei
---
target/riscv/cpu_bits.h | 1 +
The new CLIC interrupt-handling mode is encoded as a new state in the
existing WARL xtvec register, where the low two bits of are 11.
Signed-off-by: LIU Zhiwei
---
target/riscv/csr.c | 22 --
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/target/riscv/csr.c
The xip CSR appears hardwired to zero in CLIC mode, replaced by separate
memory-mapped interrupt pendings (clicintip[i]). Writes to xip will be
ignored and will not trap (i.e., no access faults).
Signed-off-by: LIU Zhiwei
---
target/riscv/csr.c | 10 ++
1 file changed, 10 insertions(+)
The xie CSR appears hardwired to zero in CLIC mode, replaced by separate
memory-mapped interrupt enables (clicintie[i]). Writes to xie will be
ignored and will not trap (i.e., no access faults).
Signed-off-by: LIU Zhiwei
---
target/riscv/csr.c | 19 ---
1 file changed, 16
The CSR can be used by software to service the next horizontal interrupt
when it has greater level than the saved interrupt context
(held in xcause`.pil`) and greater level than the interrupt threshold of
the corresponding privilege mode,
Signed-off-by: LIU Zhiwei
---
target/riscv/cpu_bits.h |
在 2021/4/8 下午5:38, Cindy Lu 写道:
Add support for configure interrupt, use kvm_irqfd_assign and set the
gsi to kernel. When the configure notifier was eventfd_signal by host
kernel, this will finally inject an msix interrupt to guest
Signed-off-by: Cindy Lu
---
hw/virtio/virtio-pci.c | 91
From: padmakar
nvme_map_prp needs to calculate the number of list entries based on the
offset value. For the subsequent PRP2 list, need to ensure the number of
entries is within the MAX number of PRP entries for a page.
Signed-off-by: Padmakar Kalghatgi
---
-v2:
removed extraneous
在 2021/4/8 下午5:38, Cindy Lu 写道:
add configure interrupt support for virtio-mmio bus. This
interrupt will working while backend is vhost-vdpa
So this is actually the guest notifier of config interrupt for virtio-mmio.
Thanks
Signed-off-by: Cindy Lu
---
hw/virtio/virtio-mmio.c | 26
在 2021/4/8 下午5:38, Cindy Lu 写道:
Add support for configure interrupt. Set the notifier's fd to
the kernel driver when vdpa start. also set -1 while vdpa stop.
then the kernel will release the related resource
Signed-off-by: Cindy Lu
---
hw/virtio/vhost-vdpa.c | 26 +-
在 2021/4/8 下午5:38, Cindy Lu 写道:
Add configure notifier support in virtio and related driver
When peer is vhost vdpa, setup the configure interrupt function
vhost_net_start and release the resource when vhost_net_stop
Actually, this is the vhost support for config interrupt.
在 2021/4/8 下午5:38, Cindy Lu 写道:
to support configure interrupt, we need to
Add new call back function for config interrupt.
There're brunch of capital issues.
now聽this call back function only used in vhost-vdpa driver
And looks like anthoer traditional chinese character.
Hi,
On 4/9/21 8:48 AM, Xu, Yanfei wrote:
> How can I disable the floppy controller drive when I boot a VM by qemu-
> system-x86_64? I did not specify any arguments about floppy, but after
> the qemu boots up, linux always can detect floppy drive and then
> modprobe the matched floppy.ko.
>
>
> -邮件原件-
> 发件人: Dr. David Alan Gilbert [mailto:dgilb...@redhat.com]
> 发送时间: 2021年4月8日 19:27
> 收件人: yuchen (Cloud) ; pbonz...@redhat.com;
> m...@redhat.com
> 抄送: qemu-devel@nongnu.org
> 主题: Re: [Qemu-devel][bug] qemu crash when migrate vm and vm's disks
>
> * Yuchen (yu.c...@h3c.com)
On Apr 9 06:38, Keith Busch wrote:
On Thu, Apr 08, 2021 at 09:53:13PM +0530, Padmakar Kalghatgi wrote:
+/*
+ * The first PRP list entry, pointed by PRP2 can contain
+ * offsets. Hence, we need calculate the no of entries in
+ * prp2 based
在 2021/4/8 下午5:38, Cindy Lu 写道:
To support config interrupt we need to add
a new type of interrupt process. So we introduce
the vector type
enum virtio_vector_type {
聽 聽 聽 聽 VIRTIO_VQ_VECTOR,
聽 聽 聽 聽 VIRTIO_CONFIG_VECTOR,
聽 聽 聽 聽 VIRTIO_VECTOR_UNKNOWN,
聽 聽 };
聽 聽
I see some tranditiaonl
On Wed, 7 Apr 2021 at 17:17, Cédric Le Goater wrote:
>
> The Rainer BMC board is a board for the middle range POWER10 IBM systems.
Rainier
>
> Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
> ---
> hw/arm/aspeed.c | 79 +
> 1 file
On Wed, 7 Apr 2021 at 17:17, Cédric Le Goater wrote:
>
> The m25p80 test depends on the Aspeed SMC controller to test our
> SPI-NOR flash support. Reflect this dependency by changing the name.
>
> Signed-off-by: Cédric Le Goater
\o/ more tests
Reviewed-by: Joel Stanley
> ---
>
On Wed, 7 Apr 2021 at 17:17, Cédric Le Goater wrote:
>
> It will simplify extensions of the SMC model.
>
> Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
> ---
> include/hw/ssi/aspeed_smc.h | 2 +-
> hw/ssi/aspeed_smc.c | 44 +
> 2
On Wed, 7 Apr 2021 at 17:17, Cédric Le Goater wrote:
>
> The AST2600 SPI controllers have a set of bits to request/grant DMA
> access. Add a new SMC feature for these controllers and use it to
> check access to the DMA registers.
Ah this is why you added the features mask. Makes sense.
Hi experts,
How can I disable the floppy controller drive when I boot a VM by qemu-
system-x86_64? I did not specify any arguments about floppy, but after
the qemu boots up, linux always can detect floppy drive and then
modprobe the matched floppy.ko.
qemu version: v5.2
command line:
Hi,
> device-list-properties uses module_object_class_by_name(), requires the
> result to be a concrete device type, iterates over QOM properties with
> object_property_iter_init() / object_property_iter_next(), skipping
> properties named "type", "realized", "hotpluggable", "hotplugged",
>
Thanks @Babu for the clarifications!
I really hope that the qemu patch makes it in v6.0 - then I can better consider
picking it up as backport for qemu (already have a bug about that in bug
1921754 - therefore I'm setting the qemu task here as invalid)
The last step I can provide for the kernel
The ground clock isn't really an internal component of the CPRMAN
peripheral. Use the qdev_ground_clock() helper to access the board
ground plane.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/misc/bcm2835_cprman.h | 1 -
hw/misc/bcm2835_cprman.c | 7 ++-
2 files changed, 2
Clocks are rarely left unconnected, but rather connected to ground
plane to avoid noise. When representing the clock tree, we want to
see such ground clock. As we might reuse this clock on various
boards, introduce the qdev_ground_clock() which return a singleton
ground clock.
Signed-off-by:
The XOsc signal isn't a part of the CPRMAN, but comes from a
crystal oscillator external to the SoC.
Create the oscillator on the board, and propagate it to the
CPRMAN.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/misc/bcm2835_cprman.h | 1 -
hw/arm/bcm2835_peripherals.c | 1 +
Use the newly added machine_create_constant_clock() helper
to create the CPU reference clocks.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/mips/fuloong2e.c | 4 ++--
hw/mips/jazz.c | 6 +++---
hw/mips/loongson3_virt.c | 4 ++--
hw/mips/mipssim.c| 7 ---
4 files
While the documentation mentions:
Note that if you are creating a clock with a fixed period which
will never change (for example the main clock source of a board),
then you'll have nothing else to do. This value will be propagated
to other clocks when connecting the clocks together and
Boards usually have crystal oscillators (at fixed frequency)
feeding their various clocked components.
Add a helper to create such constant clocks in the machine.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/boards.h | 17 +
hw/core/machine.c | 11 +++
2 files
Use the newly added machine_create_constant_clock() helper
to create the SYSCLKs.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/mps2-tz.c | 6 ++
hw/arm/mps2.c| 3 +--
hw/arm/musca.c | 6 ++
3 files changed, 5 insertions(+), 10 deletions(-)
diff --git a/hw/arm/mps2-tz.c
To enforce correct API usage, restrict the clock creation to
hw/core/. The only possible ways to create a clock are:
- Constant clock at the board level
Using machine_create_constant_clock() in machine_init()
- Propagated clock in QDev
Using qdev_init_clock_in() or qdev_init_clock_out() in
Hi Damian, Luc, Peter.
I've been debugging some odd issue with the clocks:
a clock created in the machine (IOW, not a qdev clock) isn't
always resetted, thus propagating its value.
"not always" is the odd part. In the MPS2 board, the machine
clock is propagated. Apparently because the peripherals
Move the 'clock_propagate' trace event to clock_propagate_period()
to display the recursive propagation, and add 'propagate_children'
event to closely look at the clock propagation for each children
in the clock tree.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/core/clock.c | 8 +++-
在 2021/4/8 下午6:12, Xie Yongji 写道:
This commit introduces a new vhost-vdpa block device, which
will set up a vDPA device specified by a "vdpa-dev" parameter,
something like:
qemu-system-x86_64 \
-device vhost-vdpa-blk-pci,vdpa-dev=/dev/vhost-vdpa-0
Signed-off-by: Xie Yongji
---
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