Re: [RFC PATCH 14/25] qemu/bswap: Introduce load/store for aligned pointer

On Tue, 18 May 2021 at 19:38, Philippe Mathieu-Daudé wrote: > > When the pointer alignment is known to be safe, we can > directly swap the data in place, without having to rely > on the compiler builtin code. > > Load/store methods expecting aligned pointer use the 'a' > infix. For example to read

[PATCH 21/24] target/ppc: Split out ppc_hash32_xlate

Mirror the interface of ppc_radix64_xlate, putting all of the logic for hash32 translation into a single entry point. Signed-off-by: Richard Henderson --- target/ppc/mmu-hash32.c | 224 1 file changed, 113 insertions(+), 111 deletions(-) diff --git a/tar

Re: [PATCH V3 00/22] Live Update

On 5/18/2021 3:23 PM, Dr. David Alan Gilbert wrote: > * Steven Sistare (steven.sist...@oracle.com) wrote: >> On 5/18/2021 5:57 AM, Dr. David Alan Gilbert wrote: >>> * Steven Sistare (steven.sist...@oracle.com) wrote: On 5/14/2021 7:53 AM, Stefan Hajnoczi wrote: > On Thu, May 13, 2021 at 04

[PATCH 19/24] target/ppc: Use bool success for ppc_radix64_xlate

Instead of returning non-zero for failure, return true for success. Signed-off-by: Richard Henderson --- target/ppc/mmu-radix64.c | 30 +++--- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c index 76a5cc8

[PATCH 18/24] target/ppc: Push real-mode handling into ppc_radix64_xlate

This removes some incomplete duplication between ppc_radix64_handle_mmu_fault and ppc_radix64_get_phys_page_debug. The former was correct wrt SPR_HRMOR and the latter was not. Signed-off-by: Richard Henderson --- target/ppc/mmu-radix64.c | 77 ++-- 1 file chan

[PATCH 16/24] target/ppc: Remove PowerPCCPUClass.handle_mmu_fault

Instead, use a switch on env->mmu_model. This avoids some replicated information in cpu setup. Signed-off-by: Richard Henderson --- target/ppc/cpu-qom.h| 1 - target/ppc/cpu_init.c | 45 - target/ppc/mmu_helper.c | 24 ++ 3 file

[PATCH 13/24] target/ppc: Remove type argument from mmubooke_get_physical_address

It is no longer used. Signed-off-by: Richard Henderson --- target/ppc/mmu_helper.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index 83e7e0dd13..bf0fcca9be 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_he

[PATCH 17/24] target/ppc: Use MMUAccessType with *_handle_mmu_fault

These changes were waiting until we didn't need to match the function type of PowerPCCPUClass.handle_mmu_fault. Signed-off-by: Richard Henderson --- target/ppc/mmu-hash32.h | 4 ++-- target/ppc/mmu-hash64.h | 4 ++-- target/ppc/mmu-radix64.h | 4 ++-- target/ppc/mmu-hash32.c | 7 ++- targ

[PATCH 12/24] target/ppc: Remove type argument from mmubooke_check_tlb

We can now use MMU_INST_FETCH from access_type for this. Unify the I/D code paths, making use of prot_for_access_type. Signed-off-by: Richard Henderson --- target/ppc/mmu_helper.c | 46 + 1 file changed, 14 insertions(+), 32 deletions(-) diff --git a/targ

[PATCH 15/24] target/ppc: Remove type argument for mmubooke206_get_physical_address

It is no longer used. Signed-off-by: Richard Henderson --- target/ppc/mmu_helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index 90038e3e76..ef634fcb33 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_help

[PATCH 14/24] target/ppc: Remove type argument from mmubooke206_check_tlb

We can now use MMU_INST_FETCH from access_type for this. Unify the I/D code paths, making use of prot_for_access_type. Signed-off-by: Richard Henderson --- target/ppc/mmu_helper.c | 50 ++--- 1 file changed, 17 insertions(+), 33 deletions(-) diff --git a/targ

[PATCH 06/24] target/ppc: Use MMUAccessType in mmu_helper.c

This replaces 'int rw' with 'MMUAccessType access_type'. Comparisons vs zero become either MMU_DATA_LOAD or MMU_DATA_STORE, since we had previously squashed rw to 0 for code access. Signed-off-by: Richard Henderson --- target/ppc/mmu_helper.c | 161 +--- 1 fil

[PATCH 10/24] target/ppc: Remove type argument from get_bat_6xx_tlb

We can now use MMU_INST_FETCH from access_type for this. Signed-off-by: Richard Henderson --- target/ppc/mmu_helper.c | 19 --- 1 file changed, 8 insertions(+), 11 deletions(-) diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index 506b0e4d90..0809210d3b 100644 ---

Re: [PATCH v2 00/12] hw: Various Kconfig fixes

On 5/17/21 10:04 PM, Eduardo Habkost wrote: > On Mon, May 17, 2021 at 03:18:56PM -0400, Eduardo Habkost wrote: >> CCing Build system architecture maintainer (Daniel). > > Oops, I was misled by the subsection title. Daniel is > responsible only for the build system documentation. > > Do we have a

[PATCH 09/24] target/ppc: Remove type argument from ppc6xx_tlb_check

We can now use MMU_INST_FETCH from access_type for this. Signed-off-by: Richard Henderson --- target/ppc/mmu_helper.c | 10 -- 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index 197a75c9e3..506b0e4d90 100644 --- a/target/

[PATCH 00/24] target/ppc: Clean up mmu translation

This attempts the cleanup I've been talking about with Bruno. On the way, there's a lot of MMUAccessType cleanup, to get the code into the form I wanted the interface to share. There's a lot more cleanup that could be done, particularly wrt the older mmu models. r~ Richard Henderson (24): t

[PATCH 11/24] target/ppc: Remove type argument from mmu40x_get_physical_address

It is no longer used. Signed-off-by: Richard Henderson --- target/ppc/mmu_helper.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index 0809210d3b..6860a2aea0 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_he

[PATCH 08/24] target/ppc: Remove type argument from ppc6xx_tlb_pte_check

It is no longer used. Signed-off-by: Richard Henderson --- target/ppc/mmu_helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index e3912e4094..197a75c9e3 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_help

[PATCH 05/24] target/ppc: Rename access_type to type in mmu_helper.c

The variable that holds ACCESS_INT, ACCESS_FLOAT, etc is variously called 'int type' or 'int access_type' within this file. Standardize on 'int type' throughout. Signed-off-by: Richard Henderson --- target/ppc/mmu_helper.c | 64 - 1 file changed, 32 inser

[PATCH 04/24] target/ppc: Use MMUAccessType in mmu-hash32.c

We must leave the 'int rwx' parameter to ppc_hash32_handle_mmu_fault for now, but will clean that up later. Signed-off-by: Richard Henderson --- target/ppc/mmu-hash32.c | 53 ++--- 1 file changed, 29 insertions(+), 24 deletions(-) diff --git a/target/ppc/mmu-

[PATCH 03/24] target/ppc: Use MMUAccessType in mmu-hash64.c

We must leave the 'int rwx' parameter to ppc_hash64_handle_mmu_fault for now, but will clean that up later. Signed-off-by: Ricgard Henderson --- target/ppc/mmu-hash64.c | 61 ++--- 1 file changed, 39 insertions(+), 22 deletions(-) diff --git a/target/ppc/mmu-

[PATCH 07/24] target/ppc: Remove type argument from check_prot

We can now use MMU_INST_FETCH from access_type for this. Use prot_for_access_type to simplify everything. Signed-off-by: Richard Henderson --- target/ppc/mmu_helper.c | 35 +++ 1 file changed, 7 insertions(+), 28 deletions(-) diff --git a/target/ppc/mmu_helper.c

[PATCH 01/24] target/ppc: Introduce prot_for_access_type

Use this in the three places we currently have a local array indexed by rwx (which happens to have the same values). The types will match up correctly with additional changes. Signed-off-by: Richard Henderson --- target/ppc/internal.h| 19 +++ target/ppc/mmu-hash32.c | 8 ++

[PATCH 02/24] target/ppc: Use MMUAccessType in mmu-radix64.c

We must leave the 'int rwx' parameter to ppc_radix64_handle_mmu_fault for now, but will clean that up later. Signed-off-by: Richard Henderson --- target/ppc/mmu-radix64.c | 119 --- 1 file changed, 74 insertions(+), 45 deletions(-) diff --git a/target/ppc/mmu

Re: [PATCH v3] target/xtensa: clean up unaligned access

On 5/17/21 3:52 PM, Max Filippov wrote: -static void gen_load_store_alignment(DisasContext *dc, int shift, -TCGv_i32 addr, bool no_hw_alignment) +static MemOp gen_load_store_alignment(DisasContext *dc, int shift, + TCGv_i32 addr, bool no_hw_alignment)

Re: [RFC PATCH 08/25] qemu/bswap: Use ST_CONVERT() macro to emit 16-bit load/store functions

On Tue, 18 May 2021 at 19:37, Philippe Mathieu-Daudé wrote: > > Signed-off-by: Philippe Mathieu-Daudé > --- > include/qemu/bswap.h | 17 ++--- > 1 file changed, 2 insertions(+), 15 deletions(-) > > diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h > index 86f5ded6acf..4e2bd2e9

[Bug 1915535] Re: Assertion `child->perm & BLK_PERM_WRITE' failed in bdrv_co_write_req_prepare through atapi

Not a duplicate of the other bug. Confirmed on development head beyond 6.0. Please migrate this bug to gitlab and assign me. --js ** Changed in: qemu Assignee: (unassigned) => John Snow (jnsnow) -- You received this bug notification because you are a member of qemu- devel-ml, which is sub

Re: [PATCH V3 00/22] Live Update

On Tue, 18 May 2021 20:23:25 +0100 "Dr. David Alan Gilbert" wrote: > * Steven Sistare (steven.sist...@oracle.com) wrote: > > On 5/18/2021 5:57 AM, Dr. David Alan Gilbert wrote: > > > * Steven Sistare (steven.sist...@oracle.com) wrote: > > >> On 5/14/2021 7:53 AM, Stefan Hajnoczi wrote: > >

Re: [PATCH v3 0/5] Add support for PMBus in QEMU

I would also like a directory for sensors. There are quite a few of those incoming. Any objections? -Titus On Tue, 18 May 2021 at 15:45, Corey Minyard wrote: > > On Tue, May 18, 2021 at 11:45:22AM -0700, Titus Rwantare wrote: > > Hello, > > > > This patch series adds an interface to start suppor

[PATCH 1/2] hw/arm: add quanta-gbs-bmc machine

Adds initial quanta-gbs-bmc machine support. Tested: Boots to userspace. Signed-off-by: Patrick Venture Reviewed-by: Brandon Kim Reviewed-by: Hao Wu --- hw/arm/npcm7xx_boards.c | 33 + 1 file changed, 33 insertions(+) diff --git a/hw/arm/npcm7xx_boards.c b/hw/a

Re: [PATCH v3 1/5] hw/i2c: add support for PMBus

I can add it. On Tue, 18 May 2021 at 15:37, Corey Minyard wrote: > > On Tue, May 18, 2021 at 11:45:23AM -0700, Titus Rwantare wrote: > > QEMU has support for SMBus devices, and PMBus is a more specific > > implementation of SMBus. The additions made in this commit makes it easier > > to > > add

[PATCH 2/2] hw/arm: quanta-gbs-bmc add i2c comments

Add a comment and i2c method that describes the board layout. Tested: firmware booted to userspace. Signed-off-by: Patrick Venture Reviewed-by: Brandon Kim Reviewed-by: Hao Wu --- hw/arm/npcm7xx_boards.c | 60 + 1 file changed, 60 insertions(+) diff --g

[PATCH 4/4] aspeed: sonorapass: enable pca954x muxes

Enables the pca954x muxes in the bmc board configuration. Signed-off-by: Patrick Venture Reviewed-by: Hao Wu --- hw/arm/aspeed.c | 22 +++--- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 35a28b0e8b..27fd51980c 100644 ---

[PATCH 0/2] Adds quanta-gbs-bmc machine to nuvoton boards.

This is a board supported by OpenBmc. Patrick Venture (2): hw/arm: add quanta-gbs-bmc machine hw/arm: quanta-gbs-bmc add i2c comments hw/arm/npcm7xx_boards.c | 93 + 1 file changed, 93 insertions(+) -- 2.31.1.751.gd2f1c929bd-goog

[PATCH 0/4] With the pca954x i2c mux available, enable it on aspeed and nuvoton BMC boards.

Patrick Venture (4): hw/arm: gsj add i2c comments hw/arm: gsj add pca9548 hw/arm: quanta-q71l add pca954x muxes aspeed: sonorapass: enable pca954x muxes hw/arm/Kconfig | 2 ++ hw/arm/aspeed.c | 33 +++-- hw/arm/npcm7xx_boards.c | 14

Re: [PATCH v3 0/5] Add support for PMBus in QEMU

On Tue, May 18, 2021 at 11:45:22AM -0700, Titus Rwantare wrote: > Hello, > > This patch series adds an interface to start supporting PMBus devices in QEMU. > I’ve included two PMBus devices: MAX34451 and ADM1272. I've reviewed all these patches, and beyond my one comment, they look good. I'm not

[PATCH 2/4] hw/arm: gsj add pca9548

Tested: Quanta-gsj firmware booted. i2c /dev entries driver I2C init bus 1 freq 10 I2C init bus 2 freq 10 I2C init bus 3 freq 10 I2C init bus 4 freq 10 I2C init bus 8 freq 10 I2C init bus 9 freq 10 at24 9-0055: 8192 byte 24c64 EEPROM, writable, 1 bytes/write I2C init bus 10

Re: [PATCH v3 05/11] pckbd: don't update OBF flags if KBD_STAT_OBF is set

Hi, static const VMStateDescription vmstate_kbd = { .name = "pckbd", -.version_id = 3, +.version_id = 4, .minimum_version_id = 3, .post_load = kbd_post_load, .fields = (VMStateField[]) { @@ -435,6 +471,7 @@ static const VMStateDescription vmstate_kbd = {

[PATCH 1/4] hw/arm: gsj add i2c comments

Adds comments to the board init to identify missing i2c devices. Signed-off-by: Patrick Venture Reviewed-by: Hao Wu --- hw/arm/npcm7xx_boards.c | 16 +++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/hw/arm/npcm7xx_boards.c b/hw/arm/npcm7xx_boards.c index d4553e3786

[PATCH 3/4] hw/arm: quanta-q71l add pca954x muxes

Adds the pca954x muxes expected. Tested: Booted quanta-q71l image to userspace. Signed-off-by: Patrick Venture Reviewed-by: Hao Wu --- hw/arm/Kconfig | 1 + hw/arm/aspeed.c | 11 --- 2 files changed, 9 insertions(+), 3 deletions(-) diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index 9

Re: [PATCH v3 1/5] hw/i2c: add support for PMBus

On Tue, May 18, 2021 at 11:45:23AM -0700, Titus Rwantare wrote: > QEMU has support for SMBus devices, and PMBus is a more specific > implementation of SMBus. The additions made in this commit makes it easier to > add new PMBus devices to QEMU. Why doesn't the PMBusDevice have a VMStateDescription?

[Bug 1915539] Re: Null-ptr dereference on AHCICmdHdr in ahci_pio_transfer

Confirmed. Please migrate to gitlab and assign me. --js ** Changed in: qemu Assignee: (unassigned) => John Snow (jnsnow) ** Changed in: qemu Status: New => Confirmed -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https

Re: [Question] Indefinitely block in the host when remove the PF driver

On Tue, 11 May 2021 11:44:49 +0800 Yicong Yang wrote: > [ +qemu-devel ] > > On 2021/4/30 22:29, Alex Williamson wrote: > > On Fri, 30 Apr 2021 15:57:47 +0800 > > Yicong Yang wrote: > > > >> When I try to remove the PF driver in the host, the process will be blocked > >> if the related VF of

[PATCH v5 6/6] hw/block/fdc: Add sysbus_fdc_init_drives() method

FDCtrlSysBus's FDCtrl state is a private field. However it is accessed by the public fdctrl_init_sysbus() and sun4m_fdctrl_init() methods. To be able to move them out of fdc-sysbus.c, first add the sysbus_fdc_init_drives() method and use it in these 2 functions. Reviewed-by: Mark Cave-Ayland Sign

[PATCH v5 4/6] hw/block/fdc: Extract ISA floppy controllers to fdc-isa.c

Some machines use floppy controllers via the SysBus interface, and don't need to pull in all the ISA code. Extract the ISA specific code to a new unit: fdc-isa.c, and add a new Kconfig symbol: "FDC_ISA". Reviewed-by: John Snow Acked-by: Mark Cave-Ayland Reviewed-by: Mark Cave-Ayland Signed-off-

[PATCH v5 3/6] hw/block/fdc: Declare shared prototypes in fdc-internal.h

We want to extract ISA/SysBus code from the generic fdc.c file. First, declare the prototypes we will access from the new units into a new local header: "fdc-internal.h". Acked-by: Mark Cave-Ayland Reviewed-by: Mark Cave-Ayland Signed-off-by: Philippe Mathieu-Daudé --- v5: fdctrl_transfer_handl

[PATCH v5 2/6] hw/block/fdc: Replace disabled fprintf() by trace event

Reviewed-by: John Snow Acked-by: Mark Cave-Ayland Reviewed-by: Mark Cave-Ayland Signed-off-by: Philippe Mathieu-Daudé --- hw/block/fdc.c| 7 +-- hw/block/trace-events | 1 + 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/hw/block/fdc.c b/hw/block/fdc.c index a825c2a

[PATCH v5 0/6] hw/block/fdc: Allow Kconfig-selecting ISA bus/SysBus floppy controllers

Hi, The floppy disc controllers pulls in irrelevant devices (sysbus in an ISA-only machine, ISA bus + isa devices on a sysbus-only machine). This series clean that by extracting each device in its own file, adding the corresponding Kconfig symbols: FDC_ISA and FDC_SYSBUS. Since v4: - Dropped mac

[PATCH v5 1/6] hw/isa/Kconfig: Fix missing dependency ISA_SUPERIO -> FDC

isa_superio_realize() calls isa_fdc_init_drives(), which is defined in hw/block/fdc.c, so ISA_SUPERIO needs to select the FDC symbol. Reported-by: John Snow Fixes: c0ff3795143 ("Introduce a CONFIG_ISA_SUPERIO switch for isa-superio.c") Signed-off-by: Philippe Mathieu-Daudé --- hw/isa/Kconfig |

[PATCH v5 5/6] hw/block/fdc: Extract SysBus floppy controllers to fdc-sysbus.c

Some machines use floppy controllers via the SysBus interface, and don't need to pull in all the SysBus code. Extract the SysBus specific code to a new unit: fdc-sysbus.c, and add a new Kconfig symbol: "FDC_SYSBUS". Reviewed-by: John Snow Acked-by: Mark Cave-Ayland Reviewed-by: Mark Cave-Ayland

Re: [PATCH V3 00/22] Live Update

* Steven Sistare (steven.sist...@oracle.com) wrote: > On 5/18/2021 5:57 AM, Dr. David Alan Gilbert wrote: > > * Steven Sistare (steven.sist...@oracle.com) wrote: > >> On 5/14/2021 7:53 AM, Stefan Hajnoczi wrote: > >>> On Thu, May 13, 2021 at 04:21:15PM -0400, Steven Sistare wrote: > On 5/12/20

RE: [RFC PATCH v2 5/6] hw/arm/virt-acpi-build: Add PPTT table

> From: Andrew Jones [mailto:drjo...@redhat.com] > Sent: Tuesday, May 18, 2021 8:06 PM > To: Salil Mehta > Cc: wangyanan (Y) ; Peter Maydell > ; Michael S . Tsirkin ; Wanghaibin > (D) ; qemu-devel@nongnu.org; Shannon Zhao > ; qemu-...@nongnu.org; Alistair Francis > ; Zengtao (B) ; > yangyicong ; y

Re: [PATCH] hw/ide: Fix crash when plugging a piix3-ide device into the x-remote machine

On 4/28/21 5:32 AM, Thomas Huth wrote: On 28/04/2021 11.24, Stefan Hajnoczi wrote: On Fri, Apr 16, 2021 at 02:52:56PM +0200, Thomas Huth wrote: @@ -158,7 +166,11 @@ static void pci_piix_ide_realize(PCIDevice *dev, Error **errp)   vmstate_register(VMSTATE_IF(dev), 0, &vmstate_ide_pci, d); -

[Bug 1917442] Re: [AHCI] crash when running a GNU/Hurd guest

** Changed in: qemu Assignee: (unassigned) => John Snow (jnsnow) -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1917442 Title: [AHCI] crash when running a GNU/Hurd guest Status in QEMU: Inco

Re: [PATCH v2 5/6] hw/ide/via: Connect IDE function output IRQs to the ISA function input

On 5/11/21 12:18 AM, Philippe Mathieu-Daudé wrote: To avoid abusing isa_get_irq(NULL) using a hidden ISA bridge under the hood, let the IDE function expose 2 output IRQs, and connect them to the ISA function inputs when creating the south bridge chipset model in vt82c686b_southbridge_init. See

Re: [PATCH v2 4/6] hw/ide/via: Replace magic 2 value by ARRAY_SIZE / MAX_IDE_DEVS

On 5/11/21 12:18 AM, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé Acked-by: John Snow --- hw/ide/via.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/ide/via.c b/hw/ide/via.c index be09912b334..6c667a92130 100644 --- a/hw/ide/vi

Re: [RFC PATCH v2 5/6] hw/arm/virt-acpi-build: Add PPTT table

On Tue, May 18, 2021 at 06:34:08PM +, Salil Mehta wrote: > Those benefits, when vcpu pinning is used, are the same benefits > > as for the host, which already use PPTT tables to describe topology, even > > though hot plug isn't supported. > > yes sure, you mean pinning vcpus according to the

Re: [PATCH v2 02/12] hw/ide/Kconfig: Add missing dependency PCI -> IDE_QDEV

On 5/15/21 1:37 PM, Philippe Mathieu-Daudé wrote: The pci_ide_create_devs() function is declared i hw/ide/qdev.c: $ git grep ide_create_drive hw/ide/pci.c:491:ide_create_drive(d->bus + bus[i], unit[i], hd_table[i]); hw/ide/qdev.c:127:IDEDevice *ide_create_drive(IDEBus *bus, in

RE: [RFC PATCH v3 4/9] hw/arm/virt: Initialize the present cpu members

> From: Andrew Jones [mailto:drjo...@redhat.com] > Sent: Tuesday, May 18, 2021 8:50 AM > > On Tue, May 18, 2021 at 07:04:51AM +, Salil Mehta wrote: > > > From: wangyanan (Y) > > > Sent: Tuesday, May 18, 2021 5:43 AM > > > > > > Hi Salil, > > > > > > On 2021/5/18 4:48, Salil Mehta wrote: > > >

[PATCH v3 0/5] Add support for PMBus in QEMU

Hello, This patch series adds an interface to start supporting PMBus devices in QEMU. I’ve included two PMBus devices: MAX34451 and ADM1272. PMBus is a variant of SMBus meant for digital management of power supplies. PMBus adds to the SMBus standard by defining a number of constants and commands

Re: [PATCH v2 01/21] qapi/parser: Don't try to handle file errors

On 5/18/21 5:28 AM, Markus Armbruster wrote: QAPIError not having .info don't actually exist before this patch. It's defined by QAPISourceError now, I just missed this spot in test-qapi. It isn't used in practice until now, however. --js

[PATCH v3 5/5] tests/qtest: add tests for MAX34451 device model

Signed-off-by: Titus Rwantare Reviewed-by: Joel Stanley --- tests/qtest/max34451-test.c | 336 tests/qtest/meson.build | 1 + 2 files changed, 337 insertions(+) create mode 100644 tests/qtest/max34451-test.c diff --git a/tests/qtest/max34451-test.c b/

Re: [PATCH 09/11] include/exec: added functions to the stubs in exec-all.h

On 17/05/2021 15:02, Richard Henderson wrote: On 5/17/21 11:59 AM, Lucas Mateus Martins Araujo e Castro wrote: I'm not completely sure how this should be handled, there's a get_physical_address in mmu_helper.c but it's a static function and divided by processor families instead of MMU types, s

[PATCH v3 4/5] hw/misc: add MAX34451 device

The MAX34451 is a Maxim power-supply system manager that can monitor up to 16 voltage rails or currents. It also contains a temperature sensor and supports up to four external temperature sensors. This commit adds support for interfacing with it, and setting limits on the supported sensors. Re

Re: [RFC PATCH 00/25] exec: Add load/store API for aligned pointers

Patchew URL: https://patchew.org/QEMU/20210518183655.1711377-1-phi...@redhat.com/ Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 20210518183655.1711377-1-phi...@redhat.com Subject: [RFC PATCH 00/25] exec: Add load/stor

[PATCH v3 3/5] tests/qtest: add tests for ADM1272 device model

Signed-off-by: Titus Rwantare Reviewed-by: Joel Stanley --- tests/qtest/adm1272-test.c | 445 + tests/qtest/meson.build| 1 + 2 files changed, 446 insertions(+) create mode 100644 tests/qtest/adm1272-test.c diff --git a/tests/qtest/adm1272-test.c b/tes

[RFC PATCH 24/25] hw/virtio: Add methods for aligned pointer access

Suggested-by: Stefan Hajnoczi Signed-off-by: Philippe Mathieu-Daudé --- include/hw/virtio/virtio-access.h | 21 + 1 file changed, 21 insertions(+) diff --git a/include/hw/virtio/virtio-access.h b/include/hw/virtio/virtio-access.h index ae66bbd74f9..5b20f004e12 100644 --- a/

[RFC PATCH 25/25] hw/virtio: Optimize accesses on vring aligned pointers

By the virtio spec [*] the vring is aligned, so the 'idx' and 'flag' fields are also 16-bit aligned. Therefore we can use the load/store *aligned* API to set the value. [*] https://docs.oasis-open.org/virtio/virtio/v1.1/csprd01/virtio-v1.1-csprd01.html#x1-430008 Reported-by: Bibo Mao Inspired-b

[PATCH v3 1/5] hw/i2c: add support for PMBus

QEMU has support for SMBus devices, and PMBus is a more specific implementation of SMBus. The additions made in this commit makes it easier to add new PMBus devices to QEMU. https://pmbus.org/specification-archives/ Reviewed-by: Joel Stanley Reviewed-by: Hao Wu Signed-off-by: Titus Rwantare --

[RFC PATCH 22/25] hw/virtio: Use LDST_CONVERT macro to emit 32-bit load/store functions

Signed-off-by: Philippe Mathieu-Daudé --- include/hw/virtio/virtio-access.h | 66 +++ 1 file changed, 5 insertions(+), 61 deletions(-) diff --git a/include/hw/virtio/virtio-access.h b/include/hw/virtio/virtio-access.h index 4341af9cb0f..0df52d190dc 100644 --- a/inclu

[RFC PATCH 23/25] hw/virtio: Use LDST_CONVERT macro to emit 64-bit load/store functions

Signed-off-by: Philippe Mathieu-Daudé --- include/hw/virtio/virtio-access.h | 39 +-- 1 file changed, 1 insertion(+), 38 deletions(-) diff --git a/include/hw/virtio/virtio-access.h b/include/hw/virtio/virtio-access.h index 0df52d190dc..ae66bbd74f9 100644 --- a/includ

[RFC PATCH 21/25] hw/virtio: Use ST_CONVERT() macro to emit 16-bit load/store functions

Signed-off-by: Philippe Mathieu-Daudé --- include/hw/virtio/virtio-access.h | 33 +-- 1 file changed, 1 insertion(+), 32 deletions(-) diff --git a/include/hw/virtio/virtio-access.h b/include/hw/virtio/virtio-access.h index a86819ef2fe..4341af9cb0f 100644 --- a/includ

[PATCH v3 2/5] hw/misc: add ADM1272 device

The ADM1272 is a PMBus compliant Hot Swap Controller and Digital Power Monitor by Analog Devices. This commit adds support for interfacing with it, and support for setting and monitoring sensor limits. Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/ADM1272.pdf Re

[RFC PATCH 19/25] hw/virtio: Use LD_CONVERT macro to emit 16-bit unsigned load/store code

Signed-off-by: Philippe Mathieu-Daudé --- include/hw/virtio/virtio-access.h | 29 + 1 file changed, 1 insertion(+), 28 deletions(-) diff --git a/include/hw/virtio/virtio-access.h b/include/hw/virtio/virtio-access.h index 37e1e6ea535..594247f6e35 100644 --- a/include/

[RFC PATCH 20/25] hw/virtio: Introduce VIRTIO_ST_CONVERT() macro

To be able to add more load/store operations, introduce the VIRTIO_ST_CONVERT() macro. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/virtio/virtio-access.h | 32 +++ 1 file changed, 32 insertions(+) diff --git a/include/hw/virtio/virtio-access.h b/include/hw/

[RFC PATCH 15/25] exec/memory: Add methods for aligned pointer access (address space)

Signed-off-by: Philippe Mathieu-Daudé --- include/exec/memory.h | 11 +++ include/exec/memory_ldst_cached.h.inc | 20 2 files changed, 27 insertions(+), 4 deletions(-) diff --git a/include/exec/memory.h b/include/exec/memory.h index 175d7151a5d..7eeab

[RFC PATCH 12/25] qemu/bswap: Use LDST_CONVERT macro to emit 32-bit load/store functions

Signed-off-by: Philippe Mathieu-Daudé --- include/qemu/bswap.h | 37 + 1 file changed, 5 insertions(+), 32 deletions(-) diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h index ee86dc4ed8c..a041be94a7a 100644 --- a/include/qemu/bswap.h +++ b/include/qemu

[RFC PATCH 18/25] hw/virtio: Introduce VIRTIO_LD_CONVERT() macro

To be able to add more load/store operations, introduce the VIRTIO_LD_CONVERT() macro. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/virtio/virtio-access.h | 29 + 1 file changed, 29 insertions(+) diff --git a/include/hw/virtio/virtio-access.h b/include/hw/vi

[RFC PATCH 16/25] exec/memory: Add methods for aligned pointer access (physical memory)

Signed-off-by: Philippe Mathieu-Daudé --- include/exec/memory.h | 5 + 1 file changed, 5 insertions(+) diff --git a/include/exec/memory.h b/include/exec/memory.h index 7eeabbceef3..28c0e68e7d8 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -2337,6 +2337,11 @@ static inline

[RFC PATCH 08/25] qemu/bswap: Use ST_CONVERT() macro to emit 16-bit load/store functions

Signed-off-by: Philippe Mathieu-Daudé --- include/qemu/bswap.h | 17 ++--- 1 file changed, 2 insertions(+), 15 deletions(-) diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h index 86f5ded6acf..4e2bd2e97ee 100644 --- a/include/qemu/bswap.h +++ b/include/qemu/bswap.h @@ -350,11

[RFC PATCH 17/25] hw/virtio: Use correct type sizes

Use uint16_t for unsigned 16-bit data and uint32_t for unsigned 32-bit. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/virtio/virtio-access.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/hw/virtio/virtio-access.h b/include/hw/virtio/virtio-access.h index

[RFC PATCH 10/25] qemu/bswap: Use LD_CONVERT macro to emit 16-bit signed load/store code

Signed-off-by: Philippe Mathieu-Daudé --- include/qemu/bswap.h | 18 +- 1 file changed, 1 insertion(+), 17 deletions(-) diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h index c2fd4f31d20..af9b18f373d 100644 --- a/include/qemu/bswap.h +++ b/include/qemu/bswap.h @@ -343,13

[RFC PATCH 13/25] qemu/bswap: Use LDST_CONVERT macro to emit 64-bit load/store functions

Signed-off-by: Philippe Mathieu-Daudé --- include/qemu/bswap.h | 33 + 1 file changed, 1 insertion(+), 32 deletions(-) diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h index a041be94a7a..4cd120ca014 100644 --- a/include/qemu/bswap.h +++ b/include/qemu/bswa

[RFC PATCH 07/25] qemu/bswap: Introduce ST_CONVERT() macro

To be able to add more load/store operations, introduce the ST_CONVERT() macro. Signed-off-by: Philippe Mathieu-Daudé --- include/qemu/bswap.h | 17 + 1 file changed, 17 insertions(+) diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h index 2d3bb8bbedd..86f5ded6acf 100644

[RFC PATCH 14/25] qemu/bswap: Introduce load/store for aligned pointer

When the pointer alignment is known to be safe, we can directly swap the data in place, without having to rely on the compiler builtin code. Load/store methods expecting aligned pointer use the 'a' infix. For example to read a 16-bit unsigned value stored in little endianess at an unaligned pointe

[RFC PATCH 09/25] qemu/bswap: Introduce LD_CONVERT() macro

To be able to add more load/store operations, introduce the LD_CONVERT() macro. Signed-off-by: Philippe Mathieu-Daudé --- include/qemu/bswap.h | 19 +++ 1 file changed, 19 insertions(+) diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h index 4e2bd2e97ee..c2fd4f31d20 10064

[RFC PATCH 04/25] exec/memory_ldst_phys: Use correct type sizes

Use uint8_t for (unsigned) byte, and uint16_t for (unsigned) 16-bit word. Signed-off-by: Philippe Mathieu-Daudé --- include/exec/memory_ldst_phys.h.inc | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/include/exec/memory_ldst_phys.h.inc b/include/exec/memory_

[RFC PATCH 06/25] exec/memory: Use correct type size

Use uint8_t for (unsigned) byte. Signed-off-by: Philippe Mathieu-Daudé --- include/exec/memory.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/exec/memory.h b/include/exec/memory.h index c8b90889241..175d7151a5d 100644 --- a/include/exec/memory.h +++ b/include/exec/

[RFC PATCH 11/25] qemu/bswap: Use LD_CONVERT macro to emit 16-bit unsigned load/store code

Signed-off-by: Philippe Mathieu-Daudé --- include/qemu/bswap.h | 18 +- 1 file changed, 1 insertion(+), 17 deletions(-) diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h index af9b18f373d..ee86dc4ed8c 100644 --- a/include/qemu/bswap.h +++ b/include/qemu/bswap.h @@ -336,13

[RFC PATCH 05/25] exec/memory_ldst_cached: Use correct type size

Use uint16_t for (unsigned) 16-bit word. Signed-off-by: Philippe Mathieu-Daudé --- include/exec/memory_ldst_cached.h.inc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/exec/memory_ldst_cached.h.inc b/include/exec/memory_ldst_cached.h.inc index c33449d0cd5..d7834

[RFC PATCH 02/25] exec/memory_ldst_phys: Sort declarations

To ease the file review, sort the declarations by the size of the access (8, 16, 32). Simple code movement, no logical change. Signed-off-by: Philippe Mathieu-Daudé --- include/exec/memory_ldst_phys.h.inc | 78 ++--- 1 file changed, 39 insertions(+), 39 deletions(-) diff

[RFC PATCH 01/25] exec/memory_ldst_cached: Sort declarations

To ease the file review, sort the declarations by the size of the access (8, 16, 32). Simple code movement, no logical change. Signed-off-by: Philippe Mathieu-Daudé --- include/exec/memory_ldst_cached.h.inc | 46 +-- 1 file changed, 23 insertions(+), 23 deletions(-) diff

[RFC PATCH 03/25] exec/memory_ldst: Use correct type sizes

Use uint8_t for (unsigned) byte, and uint16_t for (unsigned) 16-bit word. Signed-off-by: Philippe Mathieu-Daudé --- include/exec/memory_ldst.h.inc | 16 memory_ldst.c.inc | 20 ++-- 2 files changed, 18 insertions(+), 18 deletions(-) diff --git a/inc

[RFC PATCH 00/25] exec: Add load/store API for aligned pointers

Hi, This series is the result of a chat with Stefan after looking at Peter response to Bibo on a problem with unoptimized memcpy() leading to atomic issues: https://www.mail-archive.com/qemu-devel@nongnu.org/msg808209.html MIPS R6 (32/64-bit) does support unaligned accesses, but for the older rel

RE: [RFC PATCH v2 5/6] hw/arm/virt-acpi-build: Add PPTT table

> From: Andrew Jones [mailto:drjo...@redhat.com] > Sent: Tuesday, May 18, 2021 8:42 AM > To: Salil Mehta > Cc: wangyanan (Y) ; Peter Maydell > ; Michael S . Tsirkin ; Wanghaibin > (D) ; qemu-devel@nongnu.org; Shannon Zhao > ; qemu-...@nongnu.org; Alistair Francis > ; Zengtao (B) ; > yangyicong ; y

Re: [PATCH v3 10/15] qemu_iotests: extent QMP socket timeout when using valgrind

On 18/05/2021 16:26, John Snow wrote: On 5/18/21 9:58 AM, Emanuele Giuseppe Esposito wrote: So the current plan I have for _qmp_timer is: - As Max suggested, move it in __init__ and check there for the wrapper contents. If we need to block forever (gdb, valgrind), we set it to None. Othe

[PATCH v2 0/3] To add HMP interface to dump PCI MSI-X table/PBA

This patch is to introduce the new HMP command to dump the MSI-X table/PBA. Here is the RFC v1: https://lists.gnu.org/archive/html/qemu-devel/2021-04/msg04673.html The idea was inspired by below discussion: https://lists.gnu.org/archive/html/qemu-devel/2021-03/msg09020.html (qemu) info msix -

[PATCH v2 1/3] msix/hmp: add hmp interface to dump MSI-X info

This patch is to add the HMP interface to dump MSI-X table and PBA, in order to help diagnose the loss of IRQ issue in VM (e.g., if an MSI-X vector is erroneously masked permanently). Here is the example with vhost-scsi: (qemu) info msix /machine/peripheral/vscsi0 Msg L.Addr Msg U.Addr Msg Data

[PATCH v2 3/3] virtio-pci/hmp: implement device specific hmp interface

This patch is to implement the device specific interface to dump the mapping between virtio queues and vectors. (qemu) info msix -d /machine/peripheral/vscsi0 Msg L.Addr Msg U.Addr Msg Data Vect Ctrl 0xfee0 0x 0x4041 0x 0xfee0 0x 0x4051 0x 0xfee000

[PATCH v2 2/3] msix/hmp: add interface to dump device specific info

While the previous patch is to dump the MSI-X table, sometimes we may need to dump device specific data, e.g., to help match the vector with the specific device queue. This patch is to add the PCI device specific interface to help dump those information. Any PCI device class may implement this PCI

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