[PULL 17/21] fw_cfg: add etc/msr_feature_control

The file already existed, but nobody had noticed the warning until now. Add it at the bottom, since that is where unknown files go in legacy mode. Fixes: 217f1b4a721 ("target-i386: Publish advised value of MSR_IA32_FEATURE_CONTROL via fw_cfg") Signed-off-by: Paolo Bonzini --- hw/nvram/fw_cfg.c

[PULL 15/21] meson: do not use python.full_path() unnecessarily

The "python" variable is an external program and can be passed directly to custom_target. This avoids the need to look it up multiple times, which was previously silent but is now explicit in recent Meson versions. Signed-off-by: Paolo Bonzini --- ui/meson.build | 2 +- 1 file changed, 1 insert

[PATCH v10 06/10] hvf: arm: Implement -cpu host

Now that we have working system register sync, we push more target CPU properties into the virtual machine. That might be useful in some situations, but is not the typical case that users want. So let's add a -cpu host option that allows them to explicitly pass all CPU capabilities of their host C

[PULL 14/21] meson: look up cp and dtrace with find_program()

Avoid that meson prints a "Program xyz found" test once per custom_target. Signed-off-by: Paolo Bonzini --- pc-bios/keymaps/meson.build | 3 ++- trace/meson.build | 5 +++-- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/pc-bios/keymaps/meson.build b/pc-bios/keymaps/mes

[PULL 16/21] meson: remove dead variable

Signed-off-by: Paolo Bonzini --- ui/meson.build | 2 -- 1 file changed, 2 deletions(-) diff --git a/ui/meson.build b/ui/meson.build index 7faa42eb3f..a73beb0e54 100644 --- a/ui/meson.build +++ b/ui/meson.build @@ -105,8 +105,6 @@ if config_host.has_key('CONFIG_SPICE') and config_host.has_key('C

[PULL 12/21] docs/system: move x86 CPU configuration to a separate document

Currently, cpu-models-x86.rst.inc is included in target-i386.rst directly. To make the toctree more homogeneous when adding more documentation, include it through a first-class .rst file. Together with the previous changes to the man page skeletons, this also frees "===" for the headings, so that

[PATCH v10 04/10] hvf: Add Apple Silicon support

With Apple Silicon available to the masses, it's a good time to add support for driving its virtualization extensions from QEMU. This patch adds all necessary architecture specific code to get basic VMs working, including save/restore. Known limitations: - WFI handling is missing (follows in l

[PULL 13/21] meson.build: Do not look for VNC-related libraries if have_system is not set

From: Thomas Huth When running "./configure --static --disable-system" there is currently a warning if the static version of libpng is missing: WARNING: Static library 'png16' not found for dependency 'libpng', may not be statically linked Since it does not make sense to look for the VNC-rela

Re: [PATCH v9 07/11] hvf: arm: Implement PSCI handling

On 13.09.21 13:44, Peter Maydell wrote: > On Mon, 13 Sept 2021 at 12:07, Alexander Graf wrote: >> >> On 13.09.21 10:54, Peter Maydell wrote: >>> Something in here should be checking whether the insn the guest >>> used matches the PSCI conduit configured for the VM, ie >>> what arm_is_psci_call()

[PULL 10/21] docs: standardize directory index to --- with overline

Use a standard heading format for the index.rst file in a directory. Using overlines makes it clear that individual documents can use e.g. === for chapter titles and --- for section titles, as suggested in the Linux kernel guidelines[1]. They could do it anyway, because documents included in a toc

[PULL 11/21] docs/system: standardize man page sections to --- with overline

Man pages in docs/system use file inclusion heavily. Use headings with overlines in the main files, so that the same included file work well from both manuals and man pages. This style of heading is a bit more heavy-weight, so it is not used by the other man pages in interop/ and tools/. If in t

[PULL 08/21] target/i386: Added vVMLOAD and vVMSAVE feature

From: Lara Lazier The feature allows the VMSAVE and VMLOAD instructions to execute in guest mode without causing a VMEXIT. (APM2 15.33.1) Signed-off-by: Lara Lazier Signed-off-by: Paolo Bonzini --- target/i386/cpu.h| 2 ++ target/i386/svm.h| 2 ++ ta

[PULL 09/21] docs: standardize book titles to === with overline

Documents within a Sphinx manual are separate files and therefore can use different conventions for headings. However, keeping some consistency is useful so that included files are easy to get right. This patch uses a standard heading format for book titles, so that it is obvious when a file sits

[PULL 06/21] target/i386: Added ignore TPR check in ctl_has_irq

From: Lara Lazier The APM2 states that if V_IGN_TPR is nonzero, the current virtual interrupt ignores the (virtual) TPR. Signed-off-by: Lara Lazier Signed-off-by: Paolo Bonzini --- target/i386/tcg/sysemu/svm_helper.c | 5 + 1 file changed, 5 insertions(+) diff --git a/target/i386/tcg/sys

[PULL 04/21] target/i386: Moved int_ctl into CPUX86State structure

From: Lara Lazier Moved int_ctl into the CPUX86State structure. It removes some unnecessary stores and loads, and prepares for tracking the vIRQ state even when it is masked due to vGIF. Signed-off-by: Lara Lazier Signed-off-by: Paolo Bonzini --- target/i386/cpu.c| 2 +-

[PULL 07/21] target/i386: Added changed priority check for VIRQ

From: Lara Lazier Writes to cr8 affect v_tpr. This could set or unset an interrupt request as the priority might have changed. Signed-off-by: Lara Lazier Signed-off-by: Paolo Bonzini --- target/i386/cpu.h| 15 +++ target/i386/tcg/sysemu/misc_helper.c | 7 +

[PULL 20/21] Fix nvmm_ram_block_added() function arguments

From: Reinoud Zandijk A parameter max_size was added to the RAMBlockNotifier ram_block_added function. Use the max_size for pre allocation of hva space. Signed-off-by: Reinoud Zandijk Message-Id: <20210718134650.1191-3-rein...@netbsd.org> Signed-off-by: Paolo Bonzini --- target/i386/nvmm/nvmm

[PULL 03/21] target/i386: Added VGIF feature

From: Lara Lazier VGIF allows STGI and CLGI to execute in guest mode and control virtual interrupts in guest mode. When the VGIF feature is enabled then: * executing STGI in the guest sets bit 9 of the VMCB offset 60h. * executing CLGI in the guest clears bit 9 of the VMCB offset 60h. Signed-o

[PULL 02/21] target/i386: VMRUN and VMLOAD canonicalizations

From: Lara Lazier APM2 requires that VMRUN and VMLOAD canonicalize (sign extend to 63 from 48/57) all base addresses in the segment registers that have been respectively loaded. Signed-off-by: Lara Lazier Message-Id: <20210804113058.45186-1-laramglaz...@gmail.com> Signed-off-by: Paolo Bonzini

[PULL 00/21] x86, docs, meson changes for 2021-09-13

The following changes since commit bd662023e683850c085e98c8ff8297142c2dd9f2: Merge remote-tracking branch 'remotes/mcayland/tags/qemu-openbios-20210908' into staging (2021-09-08 11:06:17 +0100) are available in the Git repository at: https://gitlab.com/bonzini/qemu.git tags/for-upstream fo

[PULL 01/21] target/i386: add missing bits to CR4_RESERVED_MASK

From: Daniel P. Berrangé Booting Fedora kernels with -cpu max hangs very early in boot. Disabling the la57 CPUID bit fixes the problem. git bisect traced the regression to commit 213ff024a2f92020290296cb9dc29c2af3d4a221 (HEAD, refs/bisect/bad) Author: Lara Lazier Date: Wed Jul 21 17:26:

[PULL 05/21] target/i386: Added VGIF V_IRQ masking capability

From: Lara Lazier VGIF provides masking capability for when virtual interrupts are taken. (APM2) Signed-off-by: Lara Lazier Signed-off-by: Paolo Bonzini --- target/i386/cpu.c | 7 +-- target/i386/cpu.h | 2 ++ target/i386/tcg/sysemu/svm_helper.c | 12

Re: [PATCH v8 15/19] hvf: arm: Implement -cpu host

On 13.09.21 13:48, Peter Maydell wrote: > On Mon, 13 Sept 2021 at 12:46, Alexander Graf wrote: >> >> On 13.09.21 12:52, Peter Maydell wrote: >>> On Mon, 13 Sept 2021 at 11:46, Alexander Graf wrote: Why? You only get to this code path if you already selected -accel hvf. If even a simpl

Re: [RFC v3 01/32] RFC: docs: add supported host CPUs section

On Mon, 13 Sept 2021 at 12:32, Marc-André Lureau wrote: > > Hi > > On Tue, Sep 7, 2021 at 4:34 PM Peter Maydell wrote: >> >> On Tue, 7 Sept 2021 at 13:23, wrote: >> > >> > From: Marc-André Lureau >> > >> > I was looking for such documentation, but couldn't find it. >> >> Yes; this is definitely

Re: [PATCH v8 15/19] hvf: arm: Implement -cpu host

On Mon, 13 Sept 2021 at 12:46, Alexander Graf wrote: > > > On 13.09.21 12:52, Peter Maydell wrote: > > On Mon, 13 Sept 2021 at 11:46, Alexander Graf wrote: > >> Why? You only get to this code path if you already selected -accel hvf. > >> If even a simple "create scratch vcpu" syscall failed then,

Re: [PATCH v2 07/17] iotests.py: filter out successful output of qemu-img crate

Subject: s/crate/create/ On 20.07.21 13:38, Vladimir Sementsov-Ogievskiy wrote: The only "feature" of this "Formatting ..." line is that we have to update it every time we add new option. Let's drop it. Sounds good to me. Signed-off-by: Vladimir Sementsov-Ogievskiy --- tests/qemu-iotests/

Re: [PATCH v8 15/19] hvf: arm: Implement -cpu host

On 13.09.21 12:52, Peter Maydell wrote: > On Mon, 13 Sept 2021 at 11:46, Alexander Graf wrote: >> Why? You only get to this code path if you already selected -accel hvf. >> If even a simple "create scratch vcpu" syscall failed then, pretty >> failure when you define -cpu host is the last thing y

Re: [PATCH v9 07/11] hvf: arm: Implement PSCI handling

On Mon, 13 Sept 2021 at 12:07, Alexander Graf wrote: > > > On 13.09.21 10:54, Peter Maydell wrote: > > Something in here should be checking whether the insn the guest > > used matches the PSCI conduit configured for the VM, ie > > what arm_is_psci_call() does after your patch 10. > > > It's yet an

Re: [PATCH v2] include/block.h: remove outdated comment

Am 03.09.2021 um 13:38 hat Emanuele Giuseppe Esposito geschrieben: > There are a couple of errors in bdrv_drained_begin header comment: > - block_job_pause does not exist anymore, it has been replaced > with job_pause in b15de82867 > - job_pause is automatically invoked as a .drained_begin callba

Re: [RFC v3 01/32] RFC: docs: add supported host CPUs section

Hi On Tue, Sep 7, 2021 at 4:34 PM Peter Maydell wrote: > On Tue, 7 Sept 2021 at 13:23, wrote: > > > > From: Marc-André Lureau > > > > I was looking for such documentation, but couldn't find it. > > Yes; this is definitely something we should document, and in > the build-platforms doc is as goo

Re: [PATCH v2 06/17] iotest 065: explicit compression type

On 20.07.21 13:38, Vladimir Sementsov-Ogievskiy wrote: The test checks different options. It of course fails if set IMGOPTS='compression_type=zstd'. So, let's be explicit in what compression type we want and independent of IMGOPTS. Test both existing compression types. Signed-off-by: Vladimir Se

Re: [PATCH v2 04/17] iotests.py: rewrite default luks support in qemu_img

On 20.07.21 13:38, Vladimir Sementsov-Ogievskiy wrote: Move the logic to more generic qemu_img_pipe_and_status(). Also behave better when we have several -o options. And reuse argument parser of course. Signed-off-by: Vladimir Sementsov-Ogievskiy --- tests/qemu-iotests/iotests.py | 36 +++

Re: [PATCH v9 07/11] hvf: arm: Implement PSCI handling

On 13.09.21 10:54, Peter Maydell wrote: > On Mon, 13 Sept 2021 at 00:08, Alexander Graf wrote: >> We need to handle PSCI calls. Most of the TCG code works for us, >> but we can simplify it to only handle aa64 mode and we need to >> handle SUSPEND differently. >> >> This patch takes the TCG code

Re: [PATCH] tcg/arm: Reduce vector alignment requirement for NEON

On Sun, Sep 12, 2021 at 10:49:25AM -0700, Richard Henderson wrote: > With arm32, the ABI gives us 8-byte alignment for the stack. > While it's possible to realign the stack to provide 16-byte alignment, > it's far easier to simply not encode 16-byte alignment in the > VLD1 and VST1 instructions tha

Re: [PATCH v2 1/3] monitor: Add HMP and QMP interfaces

On Mon, Sep 13, 2021 at 10:35:42AM +0100, Daniel P. Berrangé wrote: > On Fri, Sep 10, 2021 at 02:46:00PM +0100, Daniel P. Berrangé wrote: > > On Fri, Sep 10, 2021 at 06:22:56PM +0800, Yang Zhong wrote: > > > The QMP and HMP interfaces can be used by monitor or QMP tools to retrieve > > > the SGX in

Re: [PATCH v8 15/19] hvf: arm: Implement -cpu host

On Mon, 13 Sept 2021 at 11:46, Alexander Graf wrote: > Why? You only get to this code path if you already selected -accel hvf. > If even a simple "create scratch vcpu" syscall failed then, pretty > failure when you define -cpu host is the last thing you care about. Any > CPU creation would fail.

Re: [PATCH v2 03/17] iotests: drop qemu_img_verbose() helper

On 20.07.21 13:38, Vladimir Sementsov-Ogievskiy wrote: qemu_img_verbose() has a drawback of not going through generic qemu_img_pipe_and_status(). qemu_img_verbose() is not very popular, so update the only two users to qemu_img_log() and drop qemu_img_verbose() at all. Signed-off-by: Vladimir Sem

Re: [PATCH v2 1/3] monitor: Add HMP and QMP interfaces

On Fri, Sep 10, 2021 at 02:39:04PM +0200, Philippe Mathieu-Daudé wrote: > On 9/10/21 12:22 PM, Yang Zhong wrote: > > The QMP and HMP interfaces can be used by monitor or QMP tools to retrieve > > the SGX information from VM side when SGX is enabled on Intel platform. > > > > Signed-off-by: Yang Zh

Re: [PATCH v2 2/3] qmp: Add the qmp_query_sgx_capabilities()

On Fri, Sep 10, 2021 at 02:41:08PM +0200, Philippe Mathieu-Daudé wrote: > On 9/10/21 12:22 PM, Yang Zhong wrote: > > Libvirt can use qmp_query_sgx_capabilities() to get the host > > sgx capabilities to decide how to allocate SGX EPC size to VM. > > > > Signed-off-by: Yang Zhong > > --- > > hw/i3

Re: [PATCH v8 15/19] hvf: arm: Implement -cpu host

On 13.09.21 10:28, Peter Maydell wrote: > On Sun, 12 Sept 2021 at 21:23, Alexander Graf wrote: >> >> On 15.06.21 12:56, Peter Maydell wrote: >>> On Wed, 19 May 2021 at 21:23, Alexander Graf wrote: Now that we have working system register sync, we push more target CPU properties into t

Re: [PATCH v2 02/17] iotests.py: qemu_img*("create"): support IMGOPTS='compression_type=zstd'

On 20.07.21 13:38, Vladimir Sementsov-Ogievskiy wrote: Adding support of IMGOPTS (like in bash tests) allows user to pass a lot of different options. Still, some may require additional logic. Now we want compression_type option, so add some smart logic around it: ignore compression_type=zstd in

Re: [PATCH] gitlab-ci: Make more custom runner jobs manual, and don't allow failure

On Mon, Sep 13, 2021 at 11:35:29AM +0100, Peter Maydell wrote: > On Mon, 13 Sept 2021 at 11:32, Daniel P. Berrangé wrote: > > > > On Mon, Sep 13, 2021 at 11:19:48AM +0100, Peter Maydell wrote: > > > Currently we define a lot of jobs for our custom runners: > > > for both aarch64 and s390x we have

Re: [PATCH] gitlab-ci: Make more custom runner jobs manual, and don't allow failure

On Mon, 13 Sept 2021 at 11:32, Daniel P. Berrangé wrote: > > On Mon, Sep 13, 2021 at 11:19:48AM +0100, Peter Maydell wrote: > > Currently we define a lot of jobs for our custom runners: > > for both aarch64 and s390x we have > > - all-linux-static > > - all > > - alldbg > > - clang (manual) >

Re: [PATCH] gitlab-ci: Make more custom runner jobs manual, and don't allow failure

On Mon, Sep 13, 2021 at 11:19:48AM +0100, Peter Maydell wrote: > Currently we define a lot of jobs for our custom runners: > for both aarch64 and s390x we have > - all-linux-static > - all > - alldbg > - clang (manual) > - tci > - notcg (manual) > > This is overkill. The main reason to run

Re: [PATCH v8 16/19] hvf: arm: Implement PSCI handling

+Markus On 9/13/21 12:06 PM, Alexander Graf wrote: > On 12.09.21 23:40, Richard Henderson wrote: >> On 9/12/21 2:37 PM, Alexander Graf wrote: >>> >>> On 12.09.21 23:20, Richard Henderson wrote: On 9/12/21 1:36 PM, Alexander Graf wrote: >> I think the callsites would be clearer if you made

Re: [PATCH v8 16/19] hvf: arm: Implement PSCI handling

On 12.09.21 23:40, Richard Henderson wrote: > On 9/12/21 2:37 PM, Alexander Graf wrote: >> >> On 12.09.21 23:20, Richard Henderson wrote: >>> On 9/12/21 1:36 PM, Alexander Graf wrote: > I think the callsites would be clearer if you made the function > return true for "PSCI call handled",

[PATCH] gitlab-ci: Make more custom runner jobs manual, and don't allow failure

Currently we define a lot of jobs for our custom runners: for both aarch64 and s390x we have - all-linux-static - all - alldbg - clang (manual) - tci - notcg (manual) This is overkill. The main reason to run on these hosts is to get coverage for the host architecture; we can leave the handl

Re: [PATCH RFC server v2 01/11] vfio-user: build library

On 9/12/21 12:29 AM, John Levon wrote: > On Fri, Sep 10, 2021 at 05:20:09PM +0200, Philippe Mathieu-Daudé wrote: >> On 8/27/21 7:53 PM, Jagannathan Raman wrote: >>> add the libvfio-user library as a submodule. build it as a cmake >>> subproject. >>> >>> Signed-off-by: Elena Ufimtseva >>> Signed-of

[PATCH v2 11/12] target/arm: Optimize MVE VSLI and VSRI

Optimize the MVE shift-and-insert insns by using TCG vector ops when possible. Signed-off-by: Peter Maydell --- target/arm/translate-mve.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/arm/translate-mve.c b/target/arm/translate-mve.c index 5d66f70657e..1fd71c9a1e

Re: [PATCH] accel/tcg: assert insn_idx will always be valid before plugin_inject_cb

Richard Henderson writes: > On 9/3/21 7:59 AM, Alex Bennée wrote: >> Coverity doesn't know enough about how we have arranged our plugin TCG >> ops to know we will always have incremented insn_idx before injecting >> the callback. Let us assert it for the benefit of Coverity and protect >> ourse

[PATCH v2 07/12] target/arm: Optimize MVE VDUP

Optimize the MVE VDUP insns by using TCG vector ops when possible. Signed-off-by: Peter Maydell --- target/arm/translate-mve.c | 12 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/target/arm/translate-mve.c b/target/arm/translate-mve.c index d30c7e57ea3..13de55242e2 1

[PATCH v2 09/12] target/arm: Optimize MVE VSHL, VSHR immediate forms

Optimize the MVE VSHL and VSHR immediate forms by using TCG vector ops when possible. Signed-off-by: Peter Maydell --- target/arm/translate-mve.c | 83 +- 1 file changed, 63 insertions(+), 20 deletions(-) diff --git a/target/arm/translate-mve.c b/target/arm/t

Re: [PULL 0/9] tcg patch queue

On Sun, 12 Sept 2021 at 16:58, Richard Henderson wrote: > > Note that I've extended the expiration date of my gpg key > and have uploaded it to keyserver.ubuntu.com. > > > r~ > > > The following changes since commit 99c44988d5ba1866a411450c877ed818b1b70081: > > Merge remote-tracking branch 'remo

[PATCH v2 02/12] target/arm: Enforce that FPDSCR.LTPSIZE is 4 on inbound migration

Architecturally, for an M-profile CPU with the LOB feature the LTPSIZE field in FPDSCR is always constant 4. QEMU's implementation enforces this everywhere, except that we don't check that it is true in incoming migration data. We're going to add come in gen_update_fp_context() which relies on th

[PATCH v2 05/12] target/arm: Optimize MVE arithmetic ops

Optimize MVE arithmetic ops when we have a TCG vector operation we can use. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/arm/translate-mve.c | 20 +++- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/t

[PATCH v2 04/12] target/arm: Optimize MVE logic ops

When not predicating, implement the MVE bitwise logical insns directly using TCG vector operations. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- v1->v2: new mve_no_predication() function --- target/arm/translate-mve.c | 51

[PATCH v2 10/12] target/arm: Optimize MVE VSHLL and VMOVL

Optimize the MVE VSHLL insns by using TCG vector ops when possible. This includes the VMOVL insn, which we handle in mve.decode as "VSHLL with zero shift count". Signed-off-by: Peter Maydell --- The cases here that I've implemented with ANDI then shift could also be implemented as shift-then-shif

[PATCH v2 03/12] target/arm: Add TB flag for "MVE insns not predicated"

Our current codegen for MVE always calls out to helper functions, because some byte lanes might be predicated. The common case is that in fact there is no predication active and all lanes should be updated together, so we can produce better code by detecting that and using the TCG generic vector i

[PATCH v2 06/12] target/arm: Optimize MVE VNEG, VABS

Optimize the MVE VNEG and VABS insns by using TCG vector ops when possible. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/arm/translate-mve.c | 32 ++-- 1 file changed, 22 insertions(+), 10 deletions(-) d

[PATCH v2 12/12] target/arm: Optimize MVE 1op-immediate insns

Optimize the MVE 1op-immediate insns (VORR, VBIC, VMOV) to use TCG vector ops when possible. Signed-off-by: Peter Maydell --- target/arm/translate-mve.c | 26 +- 1 file changed, 21 insertions(+), 5 deletions(-) diff --git a/target/arm/translate-mve.c b/target/arm/transla

[PATCH v2 00/12] target/arm: Use TCG vector ops for MVE

This patchset uses the TCG vector ops for some MVE instructions. We can only do this when we know that none of the MVE lanes are predicated, ie when neither tail predication nor VPT predication nor ECI partial insn execution are happening. Changes v1->v2: The major change is that instead of just

[PATCH v2 01/12] target/arm: Avoid goto_tb if we're trying to exit to the main loop

Currently gen_jmp_tb() assumes that if it is called then the jump it is handling is the only reason that we might be trying to end the TB, so it will use goto_tb if it can. This is usually the case: mostly "we did something that means we must end the TB" happens on a non-branch instruction. Howev

[PULL 1/5] qapi: Fix a botched type annotation

Mypy is unhappy: $ mypy --config-file=scripts/qapi/mypy.ini `git-ls-files scripts/qapi/\*py` scripts/qapi/common.py:208: error: Function is missing a return type annotation scripts/qapi/common.py:227: error: Returning Any from function declared to return "str" Messed up in commit cc

[PULL 5/5] qapi: Fix bogus error for 'if': { 'not': '' }

Signed-off-by: Markus Armbruster Message-Id: <20210908045428.2689093-6-arm...@redhat.com> Reviewed-by: Marc-André Lureau [check_infix()'s type hint fixed] --- scripts/qapi/expr.py | 21 + tests/qapi-schema/bad-if-not.err | 2 +- 2 files changed, 14 insertions(+),

[PATCH v2 08/12] target/arm: Optimize MVE VMVN

Optimize the MVE VMVN insn by using TCG vector ops when possible. Signed-off-by: Peter Maydell --- target/arm/translate-mve.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/translate-mve.c b/target/arm/translate-mve.c index 13de55242e2..4583e22f21c 100644 --- a/ta

[PULL 2/5] qapi: Drop Indentation.__bool__()

Intentation.__bool__() is not worth its keep: it has just one user, which can just as well check .__str__() instead. Signed-off-by: Markus Armbruster Message-Id: <20210908045428.2689093-3-arm...@redhat.com> Reviewed-by: Marc-André Lureau --- scripts/qapi/common.py | 9 +++-- 1 file changed,

[PULL 0/5] QAPI patches patches for 2021-09-13

The following changes since commit abf7aee72ea66944a62962603e4c2381f5e473e7: Merge remote-tracking branch 'remotes/thuth-gitlab/tags/s390x-pull-request-2021-09-07' into staging (2021-09-07 17:46:13 +0100) are available in the Git repository at: git://repo.or.cz/qemu/armbru.git tags/pull-qa

[PULL 4/5] tests/qapi-schema: Cover 'not' condition with empty argument

We flag this, but the error message is bogus: bad-if-not.json:2: 'if' condition [] of struct is useless The next commit will fix it. Signed-off-by: Markus Armbruster Message-Id: <20210908045428.2689093-5-arm...@redhat.com> Reviewed-by: Marc-André Lureau --- tests/qapi-schema/bad-if-not.er

[PULL 3/5] qapi: Bury some unused code in class Indentation

.__int__() has never been used. Drop it. .decrease() raises ArithmeticError when asked to decrease indentation level below zero. Nothing catches it. It's a programming error. Dumb down to assert. Signed-off-by: Markus Armbruster Message-Id: <20210908045428.2689093-4-arm...@redhat.com> Reviewe

Re: [PATCH v2 1/3] monitor: Add HMP and QMP interfaces

On Fri, Sep 10, 2021 at 02:46:00PM +0100, Daniel P. Berrangé wrote: > On Fri, Sep 10, 2021 at 06:22:56PM +0800, Yang Zhong wrote: > > The QMP and HMP interfaces can be used by monitor or QMP tools to retrieve > > the SGX information from VM side when SGX is enabled on Intel platform. > > > > Signe

Re: [PATCH] qapi: define cleanup function for g_autoptr(Error)

Paolo Bonzini writes: > On 13/09/21 07:23, Markus Armbruster wrote: >> Paolo Bonzini writes: >> >>> Allow replacing calls to error_free() with g_autoptr(Error) >>> declarations. >>> >>> Signed-off-by: Paolo Bonzini >>> --- >>> include/qapi/error.h | 2 ++ >>> 1 file changed, 2 insertions(+)

Re: [PATCH v9 07/11] hvf: arm: Implement PSCI handling

On Mon, 13 Sept 2021 at 00:08, Alexander Graf wrote: > > We need to handle PSCI calls. Most of the TCG code works for us, > but we can simplify it to only handle aa64 mode and we need to > handle SUSPEND differently. > > This patch takes the TCG code as template and duplicates it in HVF. > > To te

Re: [PATCH v9 11/11] hvf: arm: Adhere to SMCCC 1.3 section 5.2

On Mon, 13 Sept 2021 at 00:08, Alexander Graf wrote: > > The SMCCC 1.3 spec section 5.2 says > > The Unknown SMC Function Identifier is a sign-extended value of (-1) > that is returned in the R0, W0 or X0 registers. An implementation must > return this error code when it receives: > > *

Re: [qemu-web v2 PATCH] Update the information about the required version of macOS

On Mon, Sep 13, 2021 at 10:36:23AM +0200, Thomas Huth wrote: > On 13/09/2021 10.28, Daniel P. Berrangé wrote: > > On Mon, Sep 13, 2021 at 10:04:25AM +0200, Thomas Huth wrote: > > > On 13/09/2021 09.35, Howard Spoelstra wrote: > > > > > > > > > > > > On Mon, Sep 13, 2021 at 8:21 AM Thomas Huth >

Re: [PATCH v9 06/11] hvf: arm: Implement -cpu host

On 9/13/21 1:07 AM, Alexander Graf wrote: > Now that we have working system register sync, we push more target CPU > properties into the virtual machine. That might be useful in some > situations, but is not the typical case that users want. > > So let's add a -cpu host option that allows them to

Re: [PATCH v9 01/11] arm: Move PMC register definitions to cpu.h

On Mon, 13 Sept 2021 at 00:07, Alexander Graf wrote: > > We will need PMC register definitions in accel specific code later. > Move all constant definitions to common arm headers so we can reuse > them. > > Signed-off-by: Alexander Graf > --- > target/arm/cpu.h| 44 ++

Re: [PATCH v9 10/11] arm: tcg: Adhere to SMCCC 1.3 section 5.2

On Mon, 13 Sept 2021 at 00:08, Alexander Graf wrote: > > The SMCCC 1.3 spec section 5.2 says > > The Unknown SMC Function Identifier is a sign-extended value of (-1) > that is returned in the R0, W0 or X0 registers. An implementation must > return this error code when it receives: > > *

Re: [qemu-web v2 PATCH] Update the information about the required version of macOS

On 13/09/2021 10.28, Daniel P. Berrangé wrote: On Mon, Sep 13, 2021 at 10:04:25AM +0200, Thomas Huth wrote: On 13/09/2021 09.35, Howard Spoelstra wrote: On Mon, Sep 13, 2021 at 8:21 AM Thomas Huth mailto:th...@redhat.com>> wrote: The versions that we specify for macOS are way too old al

Re: [PATCH v8 15/19] hvf: arm: Implement -cpu host

On Sun, 12 Sept 2021 at 21:23, Alexander Graf wrote: > > > On 15.06.21 12:56, Peter Maydell wrote: > > On Wed, 19 May 2021 at 21:23, Alexander Graf wrote: > >> Now that we have working system register sync, we push more target CPU > >> properties into the virtual machine. That might be useful in

Re: [qemu-web v2 PATCH] Update the information about the required version of macOS

On Mon, Sep 13, 2021 at 10:04:25AM +0200, Thomas Huth wrote: > On 13/09/2021 09.35, Howard Spoelstra wrote: > > > > > > On Mon, Sep 13, 2021 at 8:21 AM Thomas Huth > > wrote: > > > > The versions that we specify for macOS are way too old already. Let's > > rephr

Re: [PATCH] qapi: define cleanup function for g_autoptr(Error)

On Mon, Sep 13, 2021 at 09:30:07AM +0200, Paolo Bonzini wrote: > On 13/09/21 07:23, Markus Armbruster wrote: > > Paolo Bonzini writes: > > > > > Allow replacing calls to error_free() with g_autoptr(Error) > > > declarations. > > > > > > Signed-off-by: Paolo Bonzini > > > --- > > > include/qap

Re: [PATCH v2 6/9] linux-user: Split safe-syscall macro into its own header

On Sun, 12 Sept 2021 at 17:23, Richard Henderson wrote: > > On 9/8/21 8:44 AM, Peter Maydell wrote: > > Split the safe-syscall macro from qemu.h into a new safe-syscall.h. > > > > Signed-off-by: Peter Maydell > > Reviewed-by: Philippe Mathieu-Daudé > > --- > > linux-user/qemu.h | 135 ---

Re: SMMU Stage 2 translation in QEMU

Hi Shashi, On 9/10/21 3:32 PM, shashi.mall...@linaro.org wrote: > So that would be the driver code running in guest OS because i see > tables being setup by arm-smmu driver code in linux,which is similar to > what happens with ITS(table base addresses programmed in registers by > linux driver). St

Re: [PATCH v2 0/2] fix crash if try to migrate during backup

On 11.09.21 14:00, Vladimir Sementsov-Ogievskiy wrote: v2: 01: check that migration fails 02: Add Hanna's r-b Vladimir Sementsov-Ogievskiy (2): tests: add migrate-during-backup block: bdrv_inactivate_recurse(): check for permissions and fix crash block.c

Re: [PATCH] tcg/arm: Reduce vector alignment requirement for NEON

On Sun, Sep 12, 2021 at 10:49:25AM -0700, Richard Henderson wrote: > With arm32, the ABI gives us 8-byte alignment for the stack. > While it's possible to realign the stack to provide 16-byte alignment, > it's far easier to simply not encode 16-byte alignment in the > VLD1 and VST1 instructions tha

Re: [qemu-web v2 PATCH] Update the information about the required version of macOS

On 13/09/2021 09.35, Howard Spoelstra wrote: On Mon, Sep 13, 2021 at 8:21 AM Thomas Huth > wrote: The versions that we specify for macOS are way too old already. Let's rephrase this without specific version numbers, pointing the users to the latest version

Re: [PATCH 0/5] qapi: Another round of minor fixes and cleanups

Queued.

Re: [qemu-web v2 PATCH] Update the information about the required version of macOS

On Mon, Sep 13, 2021 at 8:21 AM Thomas Huth wrote: > The versions that we specify for macOS are way too old already. Let's > rephrase this without specific version numbers, pointing the users > to the latest version instead. > > Signed-off-by: Thomas Huth > --- > v2: Rephrased to be more in syn

Re: [PATCH] qapi: define cleanup function for g_autoptr(Error)

On 13/09/21 07:23, Markus Armbruster wrote: Paolo Bonzini writes: Allow replacing calls to error_free() with g_autoptr(Error) declarations. Signed-off-by: Paolo Bonzini --- include/qapi/error.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/qapi/error.h b/include/qapi/error

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