Sign repetitions are perforce all identical, whether they are 1 or 0.
Bitwise operations preserve the relative quantity of the repetitions.
Reviewed-by: Alex Bennée
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 29
On 10/28/21 21:27, BALATON Zoltan wrote:
> It's more readable to keep things on one line if it fits the length limit.
>
> Signed-off-by: BALATON Zoltan
> ---
> hw/timer/sh_timer.c | 9 +++--
> 1 file changed, 3 insertions(+), 6 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
From: Pavel Dovgalyuk
Watchpoints that should fire after the memory access
break an execution of the current block, try to
translate current instruction into the separate block,
which then causes debug interrupt.
But cpu_interrupt can't be called in such block when
icount is enabled, because
On 10/28/21 21:27, BALATON Zoltan wrote:
> It does the same with dumping some more state but avoids calling abort
> directly and printing to stderr from the device model.
hw_error() is unfortunately misnamed, it is meant for CPU code,
and we want to get ride of it. What you probably want here is
Recognize the constant function for or-complement.
Reviewed-by: Alex Bennée
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index
Recognize the identity function for low-part multiply.
Suggested-by: Luis Pires
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/tcg/optimize.c
On 10/28/21 21:27, BALATON Zoltan wrote:
> Address of element i is one word thus clearer than array + i.
>
> Signed-off-by: BALATON Zoltan
> Reviewed-by: Richard Henderson
> ---
> hw/intc/sh_intc.c | 28 ++--
> 1 file changed, 14 insertions(+), 14 deletions(-)
On 10/28/21 21:27, BALATON Zoltan wrote:
> Rename the iomem region to "intc" from "interrupt-controller" which
> makes the info mtree output less wide as it is already too wide
> because of all the aliases. Also drop the format macro which was only
> used twice in close proximity so we can just
Recognize the constant function for remainder.
Suggested-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index f8b0709157..7ac63c9231
On 10/28/21 21:27, BALATON Zoltan wrote:
> All the places that call abort should not happen which is better
> marked by g_assert_not_reached.
>
> Signed-off-by: BALATON Zoltan
> Reviewed-by: Richard Henderson
> ---
> hw/intc/sh_intc.c | 8 +++-
> 1 file changed, 3 insertions(+), 5
On 10/28/21 21:27, BALATON Zoltan wrote:
> Drop unneded parenthesis and split up one complex expression to write
> it with less brackets so it's easier to follow.
>
> Signed-off-by: BALATON Zoltan
> Reviewed-by: Richard Henderson
> ---
> hw/intc/sh_intc.c | 9 +
> 1 file changed, 5
From: Pavel Dovgalyuk
cpu_check_watchpoint function checks cpu->watchpoint_hit at the entry.
But then it also does the same in the middle of the function,
while this field can't change.
That is why this patch removes this useless condition.
Signed-off-by: Pavel Dovgalyuk
Reviewed-by: Richard
This "garbage" setting pre-dates the addition of the type
changing opcodes INDEX_op_ext_i32_i64, INDEX_op_extu_i32_i64,
and INDEX_op_extr{l,h}_i64_i32.
So now we have a definitive points at which to adjust z_mask
to eliminate such bits from the 32-bit operands.
Reviewed-by: Alex Bennée
From: Pavel Dovgalyuk
Watchpoint processing code restores vCPU state twice:
in tb_check_watchpoint and in cpu_loop_exit_restore/cpu_restore_state.
Normally it does not affect anything, but in icount mode instruction
counter is incremented twice and becomes incorrect.
This patch eliminates
Most of these are handled by creating a fold_const2_commutative
to handle all of the binary operators. The rest were already
handled on a case-by-case basis in the switch, and have their
own fold function in which to place the call.
We now have only one major switch on TCGOpcode.
Introduce
The result is either 0 or 1, which means that we have
a 2 bit signed result, and thus 62 bits of sign.
For clarity, use the smask_from_zmask function.
Reviewed-by: Alex Bennée
Reviewed-by: Luis Pires
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 2 ++
1 file changed, 2 insertions(+)
Rename to fold_addsub2.
Use Int128 to implement the wider operation.
Reviewed-by: Alex Bennée
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 65 ++
1 file changed, 44
Certain targets, like riscv, produce signed 32-bit results.
This can lead to lots of redundant extensions as values are
manipulated.
Begin by tracking only the obvious sign-extensions, and
converting them to simple copies when possible.
Reviewed-by: Alex Bennée
Reviewed-by: Luis Pires
Rename to fold_multiply2, and handle muls2_i32, mulu2_i64,
and muls2_i64.
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 44 +++-
1 file changed, 35 insertions(+), 9 deletions(-)
diff
Recognize the identity function for division.
Suggested-by: Luis Pires
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
Move all of the known-zero optimizations into the per-opcode
functions. Use fold_masks when there is a possibility of the
result being determined, and simply set ctx->z_mask otherwise.
Reviewed-by: Alex Bennée
Reviewed-by: Luis Pires
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 545
For constant shifts, we can simply shift the s_mask.
For variable shifts, we know that sar does not reduce
the s_mask, which helps for sequences like
ext32s_i64 t, in
sar_i64 t, t, v
ext32s_i64 out, t
allowing the final extend to be eliminated.
Reviewed-by: Alex Bennée
Even though there is only one user, place this more complex
conversion into its own helper.
Reviewed-by: Luis Pires
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 89 ++
1 file changed, 47 insertions(+), 42 deletions(-)
diff --git
Split out the conditional conversion from a more complex logical
operation to a simple NOT. Create a couple more helpers to make
this easy for the outer-most logical operations.
Reviewed-by: Luis Pires
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 158
Pull the "op r, 0, b => movi r, 0" optimization into a function,
and use it in fold_shift.
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 28 ++--
1 file changed, 10 insertions(+), 18 deletions(-)
diff
On Thu, Oct 28, 2021 at 6:07 PM Warner Losh wrote:
>
>
> On Thu, Oct 28, 2021 at 11:53 AM Richard Henderson <
> richard.hender...@linaro.org> wrote:
>
>> On 10/19/21 9:44 AM, Warner Losh wrote:
>> > +regs->regs[15] = tswap32(gr[TARGET_REG_PC]);
>> > +cpsr = tswap32(gr[TARGET_REG_CPSR]);
Pull the "op r, a, 0 => movi r, 0" optimization into a function,
and use it in the outer opcode fold functions.
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 38 --
1 file changed, 20
Pull the "op r, a, i => mov r, a" optimization into a function,
and use them in the outer-most logical operations.
Reviewed-by: Luis Pires
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 61 +-
1 file changed, 26 insertions(+), 35
Compute the type of the operation early.
There are at least 4 places that used a def->flags ladder
to determine the type of the operation being optimized.
There were two places that assumed !TCG_OPF_64BIT means
TCG_TYPE_I32, and so could potentially compute incorrect
results for vector
The results are generally 6 bit unsigned values, though
the count leading and trailing bits may produce any value
for a zero input.
Reviewed-by: Alex Bennée
Reviewed-by: Luis Pires
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 53 +-
1 file changed, 31 insertions(+), 22 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index 5374c230da..8524fe1f8a
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 33 +++--
1 file changed, 19 insertions(+), 14 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index c9db14f1d0..24ba6d2830 100644
---
This is the final entry in the main switch that was in a
different form. After this, we have the option to convert
the switch into a function dispatch table.
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 27
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 25 +++--
1 file changed, 15 insertions(+), 10 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index 3bd5f043c8..2c57d08760 100644
---
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 48 ++--
1 file changed, 30 insertions(+), 18 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index faedbdbfb8..3bd5f043c8
Pretending that the source is i64 when it is in fact i32 is
incorrect; we have type-changing opcodes that must be used.
This bug trips up the subsequent change to the optimizer.
Fixes: 4f2331e5b67a
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
Split out a whole bunch of placeholder functions, which are
currently identical. That won't last as more code gets moved.
Use CASE_32_64_VEC for some logical operators that previously
missed the addition of vectors.
Reviewed-by: Alex Bennée
Reviewed-by: Luis Pires
Signed-off-by: Richard
Pull the "op r, a, a => movi r, 0" optimization into a function,
and use it in the outer opcode fold functions.
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 41 -
1 file changed, 24
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 27 ---
1 file changed, 16 insertions(+), 11 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index dd65f1afcd..5374c230da 100644
---
Pull the "op r, a, a => mov r, a" optimization into a function,
and use it in the outer opcode fold functions.
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 39 ---
1 file changed, 24
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 32 ++--
1 file changed, 18 insertions(+), 14 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index 2c57d08760..dd65f1afcd 100644
---
Rather than try to keep these up-to-date across folding,
re-read nb_oargs at the end, after re-reading the opcode.
A couple of asserts need dropping, but that will take care
of itself as we split the function further.
Reviewed-by: Alex Bennée
Reviewed-by: Luis Pires
Signed-off-by: Richard
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 39 ++-
1 file changed, 22 insertions(+), 17 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index 110b3d1cc2..faedbdbfb8 100644
---
Add two additional helpers, fold_add2_i32 and fold_sub2_i32
which will not be simple wrappers forever.
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 70 +++---
1 file changed, 44
Calls are special in that they have a variable number
of arguments, and need to be able to clobber globals.
Reviewed-by: Alex Bennée
Reviewed-by: Luis Pires
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 63 --
1 file changed, 41
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 23 ++-
1 file changed, 14 insertions(+), 9 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index 24ba6d2830..f79cb44944 100644
--- a/tcg/optimize.c
Reduce some code duplication by folding the NE and EQ cases.
Reviewed-by: Luis Pires
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 159 +
1 file changed, 81 insertions(+), 78 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 56 --
1 file changed, 31 insertions(+), 25 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index 9d1d045363..110b3d1cc2
This will allow callers to tail call to these functions
and return true indicating processing complete.
Reviewed-by: Alex Bennée
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 9 +
1 file changed, 5 insertions(+), 4
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 37 +
1 file changed, 21 insertions(+), 16 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index f79cb44944..805522f99d 100644
---
Continue splitting tcg_optimize.
Reviewed-by: Alex Bennée
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 22 ++
1 file changed, 14 insertions(+), 8 deletions(-)
diff --git a/tcg/optimize.c
Reduce some code duplication by folding the NE and EQ cases.
Reviewed-by: Alex Bennée
Reviewed-by: Luis Pires
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 145 -
1 file changed, 72 insertions(+), 73 deletions(-)
diff --git
Adjust the interface to take the OptContext parameter instead
of TCGContext or both.
Reviewed-by: Alex Bennée
Reviewed-by: Luis Pires
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 67 +-
1 file changed, 34 insertions(+), 33 deletions(-)
This puts the separate mb optimization into the same framework
as the others. While fold_qemu_{ld,st} are currently identical,
that won't last as more code gets moved.
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 89
Return -1 instead of 2 for failure, so that we can
use comparisons against 0 for all cases.
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 145 +
1 file changed, 74
Reviewed-by: Alex Bennée
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index 368457f4a2..699476e2f1 100644
---
This will expose the variable to subroutines that
will be broken out of tcg_optimize.
Reviewed-by: Alex Bennée
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
There was no real reason for calls to have separate code here.
Unify init for calls vs non-calls using the call path, which
handles TCG_CALL_DUMMY_ARG.
Reviewed-by: Alex Bennée
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c |
Prepare for tracking different masks by renaming this one.
Reviewed-by: Alex Bennée
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 142 +
1 file changed, 72 insertions(+), 70
Copy z_mask into OptContext, for writeback to the
first output within the new function.
Reviewed-by: Alex Bennée
Reviewed-by: Luis Pires
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 49 +
1 file changed, 33 insertions(+), 16
From: Luis Pires
Signed-off-by: Luis Pires
Reviewed-by: Richard Henderson
Message-Id: <20211025191154.350831-5-luis.pi...@eldorado.org.br>
Signed-off-by: Richard Henderson
---
tests/unit/test-div128.c | 197 +++
tests/unit/meson.build | 1 +
2 files
Break the final cleanup clause out of the main switch
statement. When fully folding an opcode to mov/movi,
use "continue" to process the next opcode, else break
to fall into the final cleanup.
Reviewed-by: Alex Bennée
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by:
Provide what will become a larger context for splitting
the very large tcg_optimize function.
Reviewed-by: Alex Bennée
Reviewed-by: Luis Pires
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 77 ++
1
From: Luis Pires
Move udiv_qrnnd() from include/fpu/softfloat-macros.h to host-utils,
so it can be reused by divu128().
Signed-off-by: Luis Pires
Reviewed-by: Richard Henderson
Message-Id: <20211025191154.350831-3-luis.pi...@eldorado.org.br>
Signed-off-by: Richard Henderson
---
From: Luis Pires
These will be used to implement new decimal floating point
instructions from Power ISA 3.1.
The remainder is now returned directly by divu128/divs128,
freeing up phigh to receive the high 64 bits of the quotient.
Signed-off-by: Luis Pires
Reviewed-by: Richard Henderson
The following changes since commit c52d69e7dbaaed0ffdef8125e79218672c30161d:
Merge remote-tracking branch 'remotes/cschoenebeck/tags/pull-9p-20211027'
into staging (2021-10-27 11:45:18 -0700)
are available in the Git repository at:
https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20211028
From: Frédéric Pétrot
Addition of not and xor on 128-bit integers.
Signed-off-by: Frédéric Pétrot
Co-authored-by: Fabien Portas
Message-Id: <20211025122818.168890-3-frederic.pet...@univ-grenoble-alpes.fr>
[rth: Split out logical operations.]
Reviewed-by: Richard Henderson
Signed-off-by:
From: Luis Pires
In preparation for changing the divu128/divs128 implementations
to allow for quotients larger than 64 bits, move the div-by-zero
and overflow checks to the callers.
Signed-off-by: Luis Pires
Reviewed-by: Richard Henderson
Message-Id:
Change SET_USR_FIELD to write to hex_new_value[HEX_REG_USR] instead
of hex_gpr[HEX_REG_USR].
Then, we need code to mark the instructions that can set implicitly
set USR
- Macros added to hex_common.py
- A_FPOP added in translate.c
Test case added in tests/tcg/hexagon/overflow.c
Reviewed-by:
Change additional tcg_const_tl to tcg_constant_tl
Note that gen_pred_cancal had slot_mask initialized with tcg_const_tl.
However, it is not constant throughout, so we initialize it with
tcg_temp_new and replace the first use with the constant value.
Inspired-by: Richard Henderson
Inspired-by:
The following changes since commit c52d69e7dbaaed0ffdef8125e79218672c30161d:
Merge remote-tracking branch 'remotes/cschoenebeck/tags/pull-9p-20211027'
into staging (2021-10-27 11:45:18 -0700)
are available in the git repository at:
https://github.com/quic/qemu tags/pull-hex-20211028
在 2021/10/28 下午5:05, Zhang Chen 写道:
Make the vnet header a necessary part of filter transfer protocol.
It make other modules(like another filter-redirector,colo-compare...)
know how to parse net packet correctly. If local device is not the
virtio-net-pci, vnet_hdr_len will be 0.
On Thu, Oct 28, 2021 at 10:11:35AM -0600, Alex Williamson wrote:
> Better. Like the class layering proposal, a downside is that the
> driver needs to be aware that it's imposing this requirement to be able
> to mark it in the class init function rather than some automatic means,
> like an
On Fri, Oct 29, 2021 at 1:30 AM Laurent Vivier wrote:
>
> virtio-net-test has an hotplug testcase that is never executed.
>
> This is because the testcase is attached to virtio-pci interface
> rather than to virtio-net-pci.
>
> $ QTEST_QEMU_BINARY=./qemu-system-x86_64 tests/qtest/qos-test -l |
destination:
../qemu/build/qemu-system-x86_64 -enable-kvm -netdev
tap,id=hn0,script=/etc/qemu-ifup,downscript=/etc/qemu-ifdown -device
e1000,netdev=hn0,mac=50:52:54:00:11:22 -boot c -drive
if=none,file=./Fedora-rdma-server-migration.qcow2,id=drive-virtio-disk0 -device
On Thu, Oct 28, 2021 at 04:54:36PM +0100, Daniel P. Berrangé wrote:
> This command was turned into a no-op four years ago in
>
> commit 0c8465440d50c18a7bb13d0a866748f0593e193a
> Author: Peter Xu
> Date: Fri Dec 29 15:31:04 2017 +0800
>
> hmp: obsolete "info ioapic"
>
>
On 28/10/2021 23:17, Dr. David Alan Gilbert wrote:
> * Li Zhijian (lizhij...@cn.fujitsu.com) wrote:
>
> Apologies for taking so long.
It's okay :), thanks for your review.
>
>> /*
>> - * Completion queue can be filled by both read and write work requests,
>> - * so must reflect
No need to have our own definitions of these registers.
Signed-off-by: Cameron Esfahani
---
target/i386/hvf/vmx.h | 17 +
target/i386/hvf/x86.c | 6 +++---
target/i386/hvf/x86.h | 34 --
target/i386/hvf/x86_mmu.c | 2 +-
On Thu, Oct 28, 2021 at 11:53 AM Richard Henderson <
richard.hender...@linaro.org> wrote:
> On 10/19/21 9:44 AM, Warner Losh wrote:
> > +regs->regs[15] = tswap32(gr[TARGET_REG_PC]);
> > +cpsr = tswap32(gr[TARGET_REG_CPSR]);
> > +cpsr_write(regs, cpsr, CPSR_USER | CPSR_EXEC,
Hi everyone,
I am pleased to announce that the QEMU v6.0.1 stable release is now
available.
You can grab the tarball from our download page here:
https://www.qemu.org/download/#source
v6.0.1 is now tagged in the official qemu.git repository, and the
stable-6.0 branch has been updated
Some commands such as quit or cont have one letter alternatives but
stop is missing that. Add stop|s to match cont|c for consistency and
convenience.
Signed-off-by: BALATON Zoltan
---
hmp-commands.hx | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hmp-commands.hx
On Thu, Oct 28, 2021 at 11:25 AM Richard Henderson <
richard.hender...@linaro.org> wrote:
> On 10/19/21 9:44 AM, Warner Losh wrote:
> > +regs->regs[TARGET_REG_PC] = ka->_sa_handler;
>
> Surely there should be some handling of thumb addresses here.
>
Yes. I've added code to do this, but
On Thu, Oct 28, 2021 at 11:35 AM Kyle Evans wrote:
> On Thu, Oct 28, 2021 at 12:25 PM Richard Henderson
> wrote:
> >
> > On 10/19/21 9:44 AM, Warner Losh wrote:
> > > +regs->regs[TARGET_REG_PC] = ka->_sa_handler;
> >
> > Surely there should be some handling of thumb addresses here.
> >
>
>
Let us detect usage via the modern interface by tapping into the place
that implements the 'modern' reset.
Signed-off-by: Halil Pasic
---
hw/virtio/virtio-pci.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
index 6e16e2705c..8dd862da21
The fact that revision > 0 was negotiated implies that VIRTIO_VERSION_1
aka modern must be used. This negotiation is done before the obligatory
reset. Let us call virtio_force_modern() after the reset if revision > 0
was negotiated, so that the VIRTIO_VERSION_1 feature can be set, and
endianness
Legacy vs modern should be detected via transport specific means. We
can't wait till feature negotiation is done. Let us introduce
virtio_force_modern() as a means for the transport code to signal
that the device should operate in modern mode (because a modern driver
was detected).
Signed-off-by:
This is an early RFC for a transport specific early detecton of
modern virtio, which is most relevant for transitional devices on big
endian platforms, when drivers access the config space before
FEATURES_OK is set.
The most important part that is missing here is fixing the problems that
arrise
On Wed, Oct 27, 2021 at 05:21:30PM +0100, Stefan Hajnoczi wrote:
> > +static void vfu_object_ctx_run(void *opaque)
> > +{
> > +VfuObject *o = opaque;
> > +int ret = -1;
> > +
> > +while (ret != 0) {
> > +ret = vfu_run_ctx(o->vfu_ctx);
> > +if (ret < 0) {
> > +
While the first 'off' variable assignment is unused, it helps
to better understand the code logic. Move the assignation where
it would have been used so it is easier to compare the MSA
registers based on FPU ones versus the MSA specific registers.
Reviewed-by: Jiaxun Yang
Reviewed-by: Richard
On Fri, Oct 29, 2021 at 12:22 AM Richard Henderson
wrote:
>
> On 10/28/21 4:30 AM, Alistair Francis wrote:
> > On Thu, Oct 28, 2021 at 6:22 PM Frank Chang wrote:
> >>
> >> On Thu, Oct 28, 2021 at 12:45 PM Alistair Francis
> >> wrote:
> >>>
> >>> From: Chih-Min Chao
> >>>
> >>> The sNaN
Convert the COPY_S (Element Copy to GPR Signed) opcode
and INSERT (GPR Insert Element) opcode to decodetree.
Reviewed-by: Jiaxun Yang
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/tcg/msa.decode | 2 +
target/mips/tcg/msa_translate.c | 103
Only the MSA generic opcode was overlapping with the other
instructions. Since the previous commit removed it, we can
now remove the overlap group. The decodetree script forces
us to re-indent the opcodes.
Diff trivial to review using `git-diff --ignore-all-space`.
Reviewed-by: Jiaxun Yang
Convert 3-register operations to decodetree.
Reviewed-by: Richard Henderson
Reviewed-by: Jiaxun Yang
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/tcg/msa.decode | 53 ++
target/mips/tcg/msa_translate.c | 916 ++--
2 files changed, 106 insertions(+),
All opcodes have been converted to decodetree. The generic
MSA handler is now pointless, remove it.
Reviewed-by: Jiaxun Yang
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/tcg/msa.decode | 2 --
target/mips/tcg/msa_translate.c | 7 ---
2 files
FCR0_HAS2008 flag has been enabled in commit ba5c79f2622
("target-mips: indicate presence of IEEE 754-2008 FPU in
R6/R5+MSA CPUs"), so remove the obsolete FIXME comment.
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/cpu-defs.c.inc | 1 -
1 file changed, 1 deletion(-)
diff --git
Convert the COPY_U opcode (Element Copy to GPR Unsigned) to
decodetree.
Since the 'n' field is a constant value, use tcg_constant_i32()
instead of a TCG temporary.
Reviewed-by: Jiaxun Yang
Signed-off-by: Philippe Mathieu-Daudé
---
v2: Add NULL_IF_TARGET_MIPS32() macro, use array of 4 functions
Convert 3-register floating-point or fixed-point operations
to decodetree.
Reviewed-by: Jiaxun Yang
Signed-off-by: Philippe Mathieu-Daudé
---
v3:
- Add plus_1(), extract DF in decoder
- Remove TRANS_MSA(), call check_msa_enabled in trans_X()
---
target/mips/tcg/msa.decode | 9 +
Convert the MOVE.V opcode (Vector Move) to decodetree.
Reviewed-by: Jiaxun Yang
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/tcg/msa.decode | 7 ++-
target/mips/tcg/msa_translate.c | 19 ++-
2 files changed, 20 insertions(+), 6
Convert instructions with an immediate element index
and data format df/n to decodetree.
Since the 'data format' and 'n' fields are constant values,
use tcg_constant_i32() instead of a TCG temporaries.
Reviewed-by: Jiaxun Yang
Reviewed-by: Richard Henderson
Signed-off-by: Philippe
Convert 2-register operations to decodetree.
Reviewed-by: Jiaxun Yang
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20211027180730.1551932-17-f4...@amsat.org>
---
v3:
- Call check_msa_enabled in trans_X()
---
target/mips/tcg/msa.decode | 3 ++
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