On 11/17/21 07:57, Joel Stanley wrote:
Add X11, FP5280G2, G220A, Rainier and Fuji. Mention that Swift will be
removed in v7.0.
Signed-off-by: Joel Stanley
Reviewed-by: Cédric Le Goater
Thanks
C.
---
v2:
- Add POWER10 to Rainier description
- Include Fuji
- Mention Swift to be
Am 09.11.21 um 21:56 schrieb Collin Walling:
The CPNC portion of the diag 318 data is erroneously reset during an
initial CPU reset caused by SIGP. Let's go ahead and relocate the
diag318_info field within the CPUS390XState struct such that it is
only zeroed during a clear reset. This way, the
Hi Philippe,
On 2021/11/15 22:58, Philippe Mathieu-Daudé wrote:
Keep the common TYPE_MACHINE class initialization in
machine_base_class_init(), make it abstract, and move
the non-common code to a new class: "smp-without-dies-valid".
Signed-off-by: Philippe Mathieu-Daudé
---
Hi, Richard:
On 11/12/2021 02:14 AM, Richard Henderson wrote:
> On 11/11/21 2:35 AM, Xiaojuan Yang wrote:
>> +static bool trans_tlbwr(DisasContext *ctx, arg_tlbwr *a)
>> +{
>> +gen_helper_check_plv(cpu_env);
>> +gen_helper_tlbwr(cpu_env);
>> +tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next
On 11/16/21 10:09 PM, Philippe Mathieu-Daudé wrote:
Linux Hexagon port doesn't define a specific 'struct stat'
but uses the generic one (see Linux commit 6103ec56c65c [*]
"asm-generic: add generic ABI headers" which predates the
introduction of the Hexagon port).
Remove the target specific
On 11/17/21 7:37 AM, yangxiaojuan wrote:
+*physical = (tlb_ppn1 << 12) | (address & ((1 << tlb_ps) - 1));
TARGET_PAGE_SIZE.
Maybe TARGET_PAGE_SIZE is not fit for a huge page. MAKE_64BIT_MASK(0, tlb_ps)
is ok?
I meant the first << 12. But, yes, MAKE_64BIT_MASK is a good
Move it to the supported list.
Signed-off-by: Joel Stanley
---
v2: New patch
---
docs/system/arm/aspeed.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/docs/system/arm/aspeed.rst b/docs/system/arm/aspeed.rst
index 6aafd611e9a5..d8b102fa0ad0 100644
---
This is the latest URL for the OpenBMC CI. The old URL still works, but
redirects.
Reviewed-by: Cédric Le Goater
Signed-off-by: Joel Stanley
---
docs/system/arm/aspeed.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/docs/system/arm/aspeed.rst
On 16/11/2021 19.20, Daniel P. Berrangé wrote:
On Tue, Nov 16, 2021 at 06:36:50PM +0100, Richard Henderson wrote:
On 11/16/21 6:22 PM, Thomas Huth wrote:
On 16/11/2021 18.09, Philippe Mathieu-Daudé wrote:
On 11/16/21 17:49, Daniel P. Berrangé wrote:
On Tue, Nov 16, 2021 at 05:33:09PM +0100,
A common use case for the ASPEED machine is to boot a Linux kernel.
Provide a full example command line.
Reviewed-by: Cédric Le Goater
Signed-off-by: Joel Stanley
---
docs/system/arm/aspeed.rst | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git
Add X11, FP5280G2, G220A, Rainier and Fuji. Mention that Swift will be
removed in v7.0.
Signed-off-by: Joel Stanley
---
v2:
- Add POWER10 to Rainier description
- Include Fuji
- Mention Swift to be removed
---
docs/system/arm/aspeed.rst | 7 ++-
1 file changed, 6 insertions(+), 1
Here are some small updates to the aspeed docs.
v2: Tweak board changes, add patch to move ADC to the supported list
Joel Stanley (4):
docs: aspeed: Add new boards
docs: aspeed: Update OpenBMC image URL
docs: aspeed: Give an example of booting a kernel
docs: aspeed: ADC is now modelled
On 11/17/21 02:09, Joel Stanley wrote:
This is the latest URL for the OpenBMC CI. The old URL still works, but
redirects.
Signed-off-by: Joel Stanley
Reviewed-by: Cédric Le Goater
Thanks
C.
---
docs/system/arm/aspeed.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
On 11/17/21 02:09, Joel Stanley wrote:
A common use case for the ASPEED machine is to boot a Linux kernel.
Provide a full example command line.
Signed-off-by: Joel Stanley
Reviewed-by: Cédric Le Goater
Thanks
C.
---
docs/system/arm/aspeed.rst | 15 ---
1 file changed, 12
On 11/17/21 02:09, Joel Stanley wrote:
Signed-off-by: Joel Stanley
---
docs/system/arm/aspeed.rst | 4
1 file changed, 4 insertions(+)
diff --git a/docs/system/arm/aspeed.rst b/docs/system/arm/aspeed.rst
index cec87e3743d0..b091c0c61dec 100644
--- a/docs/system/arm/aspeed.rst
+++
Hi, Richard:
On 11/11/2021 11:53 PM, Richard Henderson wrote:
> On 11/11/21 2:35 AM, Xiaojuan Yang wrote:
>> This patch introduces basic TLB interfaces.
>>
>> Signed-off-by: Xiaojuan Yang
>> Signed-off-by: Song Gao
>> ---
>> target/loongarch/cpu-param.h | 3 +
>> target/loongarch/cpu.c
On Tue, Nov 16, 2021 at 11:30 PM Vladislav Yaroshchuk
wrote:
>
>
>
> вт, 16 нояб. 2021 г. в 10:23, Jason Wang :
>>
>> On Mon, Nov 15, 2021 at 6:45 PM Vladislav Yaroshchuk
>> wrote:
>> >
>> >
>> >
>> > пн, 15 нояб. 2021 г. в 07:53, Jason Wang :
>> >>
>> >> On Fri, Nov 12, 2021 at 5:14 PM
On Tue, Nov 16, 2021 at 10:58:30AM +, Stefan Hajnoczi wrote:
> Question for Jens and Christoph:
>
> Is there a way for userspace to detect whether a Linux block device
> supports SECDISCARD?
I don't know of one.
> If not, then maybe a new sysfs attribute can be added:
This looks correct,
> -Original Message-
> From: Juan Quintela
> Sent: Wednesday, November 17, 2021 12:28 AM
> To: Zhang, Chen
> Cc: Hailiang Zhang ; Dr . David Alan
> Gilbert ; qemu-dev
> Subject: Re: [PATCH 1/2] migration/colo: Optimize COLO start code path
>
> Zhang Chen wrote:
> > There is no need
On Fri, 24 Sep 2021, I wrote:
> This is a patch series for QEMU that I started last year. The aim was to
> try to get a monotonic clocksource for Linux/m68k guests. That hasn't
> been achieved yet (for q800 machines). I'm submitting the patch series
> because,
>
> - it improves 6522
hostwin is allocated and added to hostwin_list in vfio_host_win_add, but
it is only deleted from hostwin_list in vfio_host_win_del, which causes
a memory leak. Also, freeing all elements in hostwin_list is missing in
vfio_disconnect_container.
Fix: 2e4109de8e58 ("vfio/spapr: Create DMA window
On 11/17/2021 3:01 AM, Alex Williamson wrote:
> On Tue, 16 Nov 2021 19:56:26 +0800
> Peng Liang wrote:
>
>> hostwin is allocated and added to hostwin_list in vfio_host_win_add, but
>> it is only deleted from hostwin_list in vfio_host_win_del, which causes
>> a memory leak. Also, freeing all
This is the latest URL for the OpenBMC CI. The old URL still works, but
redirects.
Signed-off-by: Joel Stanley
---
docs/system/arm/aspeed.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/docs/system/arm/aspeed.rst b/docs/system/arm/aspeed.rst
index
Here are some small updates to the aspeed docs.
Joel Stanley (3):
docs: aspeed: Add new boards
docs: aspeed: Update OpenBMC image URL
docs: aspeed: Give an example of booting a kernel
docs/system/arm/aspeed.rst | 21 +
1 file changed, 17 insertions(+), 4 deletions(-)
A common use case for the ASPEED machine is to boot a Linux kernel.
Provide a full example command line.
Signed-off-by: Joel Stanley
---
docs/system/arm/aspeed.rst | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/docs/system/arm/aspeed.rst
Signed-off-by: Joel Stanley
---
docs/system/arm/aspeed.rst | 4
1 file changed, 4 insertions(+)
diff --git a/docs/system/arm/aspeed.rst b/docs/system/arm/aspeed.rst
index cec87e3743d0..b091c0c61dec 100644
--- a/docs/system/arm/aspeed.rst
+++ b/docs/system/arm/aspeed.rst
@@ -14,6 +14,7 @@
On Sat, Oct 30, 2021 at 11:56 PM Bin Meng wrote:
>
> Turn on native debug feature on virt and sifive_u CPUs.
Is there a reason why it's only these 2 machines? Could this be
enabled by default for all CPUs?
Alistair
>
> Signed-off-by: Bin Meng
>
> ---
>
> Changes in v2:
> - new patch: enable
On Sun, Oct 31, 2021 at 12:03 AM Bin Meng wrote:
>
> This adds debug CSR read/write support to the RISC-V CSR RW table.
>
> Signed-off-by: Bin Meng
> ---
>
> (no changes since v1)
>
> target/riscv/cpu.c | 6 +
> target/riscv/csr.c | 57 ++
> 2
On Sat, Oct 30, 2021 at 11:59 PM Bin Meng wrote:
>
> Implement .debug_excp_handler, .debug_check_{breakpoint, watchpoint}
> TCGCPUOps and hook them into riscv_tcg_ops.
>
> Signed-off-by: Bin Meng
Reviewed-by: Alistair Francis
Alistair
>
> ---
>
> Changes in v2:
> - use 0 instead of GETPC()
>
On Sat, Oct 30, 2021 at 11:56 PM Bin Meng wrote:
>
> Add a subsection to machine.c to migrate debug CSR state.
>
> Signed-off-by: Bin Meng
Reviewed-by: Alistair Francis
Alistair
>
> ---
>
> Changes in v2:
> - new patch: add debug state description
>
> target/riscv/machine.c | 33
0
On 2021/11/17 上午8:03, Alistair Francis wrote:
On Wed, Nov 17, 2021 at 1:12 AM LIU Zhiwei wrote:
If PMP rules number is zero, it should not influence the TLB entry for
M-mode program.
This doesn't sound right. From what I can tell if we have no rules
pmp_is_range_in_tlb() shouldn't have an
Generally, the traceback for a connection failure is uninteresting and
all we need to know is that the connection attempt failed.
Reduce the verbosity in these cases, except when debugging.
Signed-off-by: John Snow
Reported-by: Thomas Huth
Tested-by: Thomas Huth
Message-id:
On Tue, Nov 16, 2021 at 7:51 PM Richard Henderson
wrote:
>
> In ba0e73336200, we merged riscv32 and riscv64 in configure.
> However, meson does not treat them the same. We need to merge
> them here as well.
>
> Fixes: ba0e73336200
> Signed-off-by: Richard Henderson
Reviewed-by: Alistair
These errors are expected, so they shouldn't clog up terminal output. In
the event that they're *not* expected, we'll be seeing an awful lot more
output concerning the nature of the failure.
Reported-by: Thomas Huth
Signed-off-by: John Snow
Tested-by: Thomas Huth
Message-id:
We don't need to handle KeyboardInterruptError specifically; we can
instead tighten the scope of the broad Exception handlers to only catch
"Exception", which has the effect of allowing all BaseException classes
that do not inherit from Exception to be raised through.
KeyboardInterruptError and a
When ConnectError is used to wrap an Exception that was initialized
without an error message, we are treated to a traceback with a rubbish
line like this:
... ConnectError: Failed to establish session:
Correct this to use the name of an exception as a fallback message:
... ConnectError: Failed
If we receive ConnectionResetError (ECONNRESET) while attempting to
perform capabilities negotiation -- prior to the establishment of the
async reader/writer tasks -- the disconnect function is not aware that
we are in an error pathway.
As a result, when attempting to close the StreamWriter,
The following changes since commit 2b22e7540d6ab4efe82d442363e3fc900cea6584:
Merge tag 'm68k-for-6.2-pull-request' of git://github.com/vivier/qemu-m68k
into staging (2021-11-09 13:16:56 +0100)
are available in the Git repository at:
https://gitlab.com/jsnow/qemu.git
On Wed, Nov 17, 2021 at 1:12 AM LIU Zhiwei wrote:
>
> If PMP rules number is zero, it should not influence the TLB entry for
> M-mode program.
This doesn't sound right. From what I can tell if we have no rules
pmp_is_range_in_tlb() shouldn't have an effect on the tlb_size. What
error are you
On Tue, Nov 16, 2021 at 7:51 PM Richard Henderson
wrote:
>
> In ba0e73336200, we merged riscv32 and riscv64 in configure.
> However, meson does not treat them the same. We need to merge
> them here as well.
>
> Fixes: ba0e73336200
> Signed-off-by: Richard Henderson
Reviewed-by: Alistair
On 17/11/2021 04:28, Richard Henderson wrote:
On 11/16/21 6:12 PM, Philippe Mathieu-Daudé wrote:
On 11/16/21 17:46, Cédric Le Goater wrote:
On 11/14/21 01:51, Alexey Kardashevskiy wrote:
The following changes since commit
d139786e1b3d67991e6cb49a8a59bb2182350285:
ppc/mmu_helper.c: do
From: Satyeshwar Singh
Previously, the large modes (>1080p) that were generated by Qemu in its EDID
were all 50 Hz. If we provide them to a Guest OS and the user selects
one of these modes, then the OS by default only gets 50 FPS. This is
especially true for Windows OS. With this patch, we are
On 11/16/21 9:58 PM, Warner Losh wrote:
+#elif defined(__FreeBSD__)
+ /* FreeBSD kernel returns positive errno and C bit set. */
+ jcs 1f
I needed to change this to 'jc' and that's all google found for Intel.
Yep, that's me jumping between too many arches in one
The AMD ASK/ARK certificate chain differs between AMD SEV
processor generations. SEV capabilities should provide
which ASK/ARK certificate should be used based on the host
processor.
Signed-off-by: Tyler Fanelli
---
qapi/misc-target.json | 28 ++--
target/i386/sev.c
On Tue, Nov 16, 2021 at 04:34:39PM +0100, Łukasz Gieryk wrote:
> if (!pci_is_vf(>parent_obj) && n->params.sriov_max_vfs) {
> -pcie_sriov_pf_disable_vfs(>parent_obj);
> +if (rst != NVME_RESET_CONTROLLER) {
> +pcie_sriov_pf_disable_vfs(>parent_obj);
Shouldn't this
On Tue, Nov 16, 2021 at 4:02 AM Richard Henderson <
richard.hender...@linaro.org> wrote:
> Warner's v3:
> https://patchew.org/QEMU/2023045603.60391-1-...@bsdimp.com/
>
> Changes for v4:
> * Move errno handling into the assembly. While returning the
> raw -errno is handy for x86 linux
Linux Hexagon port doesn't define a specific 'struct stat'
but uses the generic one (see Linux commit 6103ec56c65c [*]
"asm-generic: add generic ABI headers" which predates the
introduction of the Hexagon port).
Remove the target specific target_stat (which in fact is the
target_stat64 structure
On Tue, Nov 16, 2021 at 4:03 AM Richard Henderson <
richard.hender...@linaro.org> wrote:
> From: Warner Losh
>
> Move all the safe_syscall.inc.S files to common-user. They are almost
> identical between linux-user and bsd-user to re-use.
>
> Signed-off-by: Warner Losh
> Reviewed-by: Richard
On Tue, Nov 16, 2021 at 4:03 AM Richard Henderson <
richard.hender...@linaro.org> wrote:
> From: Warner Losh
>
> FreeBSD system calls return positive errno. On the 4 hosts for
> which we have support, error is indicated by the C bit set or clear.
>
> Signed-off-by: Warner Losh
> [rth: Rebase
From: Matheus K. Ferst
> Hi Cédric,
>
> The only change was the helper name that is now uppercase, so nothing new
> here. The underlying cause is that dfp_finalize_decimal64 only sets
> dfp->vt.VsrD(1) and set_dfp64 receives a pointer to the complete struct.
>
> But since set_dfp64 also only
On 11/16/21 8:39 PM, Philippe Mathieu-Daudé wrote:
QEMU coding style mandates to not use Linux kernel internal
types for scalars types. Replace __u32 by uint32_t.
Signed-off-by: Philippe Mathieu-Daudé
---
target/i386/kvm/kvm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
On Tue, 16 Nov 2021 20:59:32 +0100
Christian Schoenebeck wrote:
> On Dienstag, 16. November 2021 19:12:21 CET Greg Kurz wrote:
> > On Tue, 16 Nov 2021 17:40:08 +0100
> >
> > Christian Schoenebeck wrote:
> > > Signed-off-by: Christian Schoenebeck
> > > ---
> >
> > Since g_autofree is scope
On 11/16/21 5:54 PM, Eric Blake wrote:
The following changes since commit 9f0f846465d4c52ce9857787e947dffb64367fae:
Merge tag 'machine-core-2025' of https://github.com/philmd/qemu into
staging (2021-11-16 12:50:27 +0100)
are available in the Git repository at:
On Tue, 02 Nov 2021 16:03:11 +0800
lma wrote:
> Hi list,
>
> Have you experienced any acpi hotplugging issue while using q35 + ovmf +
> machine type 6.1?
> According to the error message in guest kernel, It seems qemu with ovmf
> doesn't prepare
> enough resource in PCI space for acpi
On Dienstag, 16. November 2021 19:12:21 CET Greg Kurz wrote:
> On Tue, 16 Nov 2021 17:40:08 +0100
>
> Christian Schoenebeck wrote:
> > Signed-off-by: Christian Schoenebeck
> > ---
>
> Since g_autofree is scope based, I guess you could also convert this
> snippet, that appears twice in the file
On 16/11/2021 15:08, Laurent Vivier wrote:
The subsection is not closed by a NULL marker so this can trigger
a segfault when the pmu vmstate is saved.
This can be easily shown with:
$ ./qemu-system-ppc64 -dump-vmstate vmstate.json
Segmentation fault (core dumped)
Fixes: d811d61fbc6c
On Mon, 15 Nov 2021 11:57:43 -0500
Brian Rak wrote:
> Will this fix make it into 6.2?
yes,
it was just merged 2aa1842d6d79..7e6055c99f2f1f
PS:
Native PCIe hotplug fixes from Gerd were merged as well,
so if you'd like to use native hotplug, use
--global
QEMU coding style mandates to not use Linux kernel internal
types for scalars types. Replace __u32 by uint32_t.
Signed-off-by: Philippe Mathieu-Daudé
---
target/i386/kvm/kvm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
index
Signed-off-by: Philippe Mathieu-Daudé
---
hw/net/rocker/rocker.h | 5 -
1 file changed, 5 deletions(-)
diff --git a/hw/net/rocker/rocker.h b/hw/net/rocker/rocker.h
index 412fa44d017..d22bbd2bf80 100644
--- a/hw/net/rocker/rocker.h
+++ b/hw/net/rocker/rocker.h
@@ -36,13 +36,8 @@ static
On Mon, 15 Nov 2021 11:39:09 -0500
"Michael S. Tsirkin" wrote:
> From: Gerd Hoffmann
>
> Add an expire time for pending delete, once the time is over allow
> pressing the attention button again.
>
> This makes pcie hotplug behave more like acpi hotplug, where one can
> try sending an
On Tue, 16 Nov 2021 10:04:33 +0100
Gerd Hoffmann wrote:
> Disable power control for pcie slots in case acpi hotplug is enabled
> (6.2+ only for compatibility reasons). This makes sure we don't get
> unpleasant surprises with pci devices not being functional due to slot
> power being turned off.
On Tue, 16 Nov 2021 19:56:26 +0800
Peng Liang wrote:
> hostwin is allocated and added to hostwin_list in vfio_host_win_add, but
> it is only deleted from hostwin_list in vfio_host_win_del, which causes
> a memory leak. Also, freeing all elements in hostwin_list is missing in
>
On Tue, Nov 16, 2021 at 06:36:50PM +0100, Richard Henderson wrote:
> On 11/16/21 6:22 PM, Thomas Huth wrote:
> > On 16/11/2021 18.09, Philippe Mathieu-Daudé wrote:
> > > On 11/16/21 17:49, Daniel P. Berrangé wrote:
> > > > On Tue, Nov 16, 2021 at 05:33:09PM +0100, Thomas Huth wrote:
> > > > > The
On Tue, 16 Nov 2021 17:40:08 +0100
Christian Schoenebeck wrote:
> Signed-off-by: Christian Schoenebeck
> ---
Since g_autofree is scope based, I guess you could also convert this
snippet, that appears twice in the file BTW :
for (int i = 0; i < QTEST_V9FS_SYNTH_READDIR_NFILES; ++i) {
Queued for 7.0.
I am not sure this is a good idea, as this will make bisection
painful over the release tag.
It is my understanding that Cedric will rebase for the mainline PR.
At least that's how David was handling subsystem pulls.
Yes. I don't plan to send a PR on tree without rebasing. I
On 11/16/21 18:30, Cédric Le Goater wrote:
> On 11/16/21 18:28, Richard Henderson wrote:
>> On 11/16/21 6:12 PM, Philippe Mathieu-Daudé wrote:
>>> On 11/16/21 17:46, Cédric Le Goater wrote:
On 11/14/21 01:51, Alexey Kardashevskiy wrote:
> The following changes since commit
>
On 11/16/21 5:25 PM, Alex Bennée wrote:
The following changes since commit 871c71b1bad2d2647641500603a2236869135c7f:
Merge tag 'pull-block-2021-11-16' of https://gitlab.com/hreitz/qemu into
staging (2021-11-16 14:20:39 +0100)
are available in the Git repository at:
On 11/16/21 6:22 PM, Thomas Huth wrote:
On 16/11/2021 18.09, Philippe Mathieu-Daudé wrote:
On 11/16/21 17:49, Daniel P. Berrangé wrote:
On Tue, Nov 16, 2021 at 05:33:09PM +0100, Thomas Huth wrote:
The jobs on Cirrus-CI sometimes get delayed quite a bit, waiting to
be scheduled, so while the
On 11/16/21 12:23 PM, Daniel P. Berrangé wrote:
On Tue, Nov 16, 2021 at 11:58:12AM -0500, Tyler Fanelli wrote:
On 11/16/21 10:53 AM, Daniel P. Berrangé wrote:
On Tue, Nov 16, 2021 at 10:29:35AM -0500, Tyler Fanelli wrote:
On 11/16/21 4:17 AM, Daniel P. Berrangé wrote:
On Mon, Nov 15, 2021 at
On 11/16/21 18:28, Richard Henderson wrote:
On 11/16/21 6:12 PM, Philippe Mathieu-Daudé wrote:
On 11/16/21 17:46, Cédric Le Goater wrote:
On 11/14/21 01:51, Alexey Kardashevskiy wrote:
The following changes since commit
d139786e1b3d67991e6cb49a8a59bb2182350285:
ppc/mmu_helper.c: do not
On 11/16/21 6:12 PM, Philippe Mathieu-Daudé wrote:
On 11/16/21 17:46, Cédric Le Goater wrote:
On 11/14/21 01:51, Alexey Kardashevskiy wrote:
The following changes since commit
d139786e1b3d67991e6cb49a8a59bb2182350285:
ppc/mmu_helper.c: do not truncate 'ea' in
booke206_invalidate_ea_tlb()
Use the pci_intx() helper instead of open-coding it.
Signed-off-by: Philippe Mathieu-Daudé
---
Based-on: <2026170133.724751-3-fbar...@linux.ibm.com>
---
hw/net/vmxnet3.c | 2 +-
hw/remote/iohub.c | 6 ++
hw/remote/proxy.c | 3 +--
3 files changed, 4 insertions(+), 7 deletions(-)
diff
On Tue, Nov 16, 2021 at 11:58:12AM -0500, Tyler Fanelli wrote:
> On 11/16/21 10:53 AM, Daniel P. Berrangé wrote:
> > On Tue, Nov 16, 2021 at 10:29:35AM -0500, Tyler Fanelli wrote:
> > > On 11/16/21 4:17 AM, Daniel P. Berrangé wrote:
> > > > On Mon, Nov 15, 2021 at 02:38:04PM -0500, Tyler Fanelli
On 16/11/2021 18.09, Philippe Mathieu-Daudé wrote:
On 11/16/21 17:49, Daniel P. Berrangé wrote:
On Tue, Nov 16, 2021 at 05:33:09PM +0100, Thomas Huth wrote:
The jobs on Cirrus-CI sometimes get delayed quite a bit, waiting to
be scheduled, so while the build test itself finishes within 60
On Tue, Nov 16, 2021 at 1:33 PM Thomas Huth wrote:
>
> The jobs on Cirrus-CI sometimes get delayed quite a bit, waiting to
> be scheduled, so while the build test itself finishes within 60 minutes,
> the total run time of the jobs can be longer due to this waiting time.
> Thus let's increase the
On 11/16/21 17:46, Cédric Le Goater wrote:
> On 11/14/21 01:51, Alexey Kardashevskiy wrote:
>> The following changes since commit
>> d139786e1b3d67991e6cb49a8a59bb2182350285:
>>
>> ppc/mmu_helper.c: do not truncate 'ea' in
>> booke206_invalidate_ea_tlb() (2021-11-11 11:35:13 +0100)
>>
>> are
On 11/16/21 17:49, Daniel P. Berrangé wrote:
> On Tue, Nov 16, 2021 at 05:33:09PM +0100, Thomas Huth wrote:
>> The jobs on Cirrus-CI sometimes get delayed quite a bit, waiting to
>> be scheduled, so while the build test itself finishes within 60 minutes,
>> the total run time of the jobs can be
This series removes a bogus allocation of a LSI interrupt for the PCI
Host Bridge found in the powernv model (phb4). The real hardware
doesn't declare any LSI, so the model should match. It was causing
some inconsistencies in the interrupt controller data.
However, removing that LSI shows that
The PHB v4 found on POWER9 doesn't request any LSI, so let's clear the
Interrupt Pin register in the config space so that the model matches
the hardware.
If we don't, then we inherit from the default pcie root bridge, which
requests a LSI. And because we don't map it correctly in the device
tree,
Move the pci_intx() definition to the PCI header file, so that it can
be called from other PCI files. It is used by the next patch.
Signed-off-by: Frederic Barrat
---
hw/pci/pci.c | 5 -
include/hw/pci/pci.h | 5 +
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git
Skip triggering an LSI when the AER root error status is updated if no
LSI is defined for the device. We can have a root bridge with no LSI,
MSI and MSI-X defined, for example on POWER systems.
Signed-off-by: Frederic Barrat
---
hw/pci/pcie_aer.c | 4 +++-
1 file changed, 3 insertions(+), 1
On 11/16/21 10:53 AM, Daniel P. Berrangé wrote:
On Tue, Nov 16, 2021 at 10:29:35AM -0500, Tyler Fanelli wrote:
On 11/16/21 4:17 AM, Daniel P. Berrangé wrote:
On Mon, Nov 15, 2021 at 02:38:04PM -0500, Tyler Fanelli wrote:
Probe for SEV-ES and SEV-SNP capabilities to distinguish between Rome,
From: "Richard W.M. Jones"
Under SELinux, Unix domain sockets have two labels. One is on the
disk and can be set with commands such as chcon(1). There is a
different label stored in memory (called the process label). This can
only be set by the process creating the socket. When using SELinux
clang's sanitizer is picky: memset(NULL, x, 0) is technically
undefined behavior, even though no sane implementation of memset()
deferences the NULL. Caught by the nbd-qemu-allocation iotest.
The alternative to checking before each memset is to instead force an
allocation of 1 element instead of
The following changes since commit 9f0f846465d4c52ce9857787e947dffb64367fae:
Merge tag 'machine-core-2025' of https://github.com/philmd/qemu into
staging (2021-11-16 12:50:27 +0100)
are available in the Git repository at:
https://repo.or.cz/qemu/ericb.git tags/pull-nbd-2021-11-16
for
Signed-off-by: Christian Schoenebeck
---
tests/qtest/virtio-9p-test.c | 86 +++-
1 file changed, 25 insertions(+), 61 deletions(-)
diff --git a/tests/qtest/virtio-9p-test.c b/tests/qtest/virtio-9p-test.c
index 41fed41de1..11861aaf7d 100644
---
On Tue, Nov 16, 2021 at 05:33:09PM +0100, Thomas Huth wrote:
> The jobs on Cirrus-CI sometimes get delayed quite a bit, waiting to
> be scheduled, so while the build test itself finishes within 60 minutes,
> the total run time of the jobs can be longer due to this waiting time.
> Thus let's
On 11/14/21 01:51, Alexey Kardashevskiy wrote:
The following changes since commit d139786e1b3d67991e6cb49a8a59bb2182350285:
ppc/mmu_helper.c: do not truncate 'ea' in booke206_invalidate_ea_tlb()
(2021-11-11 11:35:13 +0100)
are available in the Git repository at:
On Tue, Nov 16, 2021 at 05:34:50PM +0100, Juan Quintela wrote:
> Daniel P. Berrangé wrote:
>
> >>
> >> if (params->zerocopy &&
> >> (params->parameters.multifd_compression !=
> >> MULTIFD_COMPRESSION_NONE ||
> >> migrate_use_tls())) {
> >>error_setg(,
> >>
On 11/9/21 15:50, Christophe Lombard wrote:
The PCIe extended configuration space on the device is not currently
accessible to the host. if by default, it is still inaccessible for
conventional for PCIe buses, add the current flag
PCI_BUS_EXTENDED_CONFIG_SPACE on the root bus permits PCI-E
On 16.11.21 16:43, Emanuele Giuseppe Esposito wrote:
On 12/11/2021 14:51, Hanna Reitz wrote:
On 25.10.21 12:17, Emanuele Giuseppe Esposito wrote:
Signed-off-by: Emanuele Giuseppe Esposito
Reviewed-by: Stefan Hajnoczi
---
block.c | 17 +
Daniel P. Berrangé wrote:
>>
>> if (params->zerocopy &&
>> (params->parameters.multifd_compression != MULTIFD_COMPRESSION_NONE
>> ||
>> migrate_use_tls())) {
>>error_setg(,
>> "Zerocopy only available for non-compressed non-TLS
>> multifd
Zhang Chen wrote:
> There is no need to start COLO through MIGRATION_STATUS_ACTIVE.
Hi
I don't understand what you are trying to do. In my reading, at least
the commit message is wrong:
void migrate_start_colo_process(MigrationState *s)
{
...
migrate_set_state(>state,
"Rao, Lei" wrote:
> From: "Rao, Lei"
>
> When the PVM guest poweroff, the COLO thread may wait a semaphore
> in colo_process_checkpoint().So, we should wake up the COLO thread
> before migration shutdown.
>
> Signed-off-by: Lei Rao
Reviewed-by: Juan Quintela
On Tue, Nov 16, 2021 at 04:17:47PM +, Daniel P. Berrangé wrote:
> On Tue, Nov 16, 2021 at 05:08:06PM +0100, Juan Quintela wrote:
> > Leonardo Bras wrote:
> > > Implement zerocopy on nocomp_send_write(), by making use of QIOChannel
> > > zerocopy interface.
> > >
> > > Change
The jobs on Cirrus-CI sometimes get delayed quite a bit, waiting to
be scheduled, so while the build test itself finishes within 60 minutes,
the total run time of the jobs can be longer due to this waiting time.
Thus let's increase the timeout on the gitlab side a little bit, so
that these jobs
From: Cleber Rosa
This introduces three different parts of a job designed to run
on a custom runner managed by Red Hat. The goals include:
a) propose a model for other organizations that want to onboard
their own runners, with their specific platforms, build
configuration and
Add a MAINTAINERS section to cover the GitLab YAML config file
containing the jobs run on the custom runner sponsored by the
Works On Arm project [*].
[*] https://developer.arm.com/solutions/infrastructure/works-on-arm
Suggested-by: Thomas Huth
Signed-off-by: Philippe Mathieu-Daudé
---
From: Philippe Mathieu-Daudé
To ease maintenance, add the custom-runners/ directory and
split custom-runners.yml in 3 files, all included by the
current custom-runners.yml:
- ubuntu-18.04-s390x.yml
- ubuntu-20.04-aarch64.yml
- centos-stream-8-x86_64.yml
Signed-off-by: Philippe Mathieu-Daudé
From: Paolo Bonzini
dlopen is never used after it is sought via cc.find_library, because
plugins use gmodule instead; remove the test.
Signed-off-by: Paolo Bonzini
Reviewed-by: Thomas Huth
Message-Id: <2020092454.30916-1-pbonz...@redhat.com>
Signed-off-by: Alex Bennée
Reviewed-by:
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